CN203086436U - Integrated circuit - Google Patents
Integrated circuit Download PDFInfo
- Publication number
- CN203086436U CN203086436U CN 201220666601 CN201220666601U CN203086436U CN 203086436 U CN203086436 U CN 203086436U CN 201220666601 CN201220666601 CN 201220666601 CN 201220666601 U CN201220666601 U CN 201220666601U CN 203086436 U CN203086436 U CN 203086436U
- Authority
- CN
- China
- Prior art keywords
- voltage domain
- output
- integrated circuit
- internal electric
- electric source
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Abstract
The embodiment of the utility model discloses an integrated circuit. The integrated circuit comprises a first voltage domain and a second voltage domain, wherein an MOS transistor in the second voltage domain can be operated to connect with the first voltage domain, and a substrate of the MOS transistor is connected to an internal power supply of the second voltage domain. The integrated circuit further comprises an analog multiplex circuit comprising a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal is coupled to the first voltage domain, the second input terminal is grounded, and the output terminal is coupled to the MOS transistor. The analog multiplex circuit can be operated to output a signal from the first input terminal through the output terminal in response to the accomplishment of establishment of the internal power supply of the second voltage domain, and output a signal from the second input terminal through the output terminal in response to the unaccomplishment of establishment of the internal power supply of the second voltage domain. The application mode of the integrated circuit provided by the utility model prevents leakage current from occurring in the second voltage domain, thereby increasing the reliability.
Description
Technical field
Execution mode of the present utility model relates to the electronic circuit technology field, and relates more specifically to a kind of integrated circuit.
Background technology
Current, the application of power management chip (IC) in electronic apparatus system is very extensive, plays a part transformation of electrical energy, distribution, detection and other electric energy managements.Consider that electric energy needs the span of conversion very big usually, have a plurality of voltage domains usually in power management IC, these voltage domains are set up according to the time order and function order, realize the differentiated control of electric energy.
For example, charger for mobile phone is a kind of common power management IC.A kind of charger for mobile phone commonly used is connected between the civil power and mobile phone of 220V, is used for the alternating current of 220V is transformed into the 5V direct current that is suitable for cell-phone charging.This charger for mobile phone generally includes two voltage domains, the alternating current of 220V is transformed into the direct current of 24V by first voltage domain of setting up earlier, second voltage domain of being set up by the back is transformed into the direct current of 5V with the direct current of 24V again, and the direct current of this 5V is exported to mobile phone and is used to charge.
Usually, in the voltage domain of back, use MOS transistor, be used to receive output voltage from the voltage domain of front as interface.In actual design, often use the PMOS transistor because the nmos pass transistor transmission not very high voltage.
Fig. 1 shows the block diagram of the example of existing power management IC 100.In Fig. 1, the internal electric source of the voltage domain of front is set up earlier, sets up behind the internal electric source of the voltage domain of back.For simplicity, respectively the voltage domain of front and the voltage domain of back are called first voltage domain and second voltage domain below.As shown in Figure 1, second voltage domain as interface, receives the signal from first voltage domain by a PMOS transistor.Particularly, the output voltage of first voltage domain is input to the transistorized source electrode of PMOS in second voltage domain, and this PMOS transistor drain is exported the voltage that uses for other devices in second voltage domain again.
In Fig. 1, the transistorized N type of the PMOS of second voltage domain substrate connects an internal electric source, and the output voltage of this internal electric source is vdd_lpd.When the transistorized N type of PMOS substrate connects high potential, when P type source electrode connects electronegative potential, bolt-lock can not take place.Yet, because first voltage domain is to set up earlier, thus might the internal electric source of second voltage domain set up ready before, the output signal of first voltage domain has just arrived the transistorized source electrode of PMOS of second voltage domain.At this moment, because the internal electric source of second voltage domain is not also set up, so the transistorized N type of PMOS substrate connects electronegative potential, P type source electrode connects high potential, then leakage current can appear between source electrode and substrate, indicated as Fig. 1 mean camber line arrow.This leakage current can cause power management IC gross error to occur, thereby has had a strong impact on reliability.
The utility model content
At the defective of prior art, execution mode of the present utility model provides a kind of integrated circuit.This integrated circuit comprises first voltage domain and second voltage domain, and wherein the MOS transistor in second voltage domain can operate to be connected with first voltage domain, and the substrate of MOS transistor is connected in the internal electric source of second voltage domain; This integrated circuit also comprises analog multiplexing circuit, and it comprises first input end, second input and output, and wherein first input end is coupled to first voltage domain, second input end grounding, and output is coupled to MOS transistor; Wherein this analog multiplexing circuit can be operated and: set up in response to the internal electric source of second voltage domain ready, from the signal of output output from first input end; And do not set up as yet in response to the internal electric source of second voltage domain ready, from output output signal from second input.
In one embodiment, this MOS transistor is the PMOS transistor.
In one embodiment, this analog multiplexing circuit also comprises the selecting side, and this selecting side can be operated and be received index signal, and whether this index signal is used to indicate the internal electric source of second voltage domain to set up ready.
In one embodiment, this integrated circuit also comprises comparator, its can operate with the output voltage of the internal electric source of second voltage domain and reference voltage compares and based on the comparison the result generate index signal.
In one embodiment, the settling time of the internal electric source of first voltage domain is early than the settling time of the internal electric source of second voltage domain.
Execution mode of the present utility model has been avoided leakage current occurring in second voltage domain, thereby has been improved reliability by connect analog multiplexing circuit between first voltage domain and second voltage domain.
Description of drawings
By shown execution mode in conjunction with the accompanying drawings is elaborated, above-mentioned and other features of the present utility model will be more obvious, and identical label is represented same or analogous element in the utility model accompanying drawing.In the accompanying drawings:
Fig. 1 shows the block diagram of the example of existing power management IC 100;
Fig. 2 shows the block diagram according to the power management IC 200 of execution mode of the present utility model.
Embodiment
Below in conjunction with accompanying drawing execution mode of the present utility model is explained in more detail and illustrated.Should be understood that drawings and the embodiments of the present utility model only are used for exemplary effect, is not to be used to limit protection range of the present utility model.
Describe each execution mode of the present utility model below in conjunction with accompanying drawing in detail in the mode of example.
Fig. 2 shows the block diagram according to the power management IC 200 of execution mode of the present utility model.
The function of the voltage domain of the front among Fig. 2 and the voltage domain of back and structure respectively with Fig. 1 in first voltage domain and second voltage domain similar, do not repeat them here.Equally for convenience's sake, respectively the voltage domain of the front among Fig. 2 and the voltage domain of back are called first voltage domain and second voltage domain below.
As shown in Figure 2, between first voltage domain and second voltage domain, connect an analog multiplexing circuit (AMUX).The input a ground connection of AMUX, input b is coupled to first voltage domain.The output of AMUX is coupled to the PMOS transistor of second voltage domain.
In AMUX, the index signal pgood_lpd by the selecting side comes the signal of control output end output from input a or input b, and wherein whether this index signal indicates the internal electric source of second voltage domain to set up ready.
As shown in Figure 2, do not set up as yet when ready when the internal electric source of second voltage domain, index signal is a logical zero, and output this moment is from the signal of input a; Set up when ready when the internal electric source of second voltage domain, index signal is a logical one, and output this moment is from the signal of input b.Be appreciated that the aforesaid logic height and the internal electric source of second voltage domain whether set up ready corresponding relation and with the corresponding relation of input a and b only be an example.Also can set up readyly with the corresponding internal electric source of logical zero, not set up readyly with the corresponding internal electric source of logical one as yet, the output signal of first voltage domain just is input in second voltage domain when ready as long as assurance is when the internal electric source of second voltage domain is set up.
By connect AMUX between first voltage domain and second voltage domain, execution mode of the present utility model has been avoided leakage current occurring in second voltage domain, thereby has improved reliability.
In execution mode of the present utility model, whether the internal electric source that can use a comparator to generate above-mentioned indication second voltage domain sets up ready index signal.The internal power source voltage that input of this comparator is second voltage domain, another input is a reference voltage.When the output voltage of internal electric source is equal to or higher than when equaling reference voltage, comparator generates this internal electric source of indication and has set up ready index signal, for example logical one.Otherwise comparator generates this internal electric source of indication and does not set up ready index signal, for example logical zero as yet.According to execution mode of the present utility model, reference voltage can be provided by external power source, also can be based on the power supply of the voltage domain of the front of having set up and produce.
Abovely example according to the power management IC200 of execution mode of the present utility model has been described with reference to figure 2.
Notice that term only is not intended as the restriction disclosure in order to describe specific embodiment as used herein.For example, express unless context has in addition, singulative "/a kind of " and " being somebody's turn to do " are intended to also comprise plural form as used herein.Specify the feature that there is statement, whole, operation, unit and/or parts in the time of also will understanding word and " comprise " in being used in this specification and get rid of and exist or add one or more other features, whole, operation, unit, parts and/or its combination.
Although in that some embodiment of the present utility model above have been described with reference to the drawings, should be appreciated that the utility model is not limited to disclosed specific embodiment.The utility model is intended to contain the interior included various modifications and the equivalent arrangements of spirit and scope of claims.The scope of claims meets the most wide in range explanation, thereby comprises all such modifications and equivalent structure and function.
Claims (5)
1. an integrated circuit comprises first voltage domain and second voltage domain, and the MOS transistor in wherein said second voltage domain can operate to be connected with described first voltage domain, and the substrate of described MOS transistor is connected in the internal electric source of described second voltage domain; Described integrated circuit also comprises:
Analog multiplexing circuit, it comprises first input end, second input and output, wherein said first input end is coupled to described first voltage domain, described second input end grounding, described output is coupled to described MOS transistor, and wherein said analog multiplexing circuit can be operated:
Set up in response to the described internal electric source of described second voltage domain ready, from the signal of described output output from described first input end; And
Do not set up as yet in response to the described internal electric source of described second voltage domain ready, from the signal of described output output from described second input.
2. integrated circuit according to claim 1, described MOS transistor are the PMOS transistors.
3. integrated circuit according to claim 2, wherein said analog multiplexing circuit also comprises the selecting side, described selecting side can be operated and be received index signal, and whether described index signal is used to indicate the described internal electric source of described second voltage domain to set up ready.
4. integrated circuit according to claim 3 also comprises:
Comparator, can operate with the output voltage of the described internal electric source of described second voltage domain and reference voltage compares and based on the comparison the result generate described index signal.
5. according to any one described integrated circuit in the claim 1 to 4, the settling time of the internal electric source of wherein said first voltage domain is early than the settling time of the described internal electric source of described second voltage domain.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220666601 CN203086436U (en) | 2012-12-05 | 2012-12-05 | Integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220666601 CN203086436U (en) | 2012-12-05 | 2012-12-05 | Integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203086436U true CN203086436U (en) | 2013-07-24 |
Family
ID=48832238
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201220666601 Expired - Fee Related CN203086436U (en) | 2012-12-05 | 2012-12-05 | Integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203086436U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103856209A (en) * | 2012-12-05 | 2014-06-11 | 艾尔瓦特集成电路科技（天津）有限公司 | Integrated circuit and method used for same |
| CN106487209A (en) * | 2015-08-27 | 2017-03-08 | 苏州冉芯电子科技有限公司 | A kind of method that multi-power domain is selected in Power Management Design |
-
2012
- 2012-12-05 CN CN 201220666601 patent/CN203086436U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103856209A (en) * | 2012-12-05 | 2014-06-11 | 艾尔瓦特集成电路科技（天津）有限公司 | Integrated circuit and method used for same |
| CN103856209B (en) * | 2012-12-05 | 2016-12-07 | 戴泺格集成电路（天津）有限公司 | Integrated circuit and the method for integrated circuit |
| CN106487209A (en) * | 2015-08-27 | 2017-03-08 | 苏州冉芯电子科技有限公司 | A kind of method that multi-power domain is selected in Power Management Design |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US20090315399A1 (en) | Semiconductor device | |
| CN102349236B (en) | Power latch | |
| CN104378093A (en) | Power-on reset method and circuit using MIPI standard circuit | |
| CN106602532B (en) | Current-limiting circuit and its driving method, PMIC protection system and display apparatus protecting system | |
| CN203086436U (en) | Integrated circuit | |
| CN102346529B (en) | Power supply control circuit | |
| CN204180045U (en) | Based on the serial port level chance-over circuit of the intellectual education terminal of Internet of Things | |
| EP2887177B1 (en) | Stacked clock distribution for low power devices | |
| CN105790566A (en) | Auxiliary circuit for power supply with power management chip | |
| CN103856204A (en) | Integrated circuit, integrated circuit starting method and voltage selection circuit | |
| CN117097165A (en) | Driving scheme for secondary controlled Active Clamp Flyback (ACF) mode | |
| CN103199488A (en) | Low-voltage protection circuit free of requiring independent reference source | |
| CN107210296A (en) | Self-inductance measurement reverse-current protection is switched | |
| CN104734685A (en) | Integrated circuit | |
| CN103312313A (en) | rail to rail enable signal and level conversion circuit | |
| CN209028498U (en) | A kind of ESD protective system of low pressure difference linear voltage regulator | |
| CN102957126B (en) | High-voltage element circuit and under-voltage lockout circuit thereof | |
| CN201733130U (en) | Power supply management module circuit | |
| CN104079020B (en) | Computer and charging circuit thereof | |
| CN102692539B (en) | Tolerance to overvoltage level sensitive circuit, its method of operating and system | |
| CN103856209B (en) | Integrated circuit and the method for integrated circuit | |
| CN107422773B (en) | Digital low-dropout regulator | |
| CN203193606U (en) | An integrated circuit and a voltage selecting circuit | |
| CN101986492B (en) | Short-circuit protection circuit and short-circuit protection method | |
| CN105743487A (en) | Integrated circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130724 Termination date: 20161205 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |