CN104734685A - Integrated circuit - Google Patents

Integrated circuit Download PDF

Info

Publication number
CN104734685A
CN104734685A CN201510135703.XA CN201510135703A CN104734685A CN 104734685 A CN104734685 A CN 104734685A CN 201510135703 A CN201510135703 A CN 201510135703A CN 104734685 A CN104734685 A CN 104734685A
Authority
CN
China
Prior art keywords
voltage domain
internal electric
electric source
voltage
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201510135703.XA
Other languages
Chinese (zh)
Inventor
蒋丽
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to CN201510135703.XA priority Critical patent/CN104734685A/en
Publication of CN104734685A publication Critical patent/CN104734685A/en
Pending legal-status Critical Current

Links

Landscapes

  • Semiconductor Integrated Circuits (AREA)

Abstract

The embodiment of the invention discloses an integrated circuit. The integrated circuit comprises a first voltage domain and a second voltage domain, an MOS transistor in the second voltage domain can be operated to be connected with the first voltage domain, and a substrate of the MOS transistor is connected to an internal power supply of the second voltage domain. The integrated circuit further comprises an analog multiplexing circuit which comprises a first input end, a second input end and an output end, wherein the first input end is coupled to the first voltage domain, the second input end is grounded, and the output end is coupled to the MOS transistor. The analog multiplexing circuit can be operated to respond to a signal which is output from the output end and comes from the first input end when the internal power supply of the second voltage domain has been established and respond to a signal which is output from the output end and comes from the first input end when the internal power supply of the second voltage domain has not been established. By means of the implementation mode, current leakage is prevented from happening in the second voltage domain, and therefore reliability is improved.

Description

Integrated circuit
Technical field
The execution mode of the application relates to electronic circuit technology field, and relates more specifically to a kind of integrated circuit.
Background technology
Current, the application of power management chip (IC) in electronic apparatus system widely, plays a part transformation of electrical energy, distribution, detection and other electric energy managements.Consider that electric energy needs the span of conversion usually very large, in power management IC, usually there is multiple voltage domain, these voltage domains are set up according to time order and function order, realize the differentiated control of electric energy.
Such as, charger for mobile phone is a kind of common power management IC.A kind of conventional charger for mobile phone is connected between the civil power of 220V and mobile phone, for becoming to be suitable for the 5V direct current of mobile phone charging by the convert alternating current of 220V.This charger for mobile phone generally includes two voltage domains, by the first voltage domain first set up, the convert alternating current of 220V is become the direct current of 24V, by the second voltage domain of rear foundation, the DC power conversion of 24V is become the direct current of 5V again, the direct current of this 5V exports to mobile phone for charging.
Usually, use MOS transistor as interface in the voltage domain below, for receiving the output voltage from voltage domain above.In actual design, normal use PMOS transistor, because NMOS transistor transmission not very high voltage.
Fig. 1 shows the block diagram of an example of existing power management IC 100.In Fig. 1, the internal electric source of voltage domain above is first set up, and sets up after the internal electric source of voltage domain below.For simplicity, respectively voltage domain above and voltage domain are below called the first voltage domain and the second voltage domain below.As shown in Fig. 1, the second voltage domain as interface, receives the signal from the first voltage domain by a PMOS transistor.Particularly, the output voltage of the first voltage domain is input to the source electrode of the PMOS transistor in the second voltage domain, and the drain electrode of this PMOS transistor exports the voltage for other devices in the second voltage domain again.
In Fig. 1, the N type substrate of the PMOS transistor of the second voltage domain connects an internal electric source, and the output voltage of this internal electric source is vdd_lpd.When the N type substrate of PMOS transistor connects high potential, when P type source electrode connects electronegative potential, bolt-lock can not be there is.But, because the first voltage domain is first set up, thus likely the internal electric source of the second voltage domain set up ready before, the output signal of the first voltage domain just reaches the source electrode of the PMOS transistor of the second voltage domain.At this moment, because the internal electric source of the second voltage domain does not also establish, so the N type substrate of PMOS transistor connects electronegative potential, P type source electrode connects high potential, so there will be leakage current between the drain and the substrate, indicated by Fig. 1 mean camber line arrow.This leakage current can cause power management IC to occur gross error, thus has had a strong impact on reliability.
Summary of the invention
For the defect of prior art, the execution mode of the application provides a kind of integrated circuit.This integrated circuit comprises the first voltage domain and the second voltage domain, and the MOS transistor operative wherein in the second voltage domain is connected with the first voltage domain, and the substrate of MOS transistor is connected to the internal electric source of the second voltage domain; This integrated circuit also comprises analog multiplexing circuit, and it comprises first input end, the second input and output, and wherein first input end is coupled to the first voltage domain, the second input end grounding, and output is coupled to MOS transistor; Wherein this analog multiplexing circuit can operate: the internal electric source in response to the second voltage domain has been set up ready, exports the signal from first input end from output; And not yet set up ready in response to the internal electric source of the second voltage domain, export the signal from the second input from output.
In one embodiment, this MOS transistor is PMOS transistor.
In one embodiment, this analog multiplexing circuit also comprises selecting side, and this selecting side can operate to receive index signal, and whether the internal electric source that this index signal is used to indicate the second voltage domain has been set up ready.
In one embodiment, this integrated circuit also comprises comparator, and it can operate and the output voltage of the internal electric source of the second voltage domain and reference voltage to be compared and result generates index signal based on the comparison.
In one embodiment, the settling time of the internal electric source of the first voltage domain is early than settling time of the internal electric source of the second voltage domain.
The execution mode of the application, by connecting analog multiplex electronics between the first voltage domain and the second voltage domain, avoids and occur leakage current in the second voltage domain, thus improve reliability.
Accompanying drawing explanation
By being described in detail to execution mode shown by reference to the accompanying drawings, above-mentioned and other features of the application will be more obvious, and label identical in illustrations represents same or analogous element.In the accompanying drawings:
Fig. 1 shows the block diagram of an example of existing power management IC 100;
Fig. 2 shows the block diagram of the power management IC 200 according to the execution mode of the application.
Embodiment
Be explained in more detail below in conjunction with the execution mode of accompanying drawing to the application and illustrate.Should be understood that, the drawings and the embodiments of the application, only for exemplary effect, are not the protection range for limiting the application.
Each execution mode of the application is described in an illustrative manner in detail below in conjunction with accompanying drawing.
Fig. 2 shows the block diagram of the power management IC 200 according to the execution mode of the application.
The function and structure of the voltage domain before in Fig. 2 and voltage domain below respectively with the first voltage domain in Fig. 1 and the second voltage domain similar, do not repeat them here.Also for ease of conveniently, respectively the voltage domain before in Fig. 2 and voltage domain are below called the first voltage domain and the second voltage domain below.
As shown in Fig. 2, between the first voltage domain and the second voltage domain, connect an analog multiplexing circuit
(AMUX)。The input a ground connection of AMUX, input b is coupled to the first voltage domain.The output of AMUX is coupled to the PMOS transistor of the second voltage domain.
In AMUX, come control output end export from the signal of input a or input b by the index signal pgood_lpd of selecting side, wherein whether this index signal to indicate the internal electric source of the second voltage domain to set up ready.
As shown in Fig. 2, when the internal electric source of the second voltage domain is not yet set up ready, index signal is logical zero, now exports the signal from input a; When the internal electric source of the second voltage domain is set up ready, index signal is logical one, now exports the signal from input b.Be appreciated that whether logic as above height is set up ready corresponding relation with the internal electric source of the second voltage domain and be only an example with the corresponding relation of input a and b.Also can set up ready with the corresponding internal electric source of logical zero, not yet set up ready with the corresponding internal electric source of logical one, as long as ensure that the output signal of the first voltage domain is just input in the second voltage domain when the internal electric source of the second voltage domain is set up ready.
By connecting AMUX between the first voltage domain and the second voltage domain, the execution mode of the application avoids and occur leakage current in the second voltage domain, thus improves reliability.
In the execution mode of the application, a comparator can be used whether to set up ready index signal to the internal electric source generating above-mentioned instruction second voltage domain.The input of this comparator is the internal power source voltage of the second voltage domain, and another input is reference voltage.When the output voltage of internal electric source be equal to or higher than equal reference voltage time, comparator generates this internal electric source of instruction and has set up ready index signal, such as logical one.Such as, otherwise comparator generates this internal electric source of instruction and not yet sets up ready index signal, logical zero.According to the execution mode of the application, reference voltage can be provided by external power source, also can produce based on the power supply of the voltage domain before establishing.
Above reference diagram 2 describes the example of the power management IC 200 according to the execution mode of the application.
Note, term is only not intended as restriction disclosure to describe specific embodiment as used herein.Such as, express unless context separately has, singulative "/a kind of " and " being somebody's turn to do " are intended to also comprise plural form as used herein.Also by understand word " comprise " to specify when being used in this specification there is statement feature, one integral piece, operation, unit and/or parts and do not get rid of and there is or add one or more other features, one integral piece, operation, unit, parts and/or its combination.

Claims (5)

1. an integrated circuit, comprises the first voltage domain and the second voltage domain, and the MOS transistor operative in wherein said second voltage domain is connected with described first voltage domain, and the substrate of described MOS transistor is connected to the internal electric source of described second voltage domain; Described integrated circuit also comprises: analog multiplexing circuit, it comprises first input end, the second input and output, wherein said first input end is coupled to described first voltage domain, described second input end grounding, described output is coupled to described MOS transistor, and wherein said analog multiplexing circuit can operate: the described internal electric source in response to described second voltage domain has been set up ready, export the signal from described first input end from described output; And not yet set up ready in response to the described internal electric source of described second voltage domain, export the signal from described second input from described output.
2. integrated circuit according to claim 1, described MOS transistor is PMOS transistor.
3. integrated circuit according to claim 2, wherein said analog multiplexing circuit also comprises selecting side, described selecting side can operate to receive index signal, and whether the described internal electric source that described index signal is used to indicate described second voltage domain has been set up ready.
4. integrated circuit according to claim 3, also comprises: comparator, can operate the output voltage of the described internal electric source of described second voltage domain and reference voltage to be compared and result generates described index signal based on the comparison.
5., according to the integrated circuit in Claims 1-4 described in any one, settling time of the internal electric source of wherein said first voltage domain is early than the settling time of the described internal electric source of described second voltage domain.
CN201510135703.XA 2015-03-26 2015-03-26 Integrated circuit Pending CN104734685A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201510135703.XA CN104734685A (en) 2015-03-26 2015-03-26 Integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201510135703.XA CN104734685A (en) 2015-03-26 2015-03-26 Integrated circuit

Publications (1)

Publication Number Publication Date
CN104734685A true CN104734685A (en) 2015-06-24

Family

ID=53458199

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201510135703.XA Pending CN104734685A (en) 2015-03-26 2015-03-26 Integrated circuit

Country Status (1)

Country Link
CN (1) CN104734685A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106875907A (en) * 2017-01-22 2017-06-20 格科微电子(上海)有限公司 Driving voltage controlling circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106875907A (en) * 2017-01-22 2017-06-20 格科微电子(上海)有限公司 Driving voltage controlling circuit

Similar Documents

Publication Publication Date Title
US11223270B2 (en) Power-efficient sync-rectifier gate driver architecture
US9804651B2 (en) Power adapter and electronic device
US20160094226A1 (en) Power switch control between usb and wireless power system
CN108055033A (en) Level shifting circuit, IC chip and electronic equipment
CN104052454A (en) Level shifter for high density integrated circuits
CN110289848A (en) Voltage level converting
CN103186219A (en) Redundancy computer power supply and control method thereof
CN105790566A (en) Auxiliary circuit for power supply with power management chip
EP2887177B1 (en) Stacked clock distribution for low power devices
CN203086436U (en) Integrated circuit
CN104734685A (en) Integrated circuit
CN104901681A (en) 2VDD level switching circuit of VDD voltage-withstand CMOS
CN103856204A (en) Integrated circuit, integrated circuit starting method and voltage selection circuit
CN105656294A (en) Step-down circuit in medium voltage and high voltage integrated circuit
CN202602615U (en) Control circuit of rail-to-rail enable signals and electric level conversion circuit
CN209572001U (en) A kind of driving circuit and level shifting circuit of signal transfer tube
TW201124830A (en) Dynamic adjustment circuit and computer system having the same
CN103312313A (en) rail to rail enable signal and level conversion circuit
US20120250235A1 (en) Interface module with protection circuit and electronic device
US9520773B2 (en) Anti-leakage supply circuit
CN104300960B (en) Adaptive input output circuit and its chip
CN103856207A (en) Electrical level switching circuit and electrical level switching method
CN105743487A (en) Integrated circuit
CN103199845A (en) Two-way buffer based on open-drain bus
CN209267548U (en) A kind of quick low-power consumption single ended interfaces

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20150624

WD01 Invention patent application deemed withdrawn after publication