CN103186219A - Redundancy computer power supply and control method thereof - Google Patents
Redundancy computer power supply and control method thereof Download PDFInfo
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- CN103186219A CN103186219A CN2011104572218A CN201110457221A CN103186219A CN 103186219 A CN103186219 A CN 103186219A CN 2011104572218 A CN2011104572218 A CN 2011104572218A CN 201110457221 A CN201110457221 A CN 201110457221A CN 103186219 A CN103186219 A CN 103186219A
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Abstract
The invention discloses a redundancy computer power supply and a control method thereof. The power supply adopts the shunt-wound manner of power supply units for supplying power, and each power supply unit comprises an input filter circuit, a rectification circuit, a DC/DC converting circuit, an output filter circuit and a flow equalization control circuit which are in sequential connection, and further comprises a power sequential control circuit and a fault isolation and control circuit, wherein the power sequential control circuit is connected with the DC/DC converting circuit and used for generating a first signal to enable the DC/DC converting circuit when the power supply unit is powered up, so that the power supply unit has no output, and a secondary signal is also generated to enable multiple power supply units to output simultaneously; and the fault isolation and control circuit is used for realizing a low-conduction-resistance fault isolation loop at the output terminal of the power supply unit in a manner of common drain series connection of dual-P-channel MOSFETs (Metal-Oxide-Semiconductor Field Effect Transistors). According to the invention, the output of the redundancy computer power supply is realized while electrification is achieved, and a low-conduction-resistance fault isolation loop is provided.
Description
Technical field
The present invention relates to the computer power supply technical field, be specifically related to a kind of redundant computer power supply and corresponding control method thereof of optimizing electrifying timing sequence and fault isolation control that have.
Background technology
In field of computer technology, the raising of computing velocity and function expansion make power consumption of computer systems increase, in order to improve the application reliability of computer system, increasing computer system adopts the power supply of redundant computer power supply, for example multiple-unit server and disk array simultaneously.
The redundant computer power supply namely adopts the N+1 pattern, is computer power supply by N+1 power supply unit by parallel way.Because the redundant computer power supply is multichannel output, the electrifying timing sequence that needs between each road to keep correct is to guarantee the normal startup of computing machine; When breaking down for fear of power supply unit simultaneously, other power supply units are exerted an influence, therefore in each power supply unit, need to carry out the fault isolation design.
Because of the supply voltage difference of each integrated circuit on the computer motherboard, correctly mate for making multiple signal, various supply voltage electrifying timing sequences are had strict demand: 3.3V can not be prior to 5V, and 5V can not rise to best choice simultaneously prior to 12V.The way of control electrifying timing sequence commonly used has two kinds: a kind of is to enable each road change-over circuit simultaneously; Another kind enables each road change-over circuit successively, as shown in Figure 1.The mode that enables simultaneously, because of the difference of each several part change-over circuit, the front and back of 12V, 5V and 3.3V order can not be controlled; The mode that enables successively then may cause starting failure because its interval time is long.
In the redundant computer power supply, the fault isolation measure must be arranged, the traditional method of fault isolation is to adopt diode at each road output terminal, utilize the isolation of the unidirectional on state characteristic realization fault of diode, as shown in Figure 2, namely break down when not exporting at a certain power supply unit, diode can not influence other power supply units and continue as computer power supply with fault isolation to this power supply unit.But along with the increase of computing machine power consumption, the current value on each road increases thereupon, and the peak value circuit can reach tens amperes, even ampere up to a hundred, and the intrinsic PN junction pressure drop meeting of diode produces too much heat, initiating failure at diode.
Therefore, be necessary the characteristics at the redundant computer power supply, propose a kind of effective electrifying timing sequence control circuit and fault isolation control circuit, realize that power supply output powers on simultaneously, and the loop of the fault isolation with low conduction impedance is provided.
Summary of the invention
The object of the present invention is to provide a kind of redundant computer power supply and control method thereof, power on simultaneously when being used for realizing the output of redundant computer power supply, and the loop of the fault isolation with low conduction impedance is provided.
To achieve these goals, the invention provides a kind of redundant computer power supply, adopt the parallel way of power supply unit to power, described power supply unit comprises input filter circuit, rectification circuit, DC/DC change-over circuit, output filter circuit, the equalizing control circuit that connects successively, it is characterized in that, also comprise:
The electrifying timing sequence control circuit, connect described DC/DC change-over circuit, be used for when described power supply unit powers up, producing first signal and enable described DC/DC change-over circuit, make described power supply unit no-output, and the generation secondary signal, make described power supply unit multichannel export simultaneously;
The fault isolation control circuit is used for the fault isolation loop of realizing low conduction impedance in the mode that the output terminal of described power supply unit is connected by two P channel mosfet common drains.
Described redundant computer power supply, wherein, described electrifying timing sequence control circuit makes described power supply unit multichannel export simultaneously by the conducting of control MOSFET.
Described redundant computer power supply, wherein, when described electrifying timing sequence control circuit enables described DC/DC change-over circuit, described DC/DC change-over circuit produces 12V, 5V, 3.3V, described power supply unit is not exported 12V, 5V, 3.3V, producing described secondary signal, make the MOSFET conducting, described power supply unit output 12V, 5V, 3.3V.
Described redundant computer power supply, wherein, described fault isolation control circuit comprises a P channel mosfet, the 2nd P channel mosfet, the drain electrode of a described P channel mosfet is connected with the drain electrode of described the 2nd P channel mosfet, and carries out conducting control by the driving circuit of described power supply unit.
Described redundant computer power supply, wherein, during described power supply unit operate as normal, a described P channel mosfet, described the 2nd P channel mosfet be conducting simultaneously under the control of the driving circuit of described power supply unit, for the output of described power supply unit provides low-impedance path; When described power supply unit breaks down no-output, a described P channel mosfet, described the 2nd not conducting of P channel mosfet.
Described redundant computer power supply, wherein, described electrifying timing sequence control circuit comprises first electric capacity, first diode, second diode, the 3rd diode, triode, the first N-channel MOS FET, the second N-channel MOS FET, a P channel mosfet, photoelectricity coupling unit, delay unit and first to the 8th resistance;
Described fault isolation control circuit comprises: the 3rd diode, triode, the second N-channel MOS FET, a P channel mosfet, the 2nd P channel mosfet and the 5th to the 8th resistance;
First electric capacity and first resistance connect and compose the RC charge-discharge circuit, and then trigger delay unit, and the output of delay unit connects the grid of the first N-channel MOS FET, controls the break-make of the first N-channel MOS FET; First signal is by drawing on second resistance, and control photoelectricity coupling unit is controlled the duty of DC/DC change-over circuit through the PC pin of first diode connection DC/DC change-over circuit;
Secondary signal is by the be connected in series base stage of triode of the 3rd resistance, the 4th resistance and second diode, control its conducting, the collector of triode is connected with the 5th resistance, and then control its conducting by the 5th resistance is connected the second N-channel MOS FET with the 6th resistance grid, the be connected in series source electrode of the second N-channel MOS FET of the 3rd diode, the 7th resistance and the 8th resistance, and then control its conducting by the 7th resistance is connected a P channel mosfet, the 2nd P channel mosfet with the 8th resistance grid.
Described redundant computer power supply, wherein, when first signal was unsettled, the photoelectricity coupling unit was pulled low to 0V with the PC pin of DC/DC change-over circuit, made the DC/DC change-over circuit not change, and did not produce 12V; When first signal ground, the photoelectricity coupling unit is unsettled with the PC pin of DC/DC change-over circuit, the DC voltage of DC/DC change-over circuit after with rectification isolated and is converted to 12V, delay unit is delayed time by first electric capacity, first resistance, before not reaching setting-up time, secondary signal is high, the 3rd resistance, the 4th resistance end triode, the 5th resistance, the 6th resistance end the second N-channel MOS FET, cause the 3rd diode and the 7th resistance that the one P channel mosfet, the 2nd P channel mosfet are ended, power supply unit does not have 12V output; When reaching setting-up time, secondary signal is low, second diode, the 3rd resistance, the 4th resistance are with the triode conducting, and then the 5th resistance and the 6th resistance with the second N-channel MOS FET conducting, make the 3rd diode, the 7th resistance and the 8th resistance with a P channel mosfet, the 2nd P channel mosfet conducting, described power supply unit output 12V carries out synchro control by secondary signal to 5V, 3.3V, realizes that 12V, 5V, 3.3V power on simultaneously.
Described redundant computer power supply, wherein, during described power supply unit operate as normal, secondary signal is low, second diode, the 3rd resistance and the 4th resistance are kept the triode conducting, triode, the 5th resistance and the 6th resistance are kept the second N-channel MOS FET conducting, and the second N-channel MOS FET, the 3rd diode, the 7th resistance and the 8th resistance are kept a P channel mosfet, the 2nd P channel mosfet conducting; When described power supply unit breaks down, there is not 12V output, second diode, the 3rd resistance and the 4th resistance can not make the triode conducting, and then the 5th resistance and the 6th resistance can not the conducting second N-channel MOS FET, the 7th resistance and the 8th resistance can not conducting the one P channel mosfets, the 2nd P channel mosfet.
To achieve these goals, the invention provides a kind of power-on time sequence control method of redundant computer power supply, described redundant computer power supply adopts the parallel way of power supply unit to power, comprise the input filter circuit, rectification circuit, DC/DC change-over circuit, output filter circuit, the equalizing control circuit that connect successively, it is characterized in that, described method comprises:
Described electrifying timing sequence control circuit produces first signal and enables described DC/DC change-over circuit when described power supply unit powers up, make described power supply unit not export, and produce secondary signal, makes described power supply unit multichannel export simultaneously.
Described power-on time sequence control method, wherein, described method comprises:
Described electrifying timing sequence control circuit makes described power supply unit multichannel export simultaneously by the conducting of control MOSFET.
To achieve these goals, the invention provides a kind of accident isolating controlling method of redundant computer power supply, described redundant computer power supply adopts the parallel way of power supply unit to power, comprise the input filter circuit, rectification circuit, DC/DC change-over circuit, output filter circuit, the equalizing control circuit that connect successively, it is characterized in that, described method comprises:
The mode that the fault isolation control circuit is connected by two P channel mosfet common drains realizes the fault isolation loop of low conduction impedance.
Described accident isolating controlling method, wherein, described method comprises:
Described fault isolation control circuit comprises a P channel mosfet, the 2nd P channel mosfet, and the drain electrode of a described P channel mosfet is connected with the drain electrode of described the 2nd P channel mosfet;
During described power supply unit operate as normal, the driving circuit of described power supply unit is controlled a described P channel mosfet, the conducting simultaneously of described the 2nd P channel mosfet, for the output of described power supply unit provides low-impedance path; When described power supply unit breaks down no-output, a described P channel mosfet, described the 2nd not conducting of P channel mosfet.
Useful technique effect of the present invention is:
In the design of redundant computer power supply, different with electrifying timing sequence control commonly used, the present invention adopts transition enabled and output to switch the control mode that combines, and powers on when having realized power supply duplex output, meet computer motherboard more and start demand, improved the reliability of system; And change traditional diode breakdown isolation mode, low conduction impedance characteristic based on MOSFET, adopt the mode of two P channel mosfet common drain series connection, realized the fault isolation loop of low conduction impedance, make computing machine when adopting redundant power to supply with the raising application reliability, guaranteed the security of computer system.
Description of drawings
Fig. 1 is electrifying timing sequence control synoptic diagram commonly used;
Fig. 2 is tradition output fault isolation synoptic diagram;
Fig. 3 is redundant computer power supply composition frame chart of the present invention;
Fig. 4 is while electrifying timing sequence control circuit synoptic diagram of the present invention;
Fig. 5 is low conduction impedance fault isolation circuit diagram of the present invention;
Fig. 6 is electrifying timing sequence of the present invention and fault isolation control circuit figure.
Embodiment
Describe the present invention below in conjunction with the drawings and specific embodiments, but not as a limitation of the invention.
As shown in Figure 3, be redundant computer power supply composition frame chart of the present invention.This redundant computer power supply 300 is a kind of redundant computer power supplys with electrifying timing sequence and fault isolation control, adopting the parallel way of power supply unit is that computing machine is powered, and power supply unit mainly comprises input filter circuit 31, rectification circuit 32, DC/DC change-over circuit 33, output filter circuit 34, equalizing control circuit 35, electrifying timing sequence control circuit 36 and fault isolation control circuit 37.
Electrifying timing sequence control circuit 36 adopts transition enabled and output to switch the control mode that combines, and powers on when having realized the output of power supply unit multichannel, meets computer motherboard more and starts demand, has improved the reliability of system;
Fault isolation control circuit 37, be used for the output terminal at power supply unit, low conduction impedance characteristic based on MOSFET, adopt the mode of two P channel mosfet common drain series connection, realized the fault isolation loop of low conduction impedance, make computing machine when adopting redundant computer power supply 300 to supply with the raising application reliability, guaranteed the security of system.
Output filter circuit 34, be the link that string advances in the output loop, with electrifying timing sequence control circuit 36, fault isolation control circuit 37 no interactivelies, electrifying timing sequence control circuit 36, fault isolation control circuit 37 are separate, just be simplified design, two parts share some components and parts.
Equalizing control circuit 35 is to make the identical electric current of each power supply unit output in parallel, balancedly is the load power supply.
As shown in Figure 4, be while electrifying timing sequence control circuit synoptic diagram of the present invention.
Be the sequential that the multichannel output that realizes redundant computer power supply 300 powers on simultaneously, the present invention adopts transition enabled and output to switch the control mode that combines, as shown in Figure 4.
When redundant computer power supply 300 powers up, electrifying timing sequence control circuit 36 produces the EN signal earlier, enable DC/DC change-over circuit 33, (these voltages are voltage 12V, 5V and 3.3V that DC/DC change-over circuit 33 produces to produce 12V0,5V0 and 3.3V0, these voltages are added 0 with voltage to be represented, be in order to distinguish with the output of redundant computer power supply 3300) because the existence of MOSFET, the output terminal of redundant computer power supply 300 does not have 12V, 5V and 3.3V at this moment; Electrifying timing sequence control circuit 36 and then generation EN1 signal make the conducting of P channel mosfet, and redundant computer power supply 300 is exported 12V, 5V and 3.3V at this moment.By the conducting of control P channel mosfet, can realize that power supply duplex exports simultaneously.
The MOSFET that electrifying timing sequence control circuit 36 adopts is the IRF9310PbF of American I R company.
As shown in Figure 5, be low conduction impedance fault isolation circuit diagram of the present invention.
For realizing having the fault isolation loop of low conduction impedance, the present invention is based on the low conduction impedance characteristic of MOSFET, adopt the mode of two P channel mosfet common drain series connection, as shown in Figure 5.
All during operate as normal, the driving circuit of power supply unit makes P channel mosfet P1 and P2 conducting simultaneously at two power supply units, because the conducting resistance of P channel mosfet P1 and P2 only be several milliohms, can export for power supply unit low-impedance path is provided; When a certain power supply unit breaks down, when not exporting, the driving circuit in this power supply unit just can not make P channel mosfet P1 and P2 conducting, has blocked being connected of fault and outside bus, has played the effect of fault isolation.
When electrifying timing sequence control circuit 36 and fault isolation control circuit 37 are grouped together, can also share MOSFET among Fig. 4 and the elements such as P channel mosfet P1 among Fig. 5, thereby simplify circuit design.
As shown in Figure 6, be electrifying timing sequence of the present invention and fault isolation control circuit figure.
In Fig. 6, electrifying timing sequence control circuit 36 comprises capacitor C 1, diode D1-D3, Q1-Q4, resistance R 1-R8, delay chip U1, photoelectrical coupler U2.
Capacitor C 1 connects and composes the RC charge-discharge circuit with resistance R 1, and then triggers delay chip U1, and the output of delay chip U1 connects the grid of N-channel MOS FET Q2, the break-make of control N-channel MOS FET Q2; The EN signal is by drawing on the resistance R 2, and control photoelectrical coupler U2 through the PC pin of diode D1 connection DC/DC change-over circuit G1, controls the duty of DC/DC change-over circuit G1; The EN1 signal is by the be connected in series base stage of triode Q1 of resistance R 3, resistance R 4 and diode D2, control its conducting, the collector of triode Q1 is connected with resistance R 5, and then control its conducting by resistance R 5 is connected N-channel MOS FET Q3 with R6 grid, the be connected in series source electrode of N-channel MOS FET Q3 of diode D3, resistance R 7 and R8, and then control its conducting by resistance R 7 is connected P channel mosfet Q4 with R8 grid.
Fault isolation control circuit 37 comprises diode D3, resistance R 5-R8, triode Q1, MOSFETQ3-Q5.
The collector of triode Q1 is connected with resistance R 5, and then control its conducting by resistance R 5 is connected N-channel MOS FET Q3 with R6 grid, the be connected in series source electrode of N-channel MOS FET Q3 of diode D3, resistance R 7 and resistance R 8, and then control its conducting by resistance R 7 is connected P channel mosfet Q4 and Q5 with R8 grid.
Wherein, delay chip U1 is 555 delay chips, and triode Q1 is the positive-negative-positive triode, and Q2, Q3 are N-channel MOS FET, and Q4, Q5 are the P channel mosfet.
Further, the concrete course of work of electrifying timing sequence control circuit 36, fault isolation control circuit 37 is as follows:
310V DC voltage after redundant computer power supply 300 powers up after the meeting generation rectification and the standby 5VSB of power supply, this moment, the EN signal was unsettled, drawing under the effect of resistance R 2, photoelectrical coupler U2 is pulled low to 0V by diode D1 with the PC pin of DC/DC change-over circuit G1, G1 does not change, and does not produce 12V0;
Start power supply, the EN signal is pulled low to GND, photoelectrical coupler U2 is unsettled with the PC pin of DC/DC change-over circuit G1, and DC/DC change-over circuit G1 is converted to 12V0 by conversion with the 310V isolation.555 delay chip U1 delay time by capacitor C 1 and resistance R 1, before the time that does not reach setting, the pin 3 of delay chip U1 is output as low, the drain electrode of N-channel MOS FET Q2, not conducting of source electrode, EN1 is high, and resistance R 3 and R4 end triode Q1, and then resistance R 5 and R6 end drain electrode, the source electrode of N-channel MOS FET Q3, cause diode D3 and resistance R 7 that drain electrode, the source electrode of P channel mosfet Q4 and Q5 ended, power supply does not have 12V output; When reaching the time of 555 delay chip U1 setting, the pin 3 of delay chip U1 is output as height, the drain electrode of N-channel MOS FET Q2, source electrode conducting, EN1 is low, diode D2, resistance R 3 and R4 are with triode Q1 conducting, and then resistance R 5 and R6 be drain electrode, the source electrode conducting of N-channel MOS FET Q3, makes diode D3, resistance R 7 and R8 with drain electrode, the source electrode conducting of P channel mosfet Q4 and Q5, power supply output 12V; The 5V of EN1 and 3.3V carry out synchro control, realize that just 12V, 5V and 3.3V power on simultaneously;
During the power supply operate as normal, EN1 is low, diode D2, resistance R 3 and R4 keep triode Q1 conducting, triode Q1, resistance R 5 and R6 keep drain electrode, the source electrode conducting of N-channel MOS FET Q3, N-channel MOS FET Q3, diode D3, resistance R 7 and R8 keep drain electrode, the source electrode conducting of P channel mosfet Q4 and Q5, because the conducting resistance of P channel mosfet Q4 and Q5 only is several milliohms, can provide low-impedance path for power supply output; When power supply breaks down, there is not 12V0 output, diode D2, resistance R 3 and R4 can not make triode Q1 conducting, and then resistance R 5 and R6 can't conducting N-channel MOS FET Q3 drain electrode, source electrode, because of the directive effect of diode D3, resistance R 7 and R8 can not make drain electrode, the source electrode conducting of P channel mosfet Q4 and Q5, thereby have guaranteed that outside bus 12V can not pour into electric current because of this power fail, realize fault isolation, guarantee security of system.
The invention provides a kind of redundant computer power supply of optimizing electrifying timing sequence and fault isolation control that has, this power supply has overcome the out of control or long problem in interval of each road output voltage order that traditional approach causes by the electrifying timing sequence control circuit, realized multichannel output function simultaneously, change traditional diode mode by the fault isolation circuit, provide a kind of low on-resistance anti-fault isolation loop.
Certainly; the present invention also can have other various embodiments; under the situation that does not deviate from spirit of the present invention and essence thereof; those of ordinary skill in the art work as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection domain of the appended claim of the present invention.
Claims (12)
1. redundant computer power supply, adopt the parallel way of power supply unit to power, described power supply unit comprises input filter circuit, rectification circuit, DC/DC change-over circuit, output filter circuit, the equalizing control circuit that connects successively, it is characterized in that, also comprises:
The electrifying timing sequence control circuit, connect described DC/DC change-over circuit, be used for when described power supply unit powers up, producing first signal and enable described DC/DC change-over circuit, make described power supply unit no-output, and the generation secondary signal, make described power supply unit multichannel export simultaneously;
The fault isolation control circuit is used for the fault isolation loop of realizing low conduction impedance in the mode that the output terminal of described power supply unit is connected by two P channel mosfet common drains.
2. redundant computer power supply according to claim 1 is characterized in that, described electrifying timing sequence control circuit makes described power supply unit multichannel export simultaneously by the conducting of control MOSFET.
3. redundant computer power supply according to claim 2, it is characterized in that, when described electrifying timing sequence control circuit enables described DC/DC change-over circuit, described DC/DC change-over circuit produces 12V, 5V, 3.3V, described power supply unit is not exported 12V, 5V, 3.3V, producing described secondary signal, make the MOSFET conducting, described power supply unit output 12V, 5V, 3.3V.
4. according to claim 1,2 or 3 described redundant computer power supplys, it is characterized in that, described fault isolation control circuit comprises a P channel mosfet, the 2nd P channel mosfet, the drain electrode of a described P channel mosfet is connected with the drain electrode of described the 2nd P channel mosfet, and carries out conducting control by the driving circuit of described power supply unit.
5. redundant computer power supply according to claim 4, it is characterized in that, during described power supply unit operate as normal, a described P channel mosfet, described the 2nd P channel mosfet be conducting simultaneously under the control of the driving circuit of described power supply unit, for the output of described power supply unit provides low-impedance path; When described power supply unit breaks down no-output, a described P channel mosfet, described the 2nd not conducting of P channel mosfet.
6. according to claim 1,2,3 or 5 described redundant computer power supplys, it is characterized in that described electrifying timing sequence control circuit comprises first electric capacity, first diode, second diode, the 3rd diode, triode, the first N-channel MOS FET, the second N-channel MOS FET, a P channel mosfet, photoelectricity coupling unit, delay unit and first to the 8th resistance;
Described fault isolation control circuit comprises: the 3rd diode, triode, the second N-channel MOS FET, a P channel mosfet, the 2nd P channel mosfet and the 5th to the 8th resistance;
First electric capacity and first resistance connect and compose the RC charge-discharge circuit, and then trigger delay unit, and the output of delay unit connects the grid of the first N-channel MOS FET, controls the break-make of the first N-channel MOS FET; First signal is by drawing on second resistance, and control photoelectricity coupling unit is controlled the duty of DC/DC change-over circuit through the PC pin of first diode connection DC/DC change-over circuit;
Secondary signal is by the be connected in series base stage of triode of the 3rd resistance, the 4th resistance and second diode, control its conducting, the collector of triode is connected with the 5th resistance, and then control its conducting by the 5th resistance is connected the second N-channel MOS FET with the 6th resistance grid, the be connected in series source electrode of the second N-channel MOS FET of the 3rd diode, the 7th resistance and the 8th resistance, and then control its conducting by the 7th resistance is connected a P channel mosfet, the 2nd P channel mosfet with the 8th resistance grid.
7. redundant computer power supply according to claim 6 is characterized in that, when first signal was unsettled, the photoelectricity coupling unit was pulled low to 0V with the PC pin of DC/DC change-over circuit, made the DC/DC change-over circuit not change, and did not produce 12V; When first signal ground, the photoelectricity coupling unit is unsettled with the PC pin of DC/DC change-over circuit, the DC voltage of DC/DC change-over circuit after with rectification isolated and is converted to 12V, delay unit is delayed time by first electric capacity, first resistance, before not reaching setting-up time, secondary signal is high, the 3rd resistance, the 4th resistance end triode, the 5th resistance, the 6th resistance end the second N-channel MOS FET, cause the 3rd diode and the 7th resistance that the one P channel mosfet, the 2nd P channel mosfet are ended, power supply unit does not have 12V output; When reaching setting-up time, secondary signal is low, second diode, the 3rd resistance, the 4th resistance are with the triode conducting, and then the 5th resistance and the 6th resistance with the second N-channel MOS FET conducting, make the 3rd diode, the 7th resistance and the 8th resistance with a P channel mosfet, the 2nd P channel mosfet conducting, described power supply unit output 12V carries out synchro control by secondary signal to 5V, 3.3V, realizes that 12V, 5V, 3.3V power on simultaneously.
8. redundant computer power supply according to claim 6, it is characterized in that, during described power supply unit operate as normal, secondary signal is low, second diode, the 3rd resistance and the 4th resistance are kept the triode conducting, triode, the 5th resistance and the 6th resistance are kept the second N-channel MOS FET conducting, and the second N-channel MOS FET, the 3rd diode, the 7th resistance and the 8th resistance are kept a P channel mosfet, the 2nd P channel mosfet conducting; When described power supply unit breaks down, there is not 12V output, second diode, the 3rd resistance and the 4th resistance can not make the triode conducting, and then the 5th resistance and the 6th resistance can not the conducting second N-channel MOS FET, the 7th resistance and the 8th resistance can not conducting the one P channel mosfets, the 2nd P channel mosfet.
9. the power-on time sequence control method of a redundant computer power supply, described redundant computer power supply adopts the parallel way of power supply unit to power, comprise the input filter circuit, rectification circuit, DC/DC change-over circuit, output filter circuit, the equalizing control circuit that connect successively, it is characterized in that, described method comprises:
Described electrifying timing sequence control circuit produces first signal and enables described DC/DC change-over circuit when described power supply unit powers up, make described power supply unit not export, and produce secondary signal, makes described power supply unit multichannel export simultaneously.
10. power-on time sequence control method according to claim 9 is characterized in that, described method comprises:
Described electrifying timing sequence control circuit makes described power supply unit multichannel export simultaneously by the conducting of control MOSFET.
11. the accident isolating controlling method of a redundant computer power supply, described redundant computer power supply adopts the parallel way of power supply unit to power, comprise the input filter circuit, rectification circuit, DC/DC change-over circuit, output filter circuit, the equalizing control circuit that connect successively, it is characterized in that, described method comprises:
The mode that the fault isolation control circuit is connected by two P channel mosfet common drains realizes the fault isolation loop of low conduction impedance.
12. accident isolating controlling method according to claim 11 is characterized in that, described method comprises:
Described fault isolation control circuit comprises a P channel mosfet, the 2nd P channel mosfet, and the drain electrode of a described P channel mosfet is connected with the drain electrode of described the 2nd P channel mosfet;
During described power supply unit operate as normal, the driving circuit of described power supply unit is controlled a described P channel mosfet, the conducting simultaneously of described the 2nd P channel mosfet, for the output of described power supply unit provides low-impedance path; When described power supply unit breaks down no-output, a described P channel mosfet, described the 2nd not conducting of P channel mosfet.
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| CN112737333A (en) * | 2020-12-28 | 2021-04-30 | 航天东方红卫星有限公司 | Secondary power supply with high conversion efficiency for satellite |
| CN113541300A (en) * | 2021-07-06 | 2021-10-22 | 浙江大华技术股份有限公司 | Power supply redundancy backup control circuit and LED display system |
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| CN109683693B (en) * | 2018-11-20 | 2021-03-19 | 北京计算机技术及应用研究所 | Computer power supply with self-adaptive control of output timing sequence |
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| WO2022111359A1 (en) * | 2020-11-25 | 2022-06-02 | 北京比特大陆科技有限公司 | Chip, series power supply circuit, data processing device, and computer server |
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| CN113541300A (en) * | 2021-07-06 | 2021-10-22 | 浙江大华技术股份有限公司 | Power supply redundancy backup control circuit and LED display system |
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Application publication date: 20130703 |