CN203086427U - Peak detection circuit, input feedforward compensating circuit and power factor correction circuit - Google Patents
Peak detection circuit, input feedforward compensating circuit and power factor correction circuit Download PDFInfo
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- CN203086427U CN203086427U CN201320062298XU CN201320062298U CN203086427U CN 203086427 U CN203086427 U CN 203086427U CN 201320062298X U CN201320062298X U CN 201320062298XU CN 201320062298 U CN201320062298 U CN 201320062298U CN 203086427 U CN203086427 U CN 203086427U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The utility model provides a peak detection circuit, an input feedforward compensating circuit and a power factor correction circuit. The peak detection circuit comprises: a first sample hold circuit used for sampling and holding input signals; a second sample hold circuit used for sampling and holding input signals; a first comparator, a positive input end and a negative input end of which are respectively connected with output ends of the first and second sample hold circuits; a sawtooth wave generation circuit used for generating sawtooth wave signals under the control of first control signals outputted by the first comparator; a second comparator, a positive input end of which is connected with an output end of the sawtooth wave generation circuit and a negative input end of which receives preset reference voltage; and a third sample hold circuit used for sampling input signals under the control of second control signals outputted by the second comparator. According to the utility model, peak value of input voltage can be detected timely, and the problem of large output voltage or current fluctuation caused by input voltage leap is solved.
Description
Technical field
The utility model relates to switch power technology, the input feedforward compensation circuit and the circuit of power factor correction that relate in particular to a kind of peak detection circuit and comprise this peak detection circuit.
Background technology
Owing to have non-linear element and energy-storage travelling wave tube in present most of power consumption equipments, therefore can make the input AC current waveform that serious distortion takes place, cause net side input power factor very low.In order to satisfy the harmonic requirement of international standard IEC61000-3-2, must in these power consumption equipments, add power factor correction (PFC) device.
Thereby obtain higher power factor in order to suppress the power frequency ripple, it is lower that the bandwidth of the control loop of conventional P FC circuit is provided with usually, and lower loop bandwidth can cause the dynamic responding speed of pfc circuit slower.With High Power Factor led driver (constant current output) is example, when input voltage has than great fluctuation process, because it is slower that the output level Vcomp of regulation loop changes, make output current Io that bigger overshoot be arranged or fall, thereby the LED light that human eye is seen has more significantly flicker.
The method of input voltage feed forward that often adopts some pfc circuits with permanent control function of power realizes permanent power control, and the dynamic response when input voltage changes relatively has some improvement, as shown in Figure 1.Pfc circuit shown in Figure 1 mainly comprises: alternating-current voltage source 101, rectifier bridge 102, power circuit 103, ratio circuit 104, low pass filter 105, ratio circuit 106, ratio circuit 107, PWM modulator 108, electric current loop 109, multiplier 110, ratio circuit 111, Voltage loop 112.Wherein, power circuit 103 comprises inductance L, diode D, switching tube M and capacitor C, and capacitor C is configured to and load R
LIn parallel.
Yet in the control circuit shown in Figure 1, its input voltage feed forward is to realize by the mean value of gathering input voltage, the low pass filter 105 of gathering the mean value introducing of input voltage vin has reduced the response speed of loop, and is therefore, limited to the dynamic response improvement of input.
Therefore, need a kind of better technical scheme to detect the change of input voltage peak value in time, problem than great fluctuation process takes place to solve output voltage that input voltage mutation causes or electric current
The utility model content
The technical problems to be solved in the utility model provides a kind of peak detection circuit, input feedforward compensation circuit and circuit of power factor correction, can in time detect the peak value of input voltage, and solve input voltage mutation and cause output voltage or electric current problem than great fluctuation process.
For solving the problems of the technologies described above, the utility model provides a kind of peak detection circuit, comprising:
First sampling hold circuit, its input receiving inputted signal is to the maintenance of sampling of described input signal;
Second sampling hold circuit, its input receives described input signal, to the maintenance of sampling of described input signal;
First comparator, its positive input terminal connects the output of described first sampling hold circuit, and its negative input end connects the output of described second sampling hold circuit;
Saw-tooth wave generating circuit, its input links to each other with the output of described first comparator, produces sawtooth signal under first control signal control that the output of described first comparator is exported;
Second comparator, its positive input terminal connects the output of described saw-tooth wave generating circuit, and its negative input end receives default reference voltage;
The 3rd sampling hold circuit, its input receives described input signal, under second control signal control that the output of described second comparator is exported described input signal is sampled.
According to an embodiment of the present utility model, frequency, the pulsewidth of the sawtooth signal of described saw-tooth wave generating circuit generation are identical with first control signal that described first comparator is exported.
According to an embodiment of the present utility model, described first sampling hold circuit and the sampled point of second sampling hold circuit on sequential replace mutually, and leading described second sampling hold circuit of the sampled point of described first sampling hold circuit on sequential.
According to an embodiment of the present utility model, described first sampling hold circuit comprises:
First pulse signal source;
First switch, its first termination is received described input signal, and its second end connects the positive input terminal of described first comparator, and its control end connects the output of described first pulse signal source;
First electric capacity, its first end connects second end of described first switch, its second end ground connection.
According to an embodiment of the present utility model, described second sampling hold circuit comprises:
Second pulse signal source;
Second switch, its first termination is received described input signal, and its second end connects the negative input end of described first comparator, and its control end connects the output of described second pulse signal source;
Second electric capacity, its first end connects second end of described second switch, its second end ground connection.
According to an embodiment of the present utility model, described saw-tooth wave generating circuit comprises:
Current source;
The 3rd switch, its first end connects the output of described current source, its second end ground connection, its control end connects the output of described first comparator;
The 3rd electric capacity, its first end connects first end of described the 3rd switch, its second end ground connection.
According to an embodiment of the present utility model, described the 3rd sampling hold circuit comprises:
The 4th switch, its first termination is received described input signal, and its second end is as the output of described peak detection circuit, and its control end connects the output of described second comparator;
The 4th electric capacity, its first end connects second end of described the 4th switch, its second end ground connection.
The utility model also provides a kind of input feedforward compensation circuit of circuit of power factor correction, comprising:
More than each described peak detection circuit;
The negate circuit that links to each other with described peak detection circuit produces the direct current signal opposite with the peak change trend of described input voltage;
The supercircuit that links to each other with described negate circuit, the output signal stack of the error in the control circuit of described direct current signal and circuit of power factor correction being amplified network.
According to an embodiment of the present utility model, described negate circuit comprises: subtracter, and its positive input terminal receives default direct voltage, and its negative input end connects the output of described peak detection circuit, and its output is exported described direct current signal.
According to an embodiment of the present utility model, described supercircuit comprises: adder, and its first input end connects the output of described negate circuit, and its second input receives the output signal that the error in the described control circuit is amplified network.
According to an embodiment of the present utility model, described input feedforward compensation circuit also comprises: ratio circuit, described input signal amplify via this ratio circuit or dwindle after transfer to the input of described peak detection circuit.
The utility model also provides a kind of circuit of power factor correction, comprises above each described input feedforward compensation circuit.
Compared with prior art, the utlity model has following advantage:
The peak detection circuit of the utility model embodiment can detect the peak value of input signal in the cycle one by one of input signal, compare with the scheme that detects the input signal peak value by the mean value of gathering input signal, detects effect more in real time, fast.
In addition, the circuit of power factor correction machine input feedforward compensation circuit of the utility model embodiment adopts above-mentioned peak detection circuit, with the peak transmission of detected input voltage to control circuit, thereby can realize the quick adjustment of output voltage or output current, when input voltage mutation, the less or ripple disable of output voltage or current fluctuation.Especially when output loading is the LED lamp, when input voltage fluctuation, LED lamp flicker free problem
Description of drawings
Fig. 1 is a kind of schematic diagram that adopts the pfc circuit of conventional feed forward control in the prior art;
Fig. 2 is the circuit diagram of the peak detection circuit of the utility model embodiment;
Fig. 3 is the working waveform figure of peak detection circuit shown in Figure 2;
Fig. 4 is the circuit diagram of the input feedforward compensation circuit of the utility model embodiment;
Fig. 5 is the working waveform figure of feedforward compensation circuit shown in Figure 4.
Embodiment
The utility model is described in further detail below in conjunction with specific embodiments and the drawings, but should not limit protection range of the present utility model with this.
With reference to figure 2, the peak detection circuit of present embodiment comprises: first sampling hold circuit 201, second sampling hold circuit 202, first comparator 203, saw-tooth wave generating circuit 204, second comparator 205, the 3rd sampling hold circuit 206.
Wherein, the input receiving inputted signal of first sampling hold circuit 201, this input signal maintenance of sampling.As a nonrestrictive example, first sampling hold circuit 201 can comprise: the first pulse signal source Vg1; First switch S 1, its first termination is received this input signal, and its second end is as the output of first sampling hold circuit 201, and its control end connects the output of the first pulse signal source Vg1, the other end ground connection of the first pulse signal source Vg1; First capacitor C 1, its first end connects second end of first switch S 1, its second end ground connection.
The input of second sampling hold circuit 202 receives this input signal, to the maintenance of sampling of this input signal.As a nonrestrictive example, second sampling hold circuit 202 can comprise: the second pulse signal source Vg2; Second switch S2, its first termination is received this input signal, and its second end is as the output of this second sampling hold circuit 202, and its control end connects the output of the second pulse signal source Vg2, the other end ground connection of the second pulse signal source Vg2; Second capacitor C 2, its first end connects second end of second switch S2, its second end ground connection.
The positive input terminal of first comparator 203 connects the output of first sampling hold circuit 201, more specifically, is connected to second end of first switch S 1.The negative input end of first comparator 203 connects the output of second sampling hold circuit 202, more specifically, is connected to second end of second switch S2.
The input of saw-tooth wave generating circuit 204 links to each other with the output of first comparator 203, produces sawtooth signal under the control of first control signal that first comparator, 203 outputs produce.As a nonrestrictive example, this saw-tooth wave generating circuit 204 can comprise: current source IDC; The 3rd switch S 3, its first end connects the output of current source IDC, its second end ground connection, its control end connects the output of first comparator 203, also promptly the turn-on and turn-off of first switch S 3 are controlled by first control signal that first comparator 203 produces, and the other end of current source IDC connects positive source VCC; The 3rd capacitor C 3, its first end connects first end of the 3rd switch S 3, its second end ground connection, first end of the 3rd capacitor C 3 is as the output of this saw-tooth wave generating circuit 204.
The positive input terminal of second comparator 205 connects the output of saw-tooth wave generating circuit 204, more specifically, connects first end of the 3rd capacitor C 3; The negative input end of second comparator 205 receives default reference voltage, and as a nonrestrictive example, the negative input end of second comparator 205 connects the anode of voltage source V DC, the negativing ending grounding of voltage source V DC.
The input of the 3rd sampling hold circuit 206 receives this input signal, and under the control of second control signal that the output of second comparator 205 is exported input signal is sampled.As a nonrestrictive example, the 3rd sampling hold circuit 206 can comprise: the 4th switch S 4, its first termination is received this input signal, its second end is as the output of the 3rd sampling hold circuit 206 and whole peak value sampling circuit, and its control end connects the output of second comparator 205; The 4th capacitor C 4, its first end connects second end of the 4th switch S 4, its second end ground connection.
As a preferred embodiment, the frequency of the sawtooth signal that saw-tooth wave generating circuit 204 produces, pulsewidth are identical with first control signal that first comparator 203 is exported; First sampling hold circuit 201 and the sampled point of second sampling hold circuit 202 on sequential replace mutually, and leading second sampling hold circuit 202 of the sampled point of first sampling hold circuit 201 on sequential.For example, the pulse that the pulse of first pulse signal source Vg1 generation and the second pulse signal source Vg2 produce alternately occurs, and the pulse advance that the first pulse signal source Vg1 produces is in the pulse of second pulse signal source Vg2 generation.
Furthermore, under first pulse signal source Vg1 that replaces before and after on the sequential and the control of the second pulse signal source Vg2, the first corresponding sampling hold circuit 201 and second sampling hold circuit 202 are respectively to the input signal maintenance of sampling, two groups of signals that obtain are relatively exported first control signal in the back by first comparator 203, and this first control signal is generally high-frequency pulse signal; First control signal control saw-tooth wave generating circuit, the 204 generation frequencies of first comparator, 203 outputs, the sawtooth signal that pulsewidth is identical with this first control signal; Peak value place at input signal, input signal is risen by dullness and transfers dull decline to, in this transfer process, the pulsewidth of first control signal that first comparator 203 produces increases than other times point, also promptly the output of first comparator 203 can produce a pulse signal of pulsewidth greatly, accordingly, the amplitude of the sawtooth signal of saw-tooth wave generating circuit 204 generations is higher than the amplitude of the sawtooth signal of non-peak value place correspondence; Second comparator 205 with saw-tooth wave generating circuit 204 sawtooth signal that produces and the reference voltage of presetting relatively obtains embodying second control signal of this input signal peak, and this second control signal is generally narrow pulse signal; Afterwards, utilize the narrow pulse signal of this embodiment input signal peak to control the 4th switch S 4 conductings in the 3rd sampling hold circuit 206, to obtain the peak value of input signal.
Fig. 3 shows the working signal waveform of each node in the peak detection circuit shown in Figure 2.As seen from Figure 3, this peak detection circuit can detect the peak value in each cycle of input voltage exactly.
Fig. 4 shows a kind of input feedforward compensation circuit of circuit of power factor correction, and it has adopted peak detection circuit shown in Figure 2.Furthermore, this input feedforward compensation circuit comprises: peak detection circuit 400, ratio circuit 401, negate circuit and supercircuit.
Wherein, the amplitude of 401 pairs of input voltages of ratio circuit is regulated, and it is amplified or dwindles, particularly, the input of ratio circuit 401 can connect the voltage after the rectification of circuit of power factor correction main circuit, and the output of ratio circuit 401 connects the input of peak detection circuit 400.
The circuit structure of peak detection circuit 400 is identical with peak detection circuit shown in Figure 2, repeats no more here.
The negate circuit links to each other with peak detection circuit 400, produces the direct current signal opposite with the peak change trend of input voltage.As a nonrestrictive example, the negate circuit specifically comprises subtracter 402, the positive input terminal of subtracter 402 receives default direct voltage Vd, and the negative input end of subtracter 402 connects the output of peak detection circuit 400, the output output direct current signal of subtracter 402.In the present embodiment, default direct voltage Vd is provided by voltage source 403, and the positive input terminal of subtracter 402 connects the anode of voltage source 403, the negativing ending grounding of voltage source 403.
Supercircuit links to each other with the output of negate circuit, and the output signal Vcomp that the error in the control circuit of the direct current signal of negate circuit output and circuit of power factor correction is amplified network 405 superposes.As a nonrestrictive example, supercircuit comprises adder 404, and the first input end of adder 404 connects the output of negate circuit, is specially the output that connects subtracter 402; Second input of adder 404 receives the output signal Vcomp that error is amplified network 405, the error amplification signal Vcomp ' that the output output of adder 404 is revised.
Error is amplified network 405 can comprise operational amplifier Ua, reference voltage source Vref and capacitor C a, the negative input end receiving feedback signals FB of operational amplifier Ua wherein, the positive input terminal of operational amplifier Ua connects the anode of reference voltage source Vref, the negativing ending grounding of reference voltage source Vref, the output of operational amplifier Ua connects first end of capacitor C a, the second end ground connection of capacitor C a.
In one example, ratio circuit 401 is with the output voltage of main circuit rectifier bridge | and Vac| carries out ratio to be dwindled, to satisfy the voltage magnitude requirement of control circuit; The peak value k|Vac_pk| of the output voltage of the main circuit rectifier bridge that peak detection circuit 400 obtains ratio in real time after dwindling; Subtracter 402 obtains the opposite DC level Vd-k|Vac_pk| of output voltage peak change trend with the main circuit rectifier bridge with the output voltage that default direct voltage Vd deducts peak detection circuit 400; Adder 404 is with the output signal of subtracter 402 and the output signal Vcomp stack of error compensation network 405, and the error amplification signal Vcomp ' that obtains revising is to realize the compensation to dynamic response.The error amplification signal Vcomp ' that revises can be expressed as:
Vcomp’=Vcomp+Vd-k|Vac_pk|
In a circuit of power factor correction, error amplification signal Vcomp ' shown in Figure 4 can transfer to back level control circuit.
Fig. 5 shows the working waveform figure of input feedforward compensation circuit shown in Figure 4, there is Fig. 5 as seen, when the amplitude of input signal changes, this variation amplitude can be reflected on the revised error amplification signal Vcomp ' apace, avoided control loop adjustment process slowly, realized the quick adjustment of output voltage or output current, when input voltage mutation, output voltage or output current can't produce bigger fluctuation.
Though the utility model with preferred embodiment openly as above; but it is not to be used for limiting the utility model; any those skilled in the art are not in breaking away from spirit and scope of the present utility model; can make possible change and modification, therefore protection range of the present utility model should be as the criterion with the scope that the utility model claim is defined.
Claims (12)
1. a peak detection circuit is characterized in that, comprising:
First sampling hold circuit, its input receiving inputted signal is to the maintenance of sampling of described input signal;
Second sampling hold circuit, its input receives described input signal, to the maintenance of sampling of described input signal;
First comparator, its positive input terminal connects the output of described first sampling hold circuit, and its negative input end connects the output of described second sampling hold circuit;
Saw-tooth wave generating circuit, its input links to each other with the output of described first comparator, produces sawtooth signal under first control signal control that the output of described first comparator is exported;
Second comparator, its positive input terminal connects the output of described saw-tooth wave generating circuit, and its negative input end receives default reference voltage;
The 3rd sampling hold circuit, its input receives described input signal, under second control signal control that the output of described second comparator is exported described input signal is sampled.
2. peak detection circuit according to claim 1 is characterized in that, frequency, the pulsewidth of the sawtooth signal of described saw-tooth wave generating circuit generation are identical with first control signal that described first comparator is exported.
3. peak detection circuit according to claim 1, it is characterized in that, described first sampling hold circuit and the sampled point of second sampling hold circuit on sequential replace mutually, and leading described second sampling hold circuit of the sampled point of described first sampling hold circuit on sequential.
4. peak detection circuit according to claim 1 is characterized in that, described first sampling hold circuit comprises:
First pulse signal source;
First switch, its first termination is received described input signal, and its second end connects the positive input terminal of described first comparator, and its control end connects the output of described first pulse signal source;
First electric capacity, its first end connects second end of described first switch, its second end ground connection.
5. peak detection circuit according to claim 1 is characterized in that, described second sampling hold circuit comprises:
Second pulse signal source;
Second switch, its first termination is received described input signal, and its second end connects the negative input end of described first comparator, and its control end connects the output of described second pulse signal source;
Second electric capacity, its first end connects second end of described second switch, its second end ground connection.
6. peak detection circuit according to claim 1 is characterized in that, described saw-tooth wave generating circuit comprises:
Current source;
The 3rd switch, its first end connects the output of described current source, its second end ground connection, its control end connects the output of described first comparator;
The 3rd electric capacity, its first end connects first end of described the 3rd switch, its second end ground connection.
7. peak detection circuit according to claim 1 is characterized in that, described the 3rd sampling hold circuit comprises:
The 4th switch, its first termination is received described input signal, and its second end is as the output of described peak detection circuit, and its control end connects the output of described second comparator;
The 4th electric capacity, its first end connects second end of described the 4th switch, its second end ground connection.
8. the input feedforward compensation circuit of a circuit of power factor correction is characterized in that, comprising:
Each described peak detection circuit in the claim 1 to 7;
The negate circuit that links to each other with described peak detection circuit produces the direct current signal opposite with the peak change trend of described input voltage;
The supercircuit that links to each other with described negate circuit, the output signal stack of the error in the control circuit of described direct current signal and circuit of power factor correction being amplified network.
9. input feedforward compensation circuit according to claim 8 is characterized in that, described negate circuit comprises:
Subtracter, its positive input terminal receives default direct voltage, and its negative input end connects the output of described peak detection circuit, and its output is exported described direct current signal.
10. input feedforward compensation circuit according to claim 8 is characterized in that described supercircuit comprises:
Adder, its first input end connects the output of described negate circuit, and its second input receives the output signal that the error in the described control circuit is amplified network.
11. input feedforward compensation circuit according to claim 8 is characterized in that, also comprises:
Ratio circuit, described input signal amplify via this ratio circuit or dwindle after transfer to the input of described peak detection circuit.
12. a circuit of power factor correction is characterized in that, comprises each described input feedforward compensation circuit of claim 8 to 11.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320062298XU CN203086427U (en) | 2013-01-31 | 2013-01-31 | Peak detection circuit, input feedforward compensating circuit and power factor correction circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320062298XU CN203086427U (en) | 2013-01-31 | 2013-01-31 | Peak detection circuit, input feedforward compensating circuit and power factor correction circuit |
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| CN203086427U true CN203086427U (en) | 2013-07-24 |
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| CN201320062298XU Withdrawn - After Issue CN203086427U (en) | 2013-01-31 | 2013-01-31 | Peak detection circuit, input feedforward compensating circuit and power factor correction circuit |
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Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103117734A (en) * | 2013-01-31 | 2013-05-22 | 杭州士兰微电子股份有限公司 | Peak detection circuit, input feed-forward compensating circuit and power factor correction circuit |
| CN103560663A (en) * | 2013-11-06 | 2014-02-05 | 武汉理工大学 | Device and method for correcting power factor |
| CN104406641A (en) * | 2014-11-24 | 2015-03-11 | 天津商业大学 | Method and compensation system for detecting peak value of ultrasonic flow meter |
| CN104578850A (en) * | 2015-01-15 | 2015-04-29 | 东南大学 | Constant voltage control method and circuit for AC-DC converter output voltages |
| CN106646199A (en) * | 2016-12-30 | 2017-05-10 | 西安科技大学 | Circuit and method for detecting breaking arc discharging time of inductive circuit |
| CN106680575A (en) * | 2016-12-30 | 2017-05-17 | 西安科技大学 | Voltage leap detecting circuit and method |
| CN106707005A (en) * | 2017-03-01 | 2017-05-24 | 西安科技大学 | Circuit and method for detecting start-stop moment of disconnection arc of inductive circuit |
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2013
- 2013-01-31 CN CN201320062298XU patent/CN203086427U/en not_active Withdrawn - After Issue
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| CN103117734A (en) * | 2013-01-31 | 2013-05-22 | 杭州士兰微电子股份有限公司 | Peak detection circuit, input feed-forward compensating circuit and power factor correction circuit |
| CN103117734B (en) * | 2013-01-31 | 2016-05-04 | 杭州士兰微电子股份有限公司 | Peak detection circuit, input feedforward compensation circuit and circuit of power factor correction |
| CN103560663A (en) * | 2013-11-06 | 2014-02-05 | 武汉理工大学 | Device and method for correcting power factor |
| CN104406641A (en) * | 2014-11-24 | 2015-03-11 | 天津商业大学 | Method and compensation system for detecting peak value of ultrasonic flow meter |
| CN104406641B (en) * | 2014-11-24 | 2018-01-26 | 天津商业大学 | A kind of ultrasonic flowmeter peak-value detection method and compensation system |
| CN104578850A (en) * | 2015-01-15 | 2015-04-29 | 东南大学 | Constant voltage control method and circuit for AC-DC converter output voltages |
| CN104578850B (en) * | 2015-01-15 | 2017-10-31 | 东南大学 | A kind of constant pressure control method and its circuit of AC DC converter output voltages |
| CN106771531A (en) * | 2016-12-30 | 2017-05-31 | 西安科技大学 | Inductance disconnects electric arc start/stop time detection circuit and method |
| CN106680575A (en) * | 2016-12-30 | 2017-05-17 | 西安科技大学 | Voltage leap detecting circuit and method |
| CN106646199A (en) * | 2016-12-30 | 2017-05-10 | 西安科技大学 | Circuit and method for detecting breaking arc discharging time of inductive circuit |
| CN106771531B (en) * | 2016-12-30 | 2019-08-09 | 西安科技大学 | Inductance disconnects electric arc start/stop time detection circuit and method |
| CN106646199B (en) * | 2016-12-30 | 2019-08-09 | 西安科技大学 | Inductive circuit breaking arc discharge time detection circuit and method |
| CN106680575B (en) * | 2016-12-30 | 2019-08-09 | 西安科技大学 | Voltage jump detection circuit and method |
| CN106707005A (en) * | 2017-03-01 | 2017-05-24 | 西安科技大学 | Circuit and method for detecting start-stop moment of disconnection arc of inductive circuit |
| CN106707005B (en) * | 2017-03-01 | 2019-10-08 | 西安科技大学 | Inductive circuit disconnects electric arc start/stop time detection circuit and method |
| CN113406602A (en) * | 2021-05-21 | 2021-09-17 | 中山大学 | Pulse peak holding circuit and control method |
| CN113406602B (en) * | 2021-05-21 | 2024-04-26 | 中山大学 | Pulse peak hold circuit and control method |
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