CN203014671U - Power factor correcting circuit and input feedforward compensating circuit thereof - Google Patents
Power factor correcting circuit and input feedforward compensating circuit thereof Download PDFInfo
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- CN203014671U CN203014671U CN201220742812XU CN201220742812U CN203014671U CN 203014671 U CN203014671 U CN 203014671U CN 201220742812X U CN201220742812X U CN 201220742812XU CN 201220742812 U CN201220742812 U CN 201220742812U CN 203014671 U CN203014671 U CN 203014671U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Abstract
The utility model provides a power factor correcting circuit and an input feedforward compensating circuit thereof. The input feedforward compensating circuit comprises a peak value obtaining module used for obtaining a peak value of an input voltage or a signal of reflecting the peak value of the input voltage; a negating circuit connected with the peak value obtaining module and used for generating a DC signal inverse with the peak value change trend of the input voltage; and a superposed circuit connected with the negating circuit and used for superposing the DC signal and an output signal of an error amplification network in a control circuit of the power factor correction circuit. The power factor correcting circuit and the input feedforward compensating circuit thereof of the utility model can superpose the change information of the input voltage to the output of a control circuit adjusting ring directly when the input voltage mutates, so that a slower adjusting loop is avoided, and the problem is solved that an output voltage or an output current has a larger fluctuation due to the mutation of the input voltage.
Description
Technical field
The utility model relates to switch power technology, relates in particular to a kind of circuit of power factor correction and input feedforward compensation circuit thereof.
Background technology
Owing to having non-linear element and energy-storage travelling wave tube in the most power consumption equipment, therefore can make the input AC current waveform that serious distortion occurs, cause net side input power factor very low.In order to satisfy the harmonic requirement of international standard IEC61000-3-2, must add power factor correction (PFC) device in these power consumption equipments.
Thereby obtain higher power factor in order to suppress working frequency ripple wave, it is lower that the bandwidth of the control loop of conventional P FC circuit arranges usually, and lower loop bandwidth can cause the dynamic responding speed of pfc circuit slower.Take LED driver with high power factor (constant current output) as example, when input voltage has than great fluctuation process, because the output level Vcomp variation of regulation loop is slower, make output current Io larger overshoot be arranged or fall, as shown in Figure 1, thus the LED light that human eye is seen has obvious flicker.
The method of input voltage feed forward that often adopts some pfc circuits with permanent control function of power realizes that permanent power controls, and the dynamic response when input voltage changes relatively has some improvement, as shown in Figure 2.Mainly comprise: alternating-current voltage source 201, rectifier bridge 202, power circuit 203, ratio circuit 204, low pass filter 205, ratio circuit 206, ratio circuit 207, PWM modulator 208, electric current loop 209, multiplier 210, ratio circuit 211, Voltage loop 212.Wherein, power circuit 203 comprises inductance L, diode D, switching tube M and capacitor C, and capacitor C is configured to load RL in parallel.
Yet in control circuit shown in Figure 2, its input voltage feed forward is to realize by the mean value of Gather and input voltage, the low pass filter 205 that the mean value of Gather and input voltage Vin is introduced has reduced the response speed of loop, and is therefore, limited to the dynamic response improvement of input.
The utility model content
The technical problems to be solved in the utility model is to provide a kind of circuit of power factor correction and input feedforward compensation circuit thereof, can solve input voltage mutation and cause output voltage or electric current than the problem of great fluctuation process.
For solving the problems of the technologies described above, the utility model provides a kind of input feedforward compensation circuit of circuit of power factor correction, comprising:
The peak value acquisition module obtains the peak value of input voltage or reflects the signal of the peak value of described input voltage;
The negate circuit that is connected with described peak value acquisition module produces the direct current signal opposite with the peak change trend of described input voltage;
The supercircuit that is connected with described negate circuit, the output signal stack of the error in the control circuit of described direct current signal and circuit of power factor correction being amplified network.
According to an embodiment of the present utility model, described input voltage is via the voltage signal after rectifier bridge rectification in circuit of power factor correction.
According to an embodiment of the present utility model, described peak value acquisition module comprises:
Ratio circuit receives described input voltage and its amplitude is regulated;
The peak value acquisition cuicuit that is connected with described ratio circuit, the peak value of the input voltage after obtaining amplitude and regulating.
According to an embodiment of the present utility model, described peak value acquisition cuicuit comprises:
Bias voltage source;
Operational amplifier, its positive input terminal connects the output of described ratio circuit;
Comparator, its positive input terminal connects the positive input terminal of described bias voltage source, and its negative input end connects the positive input terminal of described operational amplifier;
Diode, the output of the described operational amplifier of its anodic bonding, its negative electrode connects the negative input end of described operational amplifier;
The first electric capacity, its first end connects the negative input end of described operational amplifier, its second end ground connection;
Inverter, its input connects the output of described operational amplifier;
The forward position acquisition cuicuit, its input connects the output of described inverter;
The first switch, its first end connects the first end of described the first electric capacity, and its second end connects the second end of described the second electric capacity, and its control end connects the output of described comparator;
Second switch, its first end connects the positive input terminal of described operational amplifier, and its control end connects the output of described forward position acquisition cuicuit;
The second electric capacity, its first end connects the second end of described second switch, its second end ground connection, the first end of described the second electric capacity is as the output of described peak value acquisition cuicuit.
According to an embodiment of the present utility model, described forward position acquisition cuicuit adopts RC circuit and logical circuit to realize.
According to an embodiment of the present utility model, described peak value acquisition cuicuit comprises:
The lowest point time detection circuit, its input connects the output of described ratio circuit, for detection of the lowest point time of described input voltage, produces pulse signal to locate the lowest point time of described input voltage;
Delay circuit, its input connects the output of described the lowest point time detection circuit, and described pulse signal is delayed time;
Sampling hold circuit is connected with the output of described ratio circuit and delay circuit, and the input voltage after under the pulse signal after time-delay is controlled, amplitude being regulated is sampled;
The ratio amplifying circuit, its input is connected with the output of described sampling hold circuit, and its output is as the output of described peak value acquisition cuicuit.
According to an embodiment of the present utility model, described sampling hold circuit comprises:
The 3rd switch, its control end connects the output of described delay circuit, and its first end connects the output of described ratio circuit, and its second end connects the input of described ratio amplifying circuit;
The 3rd electric capacity, its first end connects the second end of described the 3rd switch, its second end ground connection.
According to an embodiment of the present utility model, described negate circuit comprises: subtracter, and its positive input terminal receives default direct voltage, and its negative input end connects the output of described peak value acquisition module, the described direct current signal of its output output.
According to an embodiment of the present utility model, described supercircuit comprises: adder, and its first input end connects the output of described negate circuit, and its second input receives the output signal that the error in described control circuit is amplified network.
The utility model also provides a kind of circuit of power factor correction to comprise the described input feedforward compensation of above any one circuit.
Compared with prior art, the utlity model has following advantage:
The input feedforward compensation circuit of the utility model embodiment, maybe can embody the electrical quantity of input voltage peak change amount by the variable quantity that obtains the input voltage peak value, obtain the direct current signal opposite with input voltage peak change trend after in addition anti-phase, this direct current signal directly is superimposed upon the output of the error amplification network of control loop, thereby avoided control loop adjustment process slowly, output voltage or output current ground quick adjustment have been realized, when input voltage mutation, the less or ripple disable of output voltage or current fluctuation.Especially when output loading is the LED lamp, when input voltage fluctuation, LED lamp flicker free problem.
Description of drawings
Fig. 1 is the output current of a kind of pfc circuit of the prior art when input voltage is undergone mutation and the dynamic waveform of control ring output;
Fig. 2 is a kind of circuit theory diagrams that adopt the pfc circuit of conventional feed forward control in prior art;
Fig. 3 is the circuit theory diagrams of the input feedforward compensation circuit of the utility model embodiment;
Fig. 4 is the working waveform figure of input feedforward compensation circuit shown in Figure 3;
Fig. 5 is the circuit diagram of the first specific embodiment of the peak value acquisition cuicuit in Fig. 3;
Fig. 6 is the working waveform figure of peak value acquisition cuicuit shown in Figure 5;
Fig. 7 is the circuit diagram of the second specific embodiment of the peak value acquisition cuicuit in Fig. 3;
Fig. 8 is the working waveform figure of peak value acquisition cuicuit shown in Figure 7;
Fig. 9 shows the circuit diagram of the circuit of power factor correction of the utility model embodiment;
Figure 10 is the working waveform figure of circuit of power factor correction shown in Figure 9.
Embodiment
The utility model is described in further detail below in conjunction with specific embodiments and the drawings, but should not limit protection range of the present utility model with this.
With reference to figure 3 and Fig. 4, Fig. 4 shows the work wave of the input feedforward compensation circuit in Fig. 3.The input feedforward compensation main circuit of the present embodiment will comprise: peak value acquisition module 31, negate circuit 304, supercircuit 305.
Wherein, peak value acquisition module 31 connects the output of the rectifier bridge in circuit of power factor correction, obtains the peak value of input voltage.It will be appreciated by those skilled in the art that peak value acquisition module 31 can also obtain the signal of the peak value of reflection input voltage, perhaps obtain the electrical quantity of reflection input voltage peak change amount.
Need to prove, " peak value of input voltage " is not the voltage signal that refers to the peak point of proper input voltage herein, also comprise the voltage signal of input voltage in the preset range of peak point both sides, it is the voltage signal of peak value vicinity, the for example voltage signal in peak point preset in advance scope, the perhaps voltage signal in peak point hysteresis preset range.
Negate circuit 304 is connected with peak value acquisition module 31, produces the direct current signal opposite with the peak change trend of input voltage.Supercircuit 305 is connected with negate circuit 304, the output signal Vcomp that error in the control circuit of the direct current signal of negate circuit 304 output and circuit of power factor correction is amplified network 300 superposes, and the output of this supercircuit 305 can connect the rear class control circuit.
Wherein, it is parts of the control circuit (or control loop) of pfc circuit that error is amplified network 300, it can comprise comparator Ua, reference voltage source Vref and capacitor C 1, the negative input end of comparator Ua receives feedback voltage FB, the positive input terminal of comparator Ua connects the anode of reference voltage source Vref, the positive ending grounding of reference voltage source Vref, the first end of capacitor C 1 connects the output of comparator U, the second end ground connection.
Furthermore, as a nonrestrictive example, peak value acquisition module 31 can comprise ratio circuit 301 and peak value acquisition cuicuit 302.Wherein, ratio circuit 301 receives input voltage | and Vac| also regulates its amplitude.For example, ratio circuit 301 can be with the voltage of main circuit rectifier bridge output | and Vac| carries out ratio to be dwindled, with the requirement of the voltage magnitude that satisfies control circuit.Peak value acquisition cuicuit 302 is connected with ratio circuit 301, the peak K of the input voltage after obtaining amplitude and regulating * | Vac_pk|.
Negate circuit 304 can adopt subtracter to realize, its positive input terminal receives default direct voltage Vdc, its negative input end connects the output of peak value acquisition cuicuit 302, its output output direct current signal Vdc-K * | Vac_pk|, the variation tendency of this direct current signal is opposite with the peak change trend of input voltage.For example this direct voltage Vdc can be provided by direct voltage source 303, and the anode of DC power supply 303 connects the positive input terminal of subtracter 304, the negativing ending grounding of DC power supply 303.Certainly, it will be appreciated by those skilled in the art that and to adopt other suitable circuit to realize negate circuit 304, only need get final product opposite with the input signal variation tendency of signal of output.
Supercircuit 305 can adopt adder to realize, its first end connects the output of subtracter 304, the second termination is received the output signal Vcomp that error is amplified network 300, its output connects the rear class control circuit, export revised error amplification signal Vcomp ', to realize the compensation to the dynamic response of input voltage variation.The error amplification signal Vcomp ' that revises can be expressed as:
Vcomp'=Vcomp+Vdc-K×|Vac_pk|。
Certainly, it will be appreciated by those skilled in the art that and to adopt other circuit with overlaying function to realize supercircuit 305.
With reference to figure 5, as a nonrestrictive example that directly obtains the input voltage peak value, peak value acquisition cuicuit 302 can comprise: bias voltage source Vbias, operational amplifier Ub, comparator Uc, diode Dx1, the first capacitor C x1, inverter Ud, forward position acquisition cuicuit 51, the first switch S x1, second switch Sx2, the second capacitor C x2.
Ratio circuit 301(Fig. 3) positive input terminal of output concatenation operation amplifier Ub; The negative electrode of the negative input termination diode Dx1 of operational amplifier Ub, the first end of the first capacitor C x1 and the first end of the first switch S x1, the anode of the output terminating diode Dx1 of operational amplifier Ub, the second end ground connection of the first capacitor C x1, the second end ground connection of the first switch S x1; The negative input end of positive termination comparator Uc; The anode of the positive input termination bias voltage source Vbias of comparator Uc, the negativing ending grounding of bias voltage source Vbias, the positive input terminal of the negative input termination operational amplifier Ub of comparator Uc, the control end of output termination the first switch S x1 of comparator Uc; The output of the input termination operational amplifier Ub of inverter Ud, the input of the output termination forward position acquisition cuicuit 51 of inverter Ud, the control end of the output termination second switch Sx2 of forward position acquisition cuicuit 51, the positive input terminal of the first termination operational amplifier Ub of second switch Sx2, the first end of second termination the second capacitor C x2 of second switch Sx2, and as the output of peak value acquisition cuicuit 302, the other end ground connection of the second capacitor C x2.
Wherein, forward position acquisition cuicuit 52 can adopt RC circuit and logical circuit to realize.
The work wave of peak value acquisition cuicuit 302 shown in Figure 5 as shown in Figure 6, its main working process is as follows: operational amplifier Ub and diode Dx1 form peak-detector circuit, for detection of the peak value of input signal A; Comparator Uc is for generation of reset signal, and within each cycle, the reset signal that comparator Uc produces resets in the lowest point of input signal A the input peak signal B that peak-detector circuit detects, so that detect the input signal peak value in next cycle; Interval at t0 ~ t1, because input signal A amplitude is monotone increasing, the signal B of the peak-detector circuit output that operational amplifier Ub and diode Dx1 consist of follows input signal A and changes; At t1 constantly, input signal A has reached peak value, input signal A begins to descend afterwards, the positive input terminal signal of operational amplifier Ub is less than its negative input end signal, operational amplifier Ub plays the effect of comparator, output level produce one by high level to low level saltus step, this skip signal has reflected the peak of input voltage signal A; Therefore only need the output signal E of operational amplifier Ub is carried out the anti-phase signal F that obtains, obtain the control signal G of second switch Sx2 through the forward position that forward position acquisition cuicuit 51 takes out signal F; As seen from Figure 6, the high level forward position of control signal G is consistent with the peak of input voltage signal A, utilize control signal G with a bit of interval of second switch Sx2 conducting, obtain the level signal of input signal A peak value on the second capacitor C x2, and close at second switch Sx2 and have no progeny, this level signal is held; Bias voltage source Vbias is a level signal of setting, be used for comparing with input signal A, place, the lowest point at input signal A, as input signal A lower than bias voltage source Vbias amplitude, comparator Uc output high level makes the first switch S x1 conducting, the upper voltage B that keeps of the first capacitor C x1 is discharged into zero, thereby realized resetting to voltage B.
By the course of work of the specific embodiment of above-mentioned peak value acquisition cuicuit 302 as can be known, the groundwork principle of peak value acquisition cuicuit 302 is: operational amplifier Ub, diode Dx1, the first switch S x1 and the first capacitor C x1 consist of front stage circuits, second switch Sx2 and the second capacitor C x2 consist of late-class circuit, inverter Ud and forward position acquisition cuicuit are used in the sampled signal of input signal peak value place's generation late-class circuit, and comparator Uc is used for producing the reset signal of prime output signal; Front stage circuits is obtained the peak value of input signal, and by passing to late-class circuit and keep with the peak value of switch with the input signal that obtains at input signal peak value place, the output signal of front stage circuits is reset afterwards, waits for the peak value that obtains the input signal next cycle.
With reference to figure 7, as a nonrestrictive example that indirectly obtains the input voltage peak value, peak value acquisition cuicuit 302 can comprise: the lowest point time detection circuit 701, delay circuit 702, sampling hold circuit 703 and ratio amplifying circuit 704.
ratio circuit 301(Fig. 3) output connects the input of the lowest point time detection circuit 701, the input of the output termination delay circuit 702 of the lowest point time detection circuit 701, the control end of the 3rd switch S x3 in the output termination sampling hold circuit 703 of delay circuit 702, first termination ratio circuit 301(Fig. 3 of the 3rd switch S x3) output, the first end of the 3rd capacitor C x3 of the second termination sampling hold circuit 703 of the 3rd switch S x3 and the input of ratio amplifying circuit 704, the second end ground connection of the 3rd capacitor C x3, the output of ratio amplifying circuit 704 is the output of peak value acquisition cuicuit 302.
The work wave of peak value acquisition cuicuit 302 shown in Figure 7 as shown in Figure 8, its main working process is as follows:
The lowest point time detection circuit 701 detects the lowest point time of input voltage, and exports the lowest point time that a pulse signal H is used for locating detected input voltage; Default angle Td obtains the sampled signal I of sampling hold circuit 703 thereby the pulse signal H that delay circuit 702 is exported the lowest point time detection circuit 701 delays time, under the control of this sampled signal I, sampling hold circuit 703 is also sampled to the input signal of the 3rd switch S x3 first end.
The input signal of supposing the 3rd switch S x3 first end is purer half-sinusoid, and the cycle is T, and the input peak value is k|Vac_pk|, can obtain:
VJ=VC·sin(Td/T·π)=k|Vac_pk|·sin(Td/T·π)
Wherein VJ is the voltage magnitude at J place, and VC is the voltage magnitude at C place.The multiplication factor K2 of ratio amplifying circuit 704 is 1/sin (Td/T π) if make, and the voltage magnitude that can obtain the C place is:
VC=VJ·K2=k|Vac_pk|
From above-mentioned analysis as can be known, by detecting the voltage magnitude at input voltage waveform special angle place, can indirectly obtain the peak value of input voltage.
In the embodiment of peak value acquisition cuicuit 302 shown in Figure 7, the lowest point time detection circuit 601 can compare realization to the input voltage signal of peak value acquisition cuicuit 302 and the reference voltage of setting by comparator, also can adopt the analog circuit of other substantial equivalence or digital circuit to realize described function.Delay circuit 602 can adopt the substantial equivalence circuit such as RC time-delay or counter to realize described function.
Certainly; those skilled in the art as can be known; except the method that above-mentioned two kinds of embodiment characterize; peak value acquisition cuicuit 302 also can adopt the analog circuit of other substantial equivalence or digital circuit to realize above-mentioned functions, within the mode of taking and circuit all should be encompassed in protection range of the present utility model.
Fig. 9 shows the circuit of power factor correction of the present embodiment, and it has adopted input feed forward circuit shown in Figure 3.This circuit of power factor correction mainly comprises: alternating-current voltage source 201, rectifier bridge 202, power circuit 203, ratio circuit 206, ratio circuit 207, peak value acquisition module (comprising ratio circuit 301 and peak value acquisition cuicuit 302), negate circuit 304, supercircuit 305, error amplification network 300, ratio circuit 211, multiplier 210, electric current loop 209, PWM produce circuit 208.
Wherein, power circuit 203 comprises inductance L, diode D, switching tube M and capacitor C, and capacitor C is configured to load LEDs in parallel.ratio circuit 301 in the peak value acquisition module connects the positive output end of rectifier bridge 202, ratio circuit 211 is connected with output current sampling end Io, the output of supercircuit 305 connects the first input end of multiplier 210, the positive output end of the input termination rectifier bridge 202 of ratio circuit 206, the second input of the output termination multiplier 210 of ratio circuit 206, the input termination input current sampling end Iin of ratio circuit 207, the first input end of the output termination electric current loop 209 of ratio circuit 207, the second input of the output termination electric current loop 209 of multiplier 210, the output termination PWM of electric current loop 209 produces the input of circuit 208, the gate pole of switching tube M in the output termination power circuit 203 of PWM generation circuit 208.
Compare with traditional circuit of power factor correction shown in Figure 2, the output stack that the output of the feedforward compensation circuit in Fig. 9 is direct and error is amplified network 300, thereby avoided slower loop adjustment (being Voltage loop 212 in Fig. 2), therefore when fluctuation occurs in input voltage, load can obtain to regulate quickly, the basic ripple disable of output current, as shown in figure 10.
Shown in Figure 9 is only a specific embodiment of the present utility model, and the utility model also can be applicable to other main circuit structure circuit of power factor correction, as buck-boost PFC, buck PFC and f1yback PFC etc.Power Factor Correction Control in Fig. 9 has partly adopted the power factor correction control circuit with multiplier, in the middle of practical application, the utility model also can be in conjunction with the power factor correction control circuit of other structure, as permanent ON time control etc., enforcement of the present utility model is not limited by the concrete structure of main circuit and control circuit.
To sum up, adopt the input feedforward compensation circuit of the present embodiment, when in the time of can improving input voltage mutation, the fluctuation problem of output voltage or electric current, especially output loading are the LED lamp, when input voltage fluctuation, the technical scheme of the present embodiment can guarantee LED lamp flicker free problem.
Although the utility model with preferred embodiment openly as above; but it is not to limit the utility model; any those skilled in the art are not within breaking away from spirit and scope of the present utility model; can make possible change and modification, therefore protection range of the present utility model should be as the criterion with the scope that the utility model claim is defined.
Claims (10)
1. the input feedforward compensation circuit of a circuit of power factor correction, is characterized in that, comprising:
The peak value acquisition module obtains the peak value of input voltage or reflects the signal of the peak value of described input voltage;
The negate circuit that is connected with described peak value acquisition module produces the direct current signal opposite with the peak change trend of described input voltage;
The supercircuit that is connected with described negate circuit, the output signal stack of the error in the control circuit of described direct current signal and circuit of power factor correction being amplified network.
2. input feedforward compensation circuit according to claim 1, is characterized in that, described input voltage is via the voltage signal after rectifier bridge rectification in circuit of power factor correction.
3. input feedforward compensation circuit according to claim 1, is characterized in that, described peak value acquisition module comprises:
Ratio circuit receives described input voltage and its amplitude is regulated;
The peak value acquisition cuicuit that is connected with described ratio circuit, the peak value of the input voltage after obtaining amplitude and regulating.
4. input feedforward compensation circuit according to claim 3, is characterized in that, described peak value acquisition cuicuit comprises:
Bias voltage source;
Operational amplifier, its positive input terminal connects the output of described ratio circuit;
Comparator, its positive input terminal connects the positive input terminal of described bias voltage source, and its negative input end connects the positive input terminal of described operational amplifier;
Diode, the output of the described operational amplifier of its anodic bonding, its negative electrode connects the negative input end of described operational amplifier;
The first electric capacity, its first end connects the negative input end of described operational amplifier, its second end ground connection;
Inverter, its input connects the output of described operational amplifier;
The forward position acquisition cuicuit, its input connects the output of described inverter;
The first switch, its first end connects the first end of described the first electric capacity, and its second end connects the second end of described the second electric capacity, and its control end connects the output of described comparator;
Second switch, its first end connects the positive input terminal of described operational amplifier, and its control end connects the output of described forward position acquisition cuicuit;
The second electric capacity, its first end connects the second end of described second switch, its second end ground connection, the first end of described the second electric capacity is as the output of described peak value acquisition cuicuit.
5. input feedforward compensation circuit according to claim 4, is characterized in that, described forward position acquisition cuicuit adopts RC circuit and logical circuit to realize.
6. input feedforward compensation circuit according to claim 3, is characterized in that, described peak value acquisition cuicuit comprises:
The lowest point time detection circuit, its input connects the output of described ratio circuit, for detection of the lowest point time of described input voltage, produces pulse signal to locate the lowest point time of described input voltage;
Delay circuit, its input connects the output of described the lowest point time detection circuit, and described pulse signal is delayed time;
Sampling hold circuit is connected with the output of described ratio circuit and delay circuit, and the input voltage after under the pulse signal after time-delay is controlled, amplitude being regulated is sampled;
The ratio amplifying circuit, its input is connected with the output of described sampling hold circuit, and its output is as the output of described peak value acquisition cuicuit.
7. input feedforward compensation circuit according to claim 6, is characterized in that, described sampling hold circuit comprises:
The 3rd switch, its control end connects the output of described delay circuit, and its first end connects the output of described ratio circuit, and its second end connects the input of described ratio amplifying circuit;
The 3rd electric capacity, its first end connects the second end of described the 3rd switch, its second end ground connection.
8. input feedforward compensation circuit according to claim 1, is characterized in that, described negate circuit comprises:
Subtracter, its positive input terminal receives default direct voltage, and its negative input end connects the output of described peak value acquisition module, the described direct current signal of its output output.
9. input feedforward compensation circuit according to claim 1, is characterized in that, described supercircuit comprises:
Adder, its first input end connects the output of described negate circuit, and its second input receives the output signal that the error in described control circuit is amplified network.
10. a circuit of power factor correction, is characterized in that, comprises the described input feedforward compensation of any one circuit in claim 1 to 9.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201220742812XU CN203014671U (en) | 2012-12-28 | 2012-12-28 | Power factor correcting circuit and input feedforward compensating circuit thereof |
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| CN201220742812XU CN203014671U (en) | 2012-12-28 | 2012-12-28 | Power factor correcting circuit and input feedforward compensating circuit thereof |
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| CN203014671U true CN203014671U (en) | 2013-06-19 |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103066827A (en) * | 2012-12-28 | 2013-04-24 | 杭州士兰微电子股份有限公司 | Power factor correcting circuit and input feedforward compensating circuit thereof |
| CN103887970A (en) * | 2014-03-14 | 2014-06-25 | 上海电力学院 | Switching power source fixed on-time controller with external compensation |
| CN104852565A (en) * | 2014-02-13 | 2015-08-19 | 英飞凌科技奥地利有限公司 | Power factor corrector timing control with efficient power factor and THD |
| CN107134982A (en) * | 2016-02-29 | 2017-09-05 | 上海鸣志自动控制设备有限公司 | Increase the device of op-amp input voltage collection compensation offset voltage |
-
2012
- 2012-12-28 CN CN201220742812XU patent/CN203014671U/en not_active Withdrawn - After Issue
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103066827A (en) * | 2012-12-28 | 2013-04-24 | 杭州士兰微电子股份有限公司 | Power factor correcting circuit and input feedforward compensating circuit thereof |
| CN103066827B (en) * | 2012-12-28 | 2014-12-24 | 杭州士兰微电子股份有限公司 | Power factor correcting circuit and input feedforward compensating circuit thereof |
| CN104852565A (en) * | 2014-02-13 | 2015-08-19 | 英飞凌科技奥地利有限公司 | Power factor corrector timing control with efficient power factor and THD |
| CN104852565B (en) * | 2014-02-13 | 2017-11-24 | 英飞凌科技奥地利有限公司 | The SECO of power factor corrector with high-efficiency power factor and THD |
| CN103887970A (en) * | 2014-03-14 | 2014-06-25 | 上海电力学院 | Switching power source fixed on-time controller with external compensation |
| CN103887970B (en) * | 2014-03-14 | 2016-08-31 | 上海电力学院 | A kind of Switching Power Supply with external compensation fixes ON time controller |
| CN107134982A (en) * | 2016-02-29 | 2017-09-05 | 上海鸣志自动控制设备有限公司 | Increase the device of op-amp input voltage collection compensation offset voltage |
| CN107134982B (en) * | 2016-02-29 | 2023-08-11 | 上海鸣志自动控制设备有限公司 | Device for increasing input voltage acquisition compensation operational amplifier offset voltage of operational amplifier |
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