CN203014787U - Transmitting terminal circuit for high-speed digital communications - Google Patents
Transmitting terminal circuit for high-speed digital communications Download PDFInfo
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- CN203014787U CN203014787U CN 201220725212 CN201220725212U CN203014787U CN 203014787 U CN203014787 U CN 203014787U CN 201220725212 CN201220725212 CN 201220725212 CN 201220725212 U CN201220725212 U CN 201220725212U CN 203014787 U CN203014787 U CN 203014787U
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Abstract
The utility model discloses a transmitting terminal circuit for high-speed digital communications, including: a voltage buffer unit, a negative feedback unit and a feedforward unit. The voltage buffer unit comprises a voltage follower and also comprises an input terminal, a first output terminal and a second output terminal. The input terminal inputs a data signal into the voltage buffer unit. The first output terminal outputs an output signal used as the data signal following signal. The second output terminal outputs a component signal. The negative feedback unit is used for negative voltage feedback of the voltage buffer unit. The feedforward unit is used for feeding forward the component signal to the first output terminal under the condition of high frequency. The transmitting terminal circuit for high-speed digital communications can be adopted to realize high-speed data transmission, has strong drive capability, is suitable for loading large transmitting terminals, can drive a collector's open circuit or a drain electrode's open circuit to obtain large current output, has a simple structure, and is easy to manufacture.
Description
Technical field
The utility model relates to digital telecommunication circuit, more specifically, is a kind of transmitting terminal circuit for high-speed digital communication.
Background technology
Along with high-speed digital communication use increasingly extensive, requirements at the higher level have been proposed integrated circuit related with same, for example at a high speed, the considering of low-power consumption and low-cost aspect.As the part of high-speed digital communication integrated circuit, for the transmitting terminal circuit, weigh between high speed and driving force, in the application that needs High-current output, especially true.
Simultaneously, for being easy to the semiconductor technology manufacturing, the simple high-speed driving circuit of project organization is striving direction in the industry all the time.
Therefore, need a kind of high speed data transfer that is fit to of design, driving force is stronger, and transmitting terminal circuit simple in structure.
The utility model content
The purpose of this utility model is to provide a kind of high speed data transfer and strong transmitting terminal circuit that is used for high-speed digital communication of driving force of being applicable to.
For achieving the above object, the utility model provides a kind of transmitting terminal circuit for high-speed digital communication, comprising:
The voltage buffer cell, this voltage buffer cell comprises a voltage follower, and comprise an input terminal, first lead-out terminal and second lead-out terminal, this input terminal is inputted this voltage buffer cell with data-signal, the output signal of signal is followed in this first lead-out terminal output as this data-signal, and this second lead-out terminal output component signal;
The negative feedback unit, this negative feedback unit is used for this voltage buffer cell is carried out the voltage negative feedback; And
Feed forward element, this feed forward element are used under high frequency condition, this component signal being feedovered to this first lead-out terminal.
Preferably, described voltage buffer cell comprises the bias unit for this voltage follower of biasing.
Preferably, described bias unit is current source circuit.
Preferably, described voltage follower is for penetrating a grade follower.
Preferably, described voltage follower comprises that is followed a triode, and wherein, this base stage of following triode is connected with this input terminal, this emitter of following triode is connected with this first lead-out terminal, and this collector electrode of following triode is connected with this second lead-out terminal.
Preferably, described negative feedback unit comprises a negative feedback triode, wherein, the base stage of this negative feedback triode is connected with described emitter of following triode, the collector electrode of this negative feedback triode is connected with described base stage of following triode, and the launching base grounding connection of this negative feedback triode.
Preferably, described feed forward element comprises the first biasing resistor, the second biasing resistor, inverter and capacitor, wherein,
This first biasing resistor is connected with described collector electrode of following triode, is used for providing the first bias voltage;
This second biasing resistor is connected with described emitter of following triode, is used for providing the second bias voltage;
The input of this inverter is connected with described collector electrode of following triode, is used for carrying out anti-phase to component signal;
The two ends of this capacitor are connected with described the first lead-out terminal with the output of this inverter respectively, are used for high-frequency signal is delivered to described the first lead-out terminal.
Preferably, described voltage follower is source follower.
Preferably, described the first lead-out terminal further is connected with an open-collector gate.
Preferably, described the first lead-out terminal further is connected with an open-drain door.
The utility model also provides a kind of transmitting terminal circuit for high-speed digital communication of the differential form of foregoing circuit, comprising:
the voltage buffer cell, this voltage buffer cell comprises the first voltage follower and the second voltage follower that consists of differential form, and comprise first differential input terminal, second differential input terminal, a first differential output terminal, a second differential output terminal, first differential component output terminal and second differential component output terminal, this the first differential input terminal is inputted this first voltage follower with the first differential data signal, this the second differential input terminal is inputted this second voltage follower with the second differential data signal, the first differential output signal of signal is followed in this first differential output terminal output as this first differential data signal, the second differential output signal of signal is followed in this second differential output terminal output as this second differential data signal, this the first differential component output terminal output first differential component signal, this the second differential component output terminal output second differential component signal,
The negative feedback unit, this negative feedback unit comprises the first negative feedback subelement and the second negative feedback subelement, wherein, this the first negative feedback subelement is used for this first voltage follower is carried out the voltage negative feedback, and this second negative feedback subelement is used for this second voltage follower is carried out the voltage negative feedback; And
Feed forward element, this feed forward element comprises the first feedforward subelement and the second feedforward subelement, wherein, this the first feedforward subelement is used for this first differential component signal is feedovered to this second differential output terminal, and this second feedforward subelement is used for this second differential component signal feedforward to this first differential output terminal.
Preferably, described voltage buffer cell also comprises the current source circuit that is used to described the first voltage follower and second voltage follower that biasing is provided.
Preferably, described the first voltage follower and described second voltage follower are emitter follower.
Preferably, described the first negative feedback subelement comprises first a negative feedback triode, and described the second negative feedback subelement comprises second a negative feedback triode.
Preferably, described the first feedforward subelement comprises first capacitor, and described the second feedforward subelement comprises second capacitor.
Preferably, described the first voltage follower and described second voltage follower are source follower.
Transmitting terminal circuit for high-speed digital communication of the present utility model can be realized high speed data transfer, and driving force is strong, the transmitting terminal that suitable load is larger, and can drive open-collector gate or open-drain door acquisition High-current output, and simple in structure, be easy to make.
Description of drawings
Fig. 1 is the transmitting terminal circuit structured flowchart in one embodiment for high-speed digital communication of the present utility model;
Fig. 2 is a concrete circuit diagram of the transmitting terminal circuit for high-speed digital communication of the present utility model in Fig. 1;
Fig. 3 is improved circuit diagram in Fig. 2;
Fig. 4 is the transmitting terminal circuit structured flowchart in another embodiment for high-speed digital communication of the present utility model;
Fig. 5 is a concrete circuit diagram of the transmitting terminal circuit for high-speed digital communication of the present utility model in Fig. 4.
Embodiment
As shown in Figure 1, it is the structured flowchart of an execution mode of the transmitting terminal circuit for high-speed digital communication of the present utility model, as shown in the figure, signal is after pre-gain stage circuit 10 is amplified, and output digit signals in enters the transmitting terminal circuit 100 in this execution mode.The final output signal out that produces of transmitting terminal circuit 100.
As shown in the figure, in this embodiment, transmitting terminal circuit 100 comprises voltage buffer cell 110, negative feedback unit 120 and feed forward element 130.Particularly, voltage buffer cell 110 comprises a voltage follower 112, and comprise an input terminal 101, first lead-out terminal 102 and second lead-out terminal 103, input terminal 101 is with data-signal in input voltage buffer cell 110, the first lead-out terminal 102 outputs are followed the output signal out of signal as this data-signal in, and the second lead-out terminal 103 output component signals, below also will specifically describe, this component signal will feedover to output signal out as a compensating signal.Negative feedback unit 120 is used for this voltage buffer cell 110 is carried out the voltage negative feedback, so it adopts voltage negative feedback system and voltage buffer cell 110 to be in parallel.Feed forward element 130 is used under high frequency condition, this component signal being feedovered to this first lead-out terminal 102.
Theoretical according to negative feedback, the output node impedance of voltage negative feedback reduction system, and Current Negative Three-Point Capacitance increases the output node impedance; In parallel negative feedback reduction system input node impedance, and series connection negative feedback increase system input node impedance.Therefore, in this embodiment, due to the negative feedback unit 120 that has added the voltage parallel negative feedback type, make the impedance at negative feedback loop two ends reduce simultaneously.This means, the limit of feedback loop two end nodes all is pushed to high band, and this has expanded bandwidth, has reduced simultaneously the low-frequency gain of system.And, the introducing of feed forward element 130 can feedover the component signal by the second lead-out terminal 103 to output (the first lead-out terminal 102), so that output obtains the extra component under high frequency condition, thereby delayed the decay of signal under the high frequency, further expanded bandwidth.
In addition, as shown in Figure 1, voltage buffer cell 110 also comprises a bias unit 114 that is used for bias voltage follower 112.
Referring to Fig. 2, be that a kind of concrete circuit of execution mode in Fig. 1 is realized.In this concrete circuit, voltage follower 112 is one and penetrates a grade follower by what triode formed.And preferably, this bias unit 114 is the current source circuit of a routine.For the realization of negative feedback unit 120, in this concrete circuit, negative feedback unit 120 comprises a negative feedback triode.
Particularly, continuation is in conjunction with Fig. 2, voltage follower comprises that is followed a triode Q, wherein, this base stage of following triode Q is connected with input terminal 101, the emitter of following triode Q is connected with the first lead-out terminal 102, and the collector electrode of following triode Q is connected with the second lead-out terminal 103.Follow triode Q and current source CM1 and jointly complete the function that voltage cushions.In this voltage buffer cell, lead-out terminal 102 is also that " out " node is Low ESR.
In circuit as shown in Figure 2, negative feedback unit 120 comprises a negative feedback triode Qfb1, wherein, the base stage of negative feedback triode Qfb1 is connected with the emitter of following triode Q, the collector electrode of negative feedback triode Qfb1 is connected with the base stage of following triode Q, and the launching base grounding connection of negative feedback triode Qfb1.Qfb1 completes voltage parallel negative feedback function, and in negative feedback loop, " in " node is Low ESR.
Further, in this circuit, feed forward element 130 comprises the first biasing resistor R1, the second biasing resistor R2, inverter T1 and capacitor C1.Particularly, with reference to Fig. 2, the first biasing resistor R1 is connected with the collector electrode of following triode Q, is used for providing the first bias voltage; The second biasing resistor R2 is connected with the emitter of following triode Q, is used for providing the second bias voltage; The input of inverter T1 is connected with the collector electrode of following triode Q, is used for carrying out anti-phase to component signal; The two ends of capacitor C1 are connected with the first lead-out terminal 102 with the output of inverter T1 respectively, are used for high-frequency signal is delivered to the first lead-out terminal 102.In the feed forward element 130 of this circuit, inverter T1 can be only inverter functionality, also can be according to the needs of feedforward amount, have or high or low gain, through after anti-phase, signal and input signal homophase, feedover to output, this offsets to a certain extent in the signal attenuation of data-signal at high frequency treatment.Capacitor C1 makes feedforward path only work at high frequency treatment, and the parameter of C1 can be chosen according to the difference of communication frequency.In addition, for R2, under high frequency condition, the output impedance of Q1 increases, and R2 also can play the impact that the partial offset impedance increases.
In circuit shown in Figure 2, voltage follower Q1 is the emitter follower that is comprised of triode.Easily understand, voltage follower also can be source follower.Be that voltage follower can be the metal-oxide-semiconductor device, for example NMOS manages.Equally, at this moment, the voltage negative feedback unit also correspondingly is comprised of the metal-oxide-semiconductor device.
As shown in Figure 3, the first lead-out terminal further is connected with an open-collector gate Qout.In this circuit, similar with Fig. 2, triode Q1 and current source CM1 form the voltage buffer cell, and triode Qfb1 forms voltage parallel negative feedback unit, and R1, R2, T1 and C1 form feed forward element.Adopt open-collector gate, can produce large driven current density.
Similarly, in this embodiment, when circuit adopted the MOS device, open-collector gate can be replaced by the open-drain door.
To have an antijamming capability strong due to difference channel, and in actual applications, multiple high-speed communication physical layer protocol is the differential signal transmission that adopt also more.Therefore, the scheme in Fig. 1-3 also can adopt difference form to build.
As shown in Figure 4, be to adopt difference form to carry out improved structured flowchart to the scheme of Fig. 1.In this differential configuration, the first differential data signal in+ and the second differential data signal in-input respectively the transmitting terminal circuit 200 of this difference form as two input signals, transmitting terminal circuit 200 output the first differential output signal out+ and the second differential output signal out-.Particularly, in this embodiment, transmitting terminal circuit 200 comprises voltage buffer cell, negative feedback unit and the feed forward element of difference form.
particularly, voltage buffer cell 210, 220 comprise the first voltage follower 212 and the second voltage follower 222 that consists of differential form, and comprise first differential input terminal 201, second differential input terminal 202, a first differential output terminal 203, a second differential output terminal 204, 205 and second differential component output terminal 206 of first differential component output terminal, the first differential input terminal 202 is with first differential data signal in+ input the first voltage follower 212, the second differential input terminal 202 is with the second differential data signal in-input second voltage follower 222, the first differential output terminal 203 outputs are followed the first differential output signal out+ of signal as this first differential data signal in+, the second differential output terminal defeated 204 goes out the second differential output signal out-that follows signal as this second differential data signal in-, first differential component output terminal 205 output the first differential component signals, second differential component output terminal 206 output the second differential component signals.
The negative feedback unit comprises the first negative feedback subelement 230 and the second negative feedback subelement 240, wherein, the first negative feedback subelement 230 is used for the first voltage follower 212 is carried out the voltage negative feedback, and the second negative feedback subelement 240 is used for second voltage follower 222 is carried out the voltage negative feedback.
Feed forward element comprises the first feedforward subelement 250 and the second feedforward subelement 260, wherein, the first feedforward subelement 250 is used for the first differential component signal feedforward to the second differential output terminal 204, the second feedforward subelements 260 are used for the second differential component signal feedforward to the first differential output terminal 203.
Continuation is in conjunction with Fig. 4, and voltage buffer cell 210,220 also comprises the current source circuit 214,224 that is used to the first voltage follower 212 and second voltage follower 222 that biasing is provided.
As shown in Figure 5, be a kind of concrete circuit form of implementation of scheme in Fig. 4.This circuit form of implementation is the differential form of circuit in Fig. 2.In this embodiment, identical with Fig. 2 circuit, the first voltage follower and second voltage follower are emitter follower.Particularly, the first voltage follower and second voltage follower comprise respectively triode Q1, Q2.Wherein, the base stage of Q1 is connected with the first differential input terminal 201, and the emitter of Q1 is connected with the first differential output terminal 203, and the collector electrode of Q1 is connected with the first differential component output terminal 205; The base stage of Q2 is connected with the second differential input terminal 202, and the emitter of Q2 is connected with the second differential output terminal 204, and the collector electrode of Q2 is connected with the second differential component output terminal 206.
Easily understand, in the transmitting terminal circuit of this differential form, the first voltage follower and second voltage follower also can be for adopting the source follower of metal-oxide-semiconductor.
In execution mode shown in Figure 5, similar with Fig. 2, the first negative feedback subelement comprises first a negative feedback triode Qfb1, and the second negative feedback subelement comprises second a negative feedback triode Qfb2.Particularly, in this electric current, the base stage of the first negative feedback triode Qfb1 is connected with the emitter of triode Q1, and the collector electrode of Qfb1 is connected with the base stage of triode Q1, and its grounded emitter connects; The base stage of the second negative feedback triode Qfb2 is connected with the emitter of triode Q2, and the collector electrode of Qfb2 is connected with the base stage of triode Q2, and its grounded emitter connects.
In this embodiment, the first feedforward subelement comprises first a capacitor C1, the second feedforward subelement comprises second a capacitor C2 accordingly, and C1 and C2 are respectively used to high frequency component signal is transferred to the second differential output terminal 204 and the first differential output terminal 203.In addition, in the first feedforward subelement, also comprise biasing resistor R1, R2 for voltage bias, in the second feedforward subelement, comprise biasing resistor R3, R4.
The transmitting terminal circuit of above-mentioned various execution modes of the present utility model can be realized high speed data transfer, and driving force is strong, the transmitting terminal that suitable load is larger, and can drive open-collector gate or open-drain door acquisition High-current output, and simple in structure, be easy to make.
Claims (16)
1. a transmitting terminal circuit that is used for high-speed digital communication, is characterized in that, comprising:
The voltage buffer cell, this voltage buffer cell comprises a voltage follower, and comprise an input terminal, first lead-out terminal and second lead-out terminal, this input terminal is inputted this voltage buffer cell with data-signal, the output signal of signal is followed in this first lead-out terminal output as this data-signal, and this second lead-out terminal output component signal;
The negative feedback unit, this negative feedback unit is used for this voltage buffer cell is carried out the voltage negative feedback; And
Feed forward element, this feed forward element are used under high frequency condition, this component signal being feedovered to this first lead-out terminal.
2. the transmitting terminal circuit for high-speed digital communication according to claim 1, is characterized in that, described voltage buffer cell comprises the bias unit for this voltage follower of biasing.
3. the transmitting terminal circuit for high-speed digital communication according to claim 2, is characterized in that, described bias unit is current source circuit.
4. the transmitting terminal circuit for high-speed digital communication according to claim 1, is characterized in that, described voltage follower is for penetrating a grade follower.
5. the transmitting terminal circuit for high-speed digital communication according to claim 4, it is characterized in that, described voltage follower comprises that is followed a triode, wherein, this base stage of following triode is connected with this input terminal, this emitter of following triode is connected with this first lead-out terminal, and this collector electrode of following triode is connected with this second lead-out terminal.
6. the transmitting terminal circuit for high-speed digital communication according to claim 5, it is characterized in that, described negative feedback unit comprises a negative feedback triode, wherein, the base stage of this negative feedback triode is connected with described emitter of following triode, the collector electrode of this negative feedback triode is connected with described base stage of following triode, and the launching base grounding connection of this negative feedback triode.
7. the transmitting terminal circuit for high-speed digital communication according to claim 6, is characterized in that, described feed forward element comprises the first biasing resistor, the second biasing resistor, inverter and capacitor, wherein,
This first biasing resistor is connected with described collector electrode of following triode, is used for providing the first bias voltage;
This second biasing resistor is connected with described emitter of following triode, is used for providing the second bias voltage;
The input of this inverter is connected with described collector electrode of following triode, is used for carrying out anti-phase to component signal;
The two ends of this capacitor are connected with described the first lead-out terminal with the output of this inverter respectively, are used for high-frequency signal is delivered to described the first lead-out terminal.
8. the transmitting terminal circuit for high-speed digital communication according to claim 1, is characterized in that, described voltage follower is source follower.
9. the transmitting terminal circuit for high-speed digital communication according to claim 1, is characterized in that, described the first lead-out terminal further is connected with an open-collector gate.
10. the transmitting terminal circuit for high-speed digital communication according to claim 1, is characterized in that, described the first lead-out terminal further is connected with an open-drain door.
11. a transmitting terminal circuit that is used for high-speed digital communication is characterized in that, comprising:
the voltage buffer cell, this voltage buffer cell comprises the first voltage follower and the second voltage follower that consists of differential form, and comprise first differential input terminal, second differential input terminal, a first differential output terminal, a second differential output terminal, first differential component output terminal and second differential component output terminal, this the first differential input terminal is inputted this first voltage follower with the first differential data signal, this the second differential input terminal is inputted this second voltage follower with the second differential data signal, the first differential output signal of signal is followed in this first differential output terminal output as this first differential data signal, the second differential output signal of signal is followed in this second differential output terminal output as this second differential data signal, this the first differential component output terminal output first differential component signal, this the second differential component output terminal output second differential component signal,
The negative feedback unit, this negative feedback unit comprises the first negative feedback subelement and the second negative feedback subelement, wherein, this the first negative feedback subelement is used for this first voltage follower is carried out the voltage negative feedback, and this second negative feedback subelement is used for this second voltage follower is carried out the voltage negative feedback; And
Feed forward element, this feed forward element comprises the first feedforward subelement and the second feedforward subelement, wherein, this the first feedforward subelement is used for this first differential component signal is feedovered to this second differential output terminal, and this second feedforward subelement is used for this second differential component signal feedforward to this first differential output terminal.
12. the transmitting terminal circuit for high-speed digital communication according to claim 11 is characterized in that, described voltage buffer cell also comprises the current source circuit that is used to described the first voltage follower and second voltage follower that biasing is provided.
13. the transmitting terminal circuit for high-speed digital communication according to claim 11 is characterized in that, described the first voltage follower and described second voltage follower are emitter follower.
14. the transmitting terminal circuit for high-speed digital communication according to claim 13 is characterized in that, described the first negative feedback subelement comprises first a negative feedback triode, and described the second negative feedback subelement comprises second a negative feedback triode.
15. the transmitting terminal circuit for high-speed digital communication according to claim 14 is characterized in that, described the first feedforward subelement comprises first capacitor, and described the second feedforward subelement comprises second capacitor.
16. the transmitting terminal circuit for high-speed digital communication according to claim 11 is characterized in that, described the first voltage follower and described second voltage follower are source follower.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220725212 CN203014787U (en) | 2012-12-25 | 2012-12-25 | Transmitting terminal circuit for high-speed digital communications |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220725212 CN203014787U (en) | 2012-12-25 | 2012-12-25 | Transmitting terminal circuit for high-speed digital communications |
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| CN203014787U true CN203014787U (en) | 2013-06-19 |
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| CN 201220725212 Withdrawn - After Issue CN203014787U (en) | 2012-12-25 | 2012-12-25 | Transmitting terminal circuit for high-speed digital communications |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103036578A (en) * | 2012-12-25 | 2013-04-10 | 上海贝岭股份有限公司 | Transmitting terminal circuit for high speed digital communication |
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2012
- 2012-12-25 CN CN 201220725212 patent/CN203014787U/en not_active Withdrawn - After Issue
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103036578A (en) * | 2012-12-25 | 2013-04-10 | 上海贝岭股份有限公司 | Transmitting terminal circuit for high speed digital communication |
| CN103036578B (en) * | 2012-12-25 | 2014-11-12 | 上海贝岭股份有限公司 | Transmitting terminal circuit for high speed digital communication |
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| AV01 | Patent right actively abandoned |
Granted publication date: 20130619 Effective date of abandoning: 20141112 |
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| RGAV | Abandon patent right to avoid regrant |