CN203014670U - Audio frequency noise elimination circuit - Google Patents
Audio frequency noise elimination circuit Download PDFInfo
- Publication number
- CN203014670U CN203014670U CN2012207393883U CN201220739388U CN203014670U CN 203014670 U CN203014670 U CN 203014670U CN 2012207393883 U CN2012207393883 U CN 2012207393883U CN 201220739388 U CN201220739388 U CN 201220739388U CN 203014670 U CN203014670 U CN 203014670U
- Authority
- CN
- China
- Prior art keywords
- input
- selected cell
- current
- frequency noise
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn - After Issue
Links
Images
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Landscapes
- Rectifiers (AREA)
Abstract
The utility model discloses an audio frequency noise elimination circuit, which can be used to eliminate audio frequency noises generated by a power factor control circuit in a critical conduction state. The audio frequency noise elimination circuit comprises a reference current generation unit, a selection unit, a charging discharging unit, an OR gate unit, and a trigger unit. By using the audio frequency noise elimination circuit provided in the utility model, the audio frequency noises of the power factor correction control circuit working in the critical conduction state and the peak overshoot close to a zero-crossing of an input current can be eliminated.
Description
Technical field
The utility model relates to Active PFC control circuit field, more specifically, is a kind of circuit that is operated in the Active PFC control circuit audio-frequency noise of critical conduction mode for elimination.
Background technology
Factor correction refers to the power factor (PF) of circuit is proofreaied and correct, and makes it close to 1, and the energy that like this electrical network is obtained is as much as possible for acting, improves power consumption efficiency.The maximum instantaneous power of the rectified current of inactivity factor correction is that several times of Active PFC are arranged, this can increase the load of power supply grid greatly, and the electric power system of inactivity factor correction more easily causes the serious accidents such as fire than the electric power system that Active PFC is arranged.Therefore, under the consideration of green energy conservation safety, Active PFC has been widely used in illumination, TV, computer and various high-power electric appliance.
As shown in Figure 1, be the fundamental diagram of existing Active PFC control circuit, this circuit builds take controller as core, and power supply V wherein, is set in the periphery of controller
iFor system provides input voltage, it is the alternating current voltage that provides in power supply grid, input current I
iPower supply V
iOutput current.Signal carries out rectification, C through rectifier bridge
iBe high-frequency filter capacitor, be used for filter away high frequency noise.Rcs is current sampling resistor, is generally 0.25 ohm to 1.5 ohm.C
OBe output capacitance, the output voltage of whole system is V
O, be generally that the 100Hz amplitude is the AC ripple of 10V left and right for the direct current of 400V adds upper frequency.
Input voltage V
iAfter the rectifier bridge rectification, controller is sampled as the sinusoid fiducial signal of input current to it, and is shown in Figure 2.Suppose M
1Conducting is because M
1Conducting resistance and R
CSAll very little, M
1The voltage of drain terminal close to zero, output voltage V
OBe 400V, diode D
1Cut-off, the electric current on inductance L passes through M
1Flow through R
CSThe inductance L left end is the input voltage after rectification, and the inductance L right-hand member is ground, and the electric current on inductance increases, i.e. R
CSOn voltage increase, work as R
CSOn voltage during greater than the voltage of sinusoid fiducial signal, I
CSSignal is 1, with M
1Turn-off.M
1During shutoff, inductive current can not suddenly change, M
1Drain terminal produce very high voltage, diode D
1Conducting, current direction load and C on inductance L
OBecause the maximum of input voltage Vi is 375V, less than M
1Drain terminal voltage 400V+0.7V, so the electric current on inductance L begins to reduce, when controller detected electric current on inductance and is reduced to zero, controller can produce a positive pulse signal, with M
1Open.So circulation, make the peak current on inductance follow the sinusoid fiducial signal intensity, and is shown in Figure 3.The sinusoid fiducial signal is the sampling after input voltage Vi rectification, and inductive current is that the input voltage of following after rectification changes, so input current I
iFollow input voltage V
iChange, power factor (PF) is proofreaied and correct.As shown in Figure 4, be there is no the input voltage of Active PFC and the schematic diagram of input current, wherein, 1 is input voltage V
i, 2 is input current I
iAs shown in Figure 5, be to carry out the input voltage of Active PFC and the schematic diagram of input current through above-mentioned Active PFC control circuit, wherein, 1 is input voltage V
i, 2 is input current I
iMore as can be known, through the Active PFC control circuit, make input current be proofreaied and correct, and finally power factor (PF) is proofreaied and correct from accompanying drawing.
On the other hand, international body has formulated a series of standard for the harmonic distortion of power supply, and for satisfying code requirement, the harmonic distortion of input current is less than specific value.A distortion that important component part is its zero crossing of Harmonics of Input distortion, it is caused by the high-frequency filter capacitor after rectifier bridge and rectifier bridge (as Ci in Fig. 1).Voltage after instantaneous line voltage is less than rectifier bridge on high-frequency filter capacitor and rectifier diode (D in as Fig. 1
1) during the conducting voltage sum, the input transient current is zero, causes harmonic distortion.
For the Active PFC control circuit that is operated in critical conduction mode, during greater than sinusoid fiducial voltage, power MOS pipe is (as M in Fig. 1 when the voltage on current sampling resistor
1) turn-off; When the electric current on inductance was zero, power MOS pipe was opened.Therefore, a major technique that reduces at present zero passage place's input current distortion is exactly near the sinusoid fiducial magnitude of voltage that increases zero passage.
But this technology has also caused some problems.Generally, the Active PFC control circuit can be worked when line voltage is 85V ~ 265V, and its input current distortion can be satisfied international norm.For same power factor correction circuit, the input current distortion of the input voltage of 265V is greater than the current distortion of 85V.In order to make maximum current harmonics distortion can satisfy international requirement, it is enough large that near the sinusoid fiducial magnitude of voltage the zero passage of increase is wanted.But, large sinusoid fiducial voltage can make circuit working when low line voltage, the power MOS pipe ON time is long near zero passage, switching frequency is less than 20KHz, audio-frequency noise appears, greatly affected the application in practice of Active PFC control circuit, also can cause whole circuit can't satisfy the EMI(electromagnetic interference near 20KHz) requirement; In addition, it can cause that near the input current of zero passage greater than desirable Sinusoidal Input Currents, the spike overshoot occurs, and this has not only increased the Harmonics of Input distortion, has reduced the operating efficiency of whole circuit.
Therefore, need at present a kind of technology to solve these problems, with the audio-frequency noise of elimination Active PFC control circuit generation and near the spike overshoot the input current zero passage, its line voltage at 85V ~ 265V can well be worked.
The utility model content
The purpose of this utility model is to solve the problem of the audio-frequency noise that produces at critical conduction mode in existing Active PFC control circuit, thereby provides a kind of audio-frequency noise of innovation to eliminate circuit.
Audio-frequency noise of the present utility model is eliminated circuit, be used for eliminating the audio-frequency noise that the power control circuit produces at critical conduction mode, this power control circuit comprises a controller, this controller is according to the current value of inductance in the magnitude of voltage of sampling resistor in this control circuit and this control circuit, export a current sample decision signal, the opening and turn-offing of power ratio control pipe, this audio-frequency noise are eliminated circuit and are comprised:
The reference current generation unit is for generation of a reference current;
Selected cell, this reference current flows to this selected cell, this selected cell comprises a selected cell input and a selected cell output, and, when first logical signal of this selected cell input input, this selected cell is exported this reference current by this selected cell output, and when one of this selected cell input input, second logical signal opposite with this first logical signal, this selected cell stops exporting this reference current by this selected cell output;
Charge/discharge unit, the first end of this charge/discharge unit is connected with this selected cell output, and the second end ground connection of this charge/discharge unit connects;
Or gate cell, should or gate cell comprise one first or door input, one second or door input and one or gate output terminal, wherein, this current sample decision signal be delivered to this first or the door input, this selected cell output with this second or input be connected;
trigger element, this trigger element comprises a reset terminal, an input end of clock, a forward output and an inverse output terminal, this reset terminal is connected with this or gate output terminal, zero current detection signal of this input end of clock access, logic control signal of this forward output output, and this inverse output terminal is connected with the input of this selected cell, wherein, by being detected, the electric current that flows through this inductance in this power control circuit obtains this zero current detection signal, and this logic control signal is used for driving opening and turn-offing of interior this power tube of this power control circuit.
Preferably, this trigger element is a d type flip flop, and the D input of this d type flip flop is connected with supply voltage.
Preferably, this selected cell comprises first switching tube and a second switch pipe,
When described the first logical signal of this selected cell input input, this first switching tube is opened, and this second switch pipe turn-offs simultaneously, makes to utilize the described reference current of described selected cell output output that described charge/discharge unit is charged;
When described the second logical signal of this selected cell input input, this first switching tube is closed, and this second switch pipe is opened simultaneously, makes this charge/discharge unit discharge by this second switch pipe.
Preferably, described the first switching tube is a PMOS pipe, described second switch Guan Weiyi NMOS pipe, this PMOS pipe is connected with the inverting input of described trigger element with the grid of this NMOS pipe, the drain electrode of this PMOS pipe and this NMOS pipe is connected with second or door input of the first end of described charge/discharge unit and described or gate cell, the source electrode of this PMOS pipe is by the described reference current of described reference current generation unit input, and the source ground of this NMOS pipe connects.
Preferably, described charge/discharge unit comprises a capacitor.
Preferably, described reference current generation unit comprises a reference current source and the PMOS current mirror that is connected with this reference current source.
Audio-frequency noise of the present utility model is eliminated circuit, can eliminate the audio-frequency noise of the Active PFC control circuit that is operated in critical conduction mode and near the spike overshoot the input current zero passage, optimize arrival current curve, thereby improved the operating efficiency of whole system.
Description of drawings
Fig. 1 is the schematic diagram of existing power control circuit;
Fig. 2 is the schematic diagram of the sinusoid fiducial signal of input current;
Fig. 3 is the variation schematic diagram of inductance peak current;
Fig. 4 is not for carrying out the input voltage of Active PFC and the waveform schematic diagram of input current;
Fig. 5 has adopted the input voltage of Active PFC and the waveform schematic diagram of input current;
Fig. 6 is the schematic diagram that audio-frequency noise of the present utility model is eliminated circuit;
Fig. 7 is the signal timing diagram in the utility model;
Fig. 8 when not using audio-frequency noise of the present utility model to eliminate circuit, near the voltage curve in the power control circuit zero passage of current sampling resistor;
When Fig. 9 eliminates circuit for employing audio-frequency noise of the present utility model, near the voltage curve in the power control circuit zero passage of current sampling resistor;
Figure 10 is the arrival current curve figure when not using audio-frequency noise of the present utility model to eliminate circuit;
Arrival current curve figure when Figure 11 eliminates circuit for employing audio-frequency noise of the present utility model.
Embodiment
Below in conjunction with accompanying drawing, structure composition and the operation principle of audio-frequency noise of the present utility model being eliminated circuit are elaborated.
In general, audio-frequency noise of the present utility model is eliminated circuit, is used for eliminating the audio-frequency noise that the power control circuit produces at critical conduction mode.In conjunction with Fig. 1, as previously discussed, the power control circuit comprises a controller, and this controller is according to sampling resistor R in control circuit
CSMagnitude of voltage and this control circuit in the current value of inductance L, export a current sample decision signal I
CS, power ratio control pipe M1 opening and turn-offing.
Particularly, with reference to Fig. 6, audio-frequency noise of the present utility model is eliminated circuit 100 and is comprised reference current generation unit 110, selected cell 120, charge/discharge unit 130 or gate cell 140 and trigger element 150.Below the composition of each unit is described in more detail.
Reference current generation unit 110 is for generation of a reference current I
ref, below also with more detailed description, reference current I
refBe used for after selected cell 120 is selected, charge/discharge unit 130 being carried out charging process.Reference current generation unit 110 can adopt conventional current source circuit to build.In execution mode as shown in Figure 6, the reference current generation unit comprises a reference current source 111 and the PMOS current mirror 112 that is connected with this reference current source.Wherein, this PMOS current mirror 112 comprises two PMOS pipes that breadth length ratio is identical, be MP1 and MP2, routinely, in current mirror aspect the connection of two metal-oxide-semiconductors, the grid of MP1 and MP2 is connected, the source electrode of MP1 and MP2 is connected with supply voltage VDD, the grid of MP1 and its drain electrode interconnection, and its drain electrode is connected to reference current source 111, and the drain electrode of MP2 is exported to selected cell 120 as the reference current output with reference current.
Certainly, easily understand, reference current generation unit 110 also can adopt the current source of other conventional structures, is used to selected cell 120 and charge/discharge unit 130 that stable reference current is provided.And aspect the arranging of PMOS current mirror 112, metal-oxide-semiconductor MP1 and MP2 also can select different breadth length ratios, and be electric current proportional current value with reference current source by the reference current of the drain electrode output of MP2 this moment.
As mentioned above, reference current I
refAfter generation, further flow to selected cell 120, selected cell 120 comprises a selected cell input 101 and a selected cell output 102, and, when selecting first logical signal of unit input 101 inputs, selected cell 120 is by selected cell output 102 output reference electric current I
ref, when selecting one of unit input 101 input, second logical signal opposite with this first logical signal, selected cell 120 stops exporting this reference current I by selected cell output 102
ref
Below also will describe in detail, this first logical signal and the second logical signal are provided by trigger element 150.And selected cell output 102 is connected with charge/discharge unit 130.In execution mode as shown in Figure 2, the first logical signal is logical zero,, when being input to selected cell input 101, selected cell 120 is charged by its output output reference electric current to charge/discharge unit 130; The second logical signal is logical one, and when being input to selected cell input 101, selected cell 120 stops the output reference electric current, and this moment, charge/discharge unit 130 discharged by this selected cell 120.
In execution mode as shown in Figure 6, selected cell 120 comprises first switching tube 121 and a second switch pipe 122, when selecting unit 120 input input the first logical signal, the first switching tube 121 is opened, second switch pipe 122 turn-offs simultaneously, makes to utilize the reference current of selected cell output 102 outputs that charge/discharge unit 130 is charged; When selecting unit input 101 input the second logical signal, the first switching tube 121 is closed, and second switch pipe 122 is opened simultaneously, makes charge/discharge unit 130 discharge by the second switch pipe.
More specifically, in this embodiment, the first switching tube 121 is a PMOS pipe MP3, second switch pipe 122 is a NMOS pipe MN1, PMOS pipe MP3 is connected with the grid of NMOS pipe MN1, form the selected cell input, below also will describe, its inverting input with trigger element 150 is connected; The drain electrode of MP3 and MN1 is connected with charge/discharge unit 130, below also will describe, and the drain electrode of two pipes is also connected to or an input of gate cell 140 (second or door input), and the source electrode of MP3 is by reference current generation unit 110 input reference electric current I
ref, and the source ground of MN1 connects.Therefore, adopt this setting, when " 0 ", MP3 opens when the logical signal that inputs to two metal-oxide-semiconductor grids, and MN1 turn-offs, thus the reference current conducting, and be delivered to charge/discharge unit 130 and charge; When the logical signal that inputs to two metal-oxide-semiconductor grids was " 1 ", MP3 turn-offed, and MN1 opens, thereby reference current turn-offs, and charge/discharge unit 130 discharges by MN1.
Be appreciated that selected cell 120 also can adopt other suitable set-up modes, the selection that reference current is opened or turn-offed to providing of charge/discharge unit 130 is provided, to control the action that discharges and recharges of charge/discharge unit 130.In addition, for the first switching tube 121 and second switch pipe 122 in present embodiment, also can select other suitable power devices to carry out switch motion.
As mentioned above, the output that charge/discharge unit 130 is used for according to selected cell 120 discharges and recharges action, and the first end of charge/discharge unit 130 is connected with selected cell output 102, and the second end ground connection of charge/discharge unit 130 connects.In execution mode as shown in Figure 6, charge/discharge unit comprises a capacitor C.
Or gate cell 140 comprises one first or door input 103, one second or door input 104 and one or gate output terminal 105, wherein, and current sample decision signal I
CSBe delivered to first or door input 103, selected cell output 102 is connected with second or input 104, below also will describe, or gate output terminal 105 is connected to the reset terminal of trigger element 150.
continuation is in conjunction with Fig. 6, trigger element 150 comprises a reset terminal R, an input end of clock CK, a forward output Q and an inverse output terminal, this reset terminal R is connected with this or gate output terminal 105, input end of clock CK accesses a zero current detection signal ZCD, this forward output Q exports a logic control signal DRIVER, and the input 101 of inverse output terminal and selected cell 120 is connected, wherein, in conjunction with Fig. 1, by being detected, the electric current that flows through this inductance L in this power control circuit obtains this zero current detection signal ZCD, and logic control signal DRIVER is used for opening and turn-offing of interior this power tube M1 of driving power factor controlling circuit.In this execution mode of the present utility model, DRIVER is that 1 o'clock M1 opens, and DRIVER is that 0 o'clock M1 turn-offs.With reference to Fig. 7, in this embodiment, zero current detection signal ZCD is a positive pulse signal of being exported by the zero current detection module.In conjunction with Fig. 1, this zero current detection module can detect the electric current that flows through inductance L, and when the electric current that flows through inductance L was zero, the zero current detection module was exported a positive pulse signal.
Below in conjunction with Fig. 1, Fig. 6-11, take the embodiment shown in Fig. 6 as example, the operation principle of noise canceller circuit of the present utility model is elaborated.
The breadth length ratio of supposing current mirror MP1 in Fig. 6 and MP2 equates, the charging current of capacitor C is I
refVoltage on capacitor C is V
C, in the situation that ICS is zero, suppose to work as V
CGreater than V
CRThe time (V
CRThe threshold voltage that d type flip flop can be resetted for capacitor C), or a door output reset signal R is 1, and d type flip flop resets, and makes capacitor C be charged to V from zero
CRTime be T1:
T1=(C*V
CR)/I
ref(formula 1)
After d type flip flop resetted, the positive of d type flip flop was output as 0, anti-phasely was output as 1.Capacitor C begins rapid discharge, and when the breadth length ratio of MN1 was enough large, be the ns level discharge time, and can ignore this discharge time.
Can know according to the schematic diagram of Fig. 6, when ICS be 1 or capacitor C on voltage greater than V
CRThe time, d type flip flop resets, and Q is set to 0,, power MOS pipe turn-offs, and anti-phase output is set to 1, MN1 and opens, and MP3 turn-offs, and capacitor C sparks, and on capacitor C, voltage instantaneous is zero.Power MOS pipe closes has no progeny, and the voltage on current sampling resistor is zero, and the electric current of the inductance L in Fig. 1 can not suddenly change, and power MOS pipe M1 drain terminal voltage instantaneous increases, and makes diode D1 conducting, and inductive current is to output capacitance C
OCharging.Due to V
OGreater than Vi, inductive current begins to reduce; When the electric current on inductive current is decreased to zero, the zero current detection module produces positive pulse signal ZCD, the Q of the d type flip flop in Fig. 6 is put 1, this DRIVER signal orders about power MOS pipe M1(with reference to Fig. 1) open, the anti-phase output of d type flip flop is at this moment zero, MN1 turn-offs, and MP3 opens, and capacitor C begins charging.The curve relation figure of each signal as shown in Figure 7.
This shows, the voltage on capacitor C is charged to reset threshold voltage V after power MOS pipe M1 opens
CRTime be the T1 that fixes.T1 is with size and the reset threshold voltage V of reference current Iref, capacitor C
CRRelevant.Reset threshold voltage V
CRBe fixed value, be the conducting voltage of NMOS pipe, the size of adjusting Iref, C can determine the size of T1.
Near the input voltage zero passage, input voltage is very little, and output voltage V
OVery high, the electric current on inductance is reduced to zero soon, and the ZCD positive pulse signal is opened power MOS pipe M1 again.Therefore, the turn-off time of the power MOS pipe M1 input voltage zero passage near is very short with respect to its opening time, can ignore, can find out that by Fig. 8 and Fig. 9 voltage on current sampling resistor is that time of zero is almost nil, the switching frequency of the power MOS pipe M1 the input voltage zero passage near is exactly the inverse of the ON time of power MOS pipe M1.Harmonics of Input distortion when reducing high line voltage needs to increase near the sinusoid fiducial magnitude of voltage zero passage, when near the sinusoid fiducial magnitude of voltage that increases zero passage is larger, can make the switching frequency of the M1 zero passage near less than 20KHz, i.e. R
CSOhmically voltage greater than time of zero greater than 0.05ms, as shown in Figure 8.Adopt the circuit in the utility model, the minimal switching frequency of near zero-crossing point is 1/T1, as shown in Figure 9, if 1/T1 greater than 20KHz, the minimal switching frequency of M1 is also greater than 20KHz.
With reference to Fig. 1, for the Active PFC controller of critical conduction mode, in the situation that do not increase sinusoid fiducial voltage, its power MOS pipe M1 switching frequency is greater than 40KHz, this moment, the switch of power MOS pipe was controlled by ZCD and ICS, and input current is followed sinusoidal input voltage and changed; At the input voltage near zero-crossing point that has increased sinusoid fiducial voltage, during greater than T1, the voltage of capacitor C is greater than V when near the power MOS pipe ON time the input voltage zero passage
CR, d type flip flop resets, and power MOS pipe is turn-offed, so the minimum value of its MOS switching frequency is 1/T1, and 1/T1 is greater than 20KHz, and the switch audio-frequency noise of power MOS pipe is eliminated, as shown in Figure 9.Preferably, 1/T1 can be set between 24KHz ~ 35KHz.
Near the input voltage zero passage, when power MOS pipe M1 ON time was long, spike can appear in input current, and as shown in figure 10, this moment, the operating efficiency of whole system reduced, and the Harmonics of Input distortion increases.The circuit that the utility model provides shortens the ON time of the power MOS pipe M1 the input voltage zero passage near, has reduced current sampling resistor R
CSOn current peak, input current is current sampling resistor R
CSOn half of current peak, so near the spike overshoot the input current zero passage is eliminated, specifically as shown in figure 11.
In sum, audio-frequency noise of the present utility model is eliminated circuit, can eliminate the audio-frequency noise of the Active PFC control circuit that is operated in critical conduction mode and near the spike overshoot the input current zero passage, optimized arrival current curve, improve the operating efficiency of whole system, make the Active PFC control circuit can well realize the function of Active PFC under various occasions.
Claims (6)
1. an audio-frequency noise is eliminated circuit, be used for eliminating the audio-frequency noise that the power control circuit produces at critical conduction mode, this power control circuit comprises a controller, this controller is according to the current value of inductance in the magnitude of voltage of sampling resistor in this control circuit and this control circuit, export a current sample decision signal, opening and turn-offing of power ratio control pipe is characterized in that, this audio-frequency noise is eliminated circuit and comprised:
The reference current generation unit is for generation of a reference current;
Selected cell, this reference current flows to this selected cell, this selected cell comprises a selected cell input and a selected cell output, and, when first logical signal of this selected cell input input, this selected cell is exported this reference current by this selected cell output, and when one of this selected cell input input, second logical signal opposite with this first logical signal, this selected cell stops exporting this reference current by this selected cell output;
Charge/discharge unit, the first end of this charge/discharge unit is connected with this selected cell output, and the second end ground connection of this charge/discharge unit connects;
Or gate cell, should or gate cell comprise one first or door input, one second or door input and one or gate output terminal, wherein, this current sample decision signal be delivered to this first or the door input, this selected cell output with this second or input be connected;
trigger element, this trigger element comprises a reset terminal, an input end of clock, a forward output and an inverse output terminal, this reset terminal is connected with this or gate output terminal, zero current detection signal of this input end of clock access, logic control signal of this forward output output, and this inverse output terminal is connected with the input of this selected cell, wherein, by being detected, the electric current that flows through this inductance in this power control circuit obtains this zero current detection signal, and this logic control signal is used for driving opening and turn-offing of interior this power tube of this power control circuit.
2. audio-frequency noise according to claim 1 is eliminated circuit, it is characterized in that, this trigger element is a d type flip flop, and the D input of this d type flip flop is connected with supply voltage.
3. audio-frequency noise according to claim 1 is eliminated circuit, it is characterized in that, this selected cell comprises first switching tube and a second switch pipe,
When described the first logical signal of this selected cell input input, this first switching tube is opened, and this second switch pipe turn-offs simultaneously, makes to utilize the described reference current of described selected cell output output that described charge/discharge unit is charged;
When described the second logical signal of this selected cell input input, this first switching tube is closed, and this second switch pipe is opened simultaneously, makes this charge/discharge unit discharge by this second switch pipe.
4. audio-frequency noise according to claim 3 is eliminated circuit, it is characterized in that, described the first switching tube is a PMOS pipe, described second switch Guan Weiyi NMOS pipe, this PMOS pipe is connected with the inverting input of described trigger element with the grid of this NMOS pipe, the drain electrode of this PMOS pipe and this NMOS pipe is connected with second or door input of the first end of described charge/discharge unit and described or gate cell, the source electrode of this PMOS pipe is by the described reference current of described reference current generation unit input, and the source ground of this NMOS pipe connects.
5. audio-frequency noise according to claim 1 is eliminated circuit, it is characterized in that, described charge/discharge unit comprises a capacitor.
6. audio-frequency noise according to claim 1 is eliminated circuit, it is characterized in that, described reference current generation unit comprises a reference current source and the PMOS current mirror that is connected with this reference current source.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012207393883U CN203014670U (en) | 2012-12-28 | 2012-12-28 | Audio frequency noise elimination circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012207393883U CN203014670U (en) | 2012-12-28 | 2012-12-28 | Audio frequency noise elimination circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203014670U true CN203014670U (en) | 2013-06-19 |
Family
ID=48606226
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2012207393883U Withdrawn - After Issue CN203014670U (en) | 2012-12-28 | 2012-12-28 | Audio frequency noise elimination circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203014670U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103051170A (en) * | 2012-12-28 | 2013-04-17 | 上海贝岭股份有限公司 | Audio-frequency noise eliminating circuit |
| CN108923639A (en) * | 2018-08-28 | 2018-11-30 | 南京微盟电子有限公司 | A kind of circuit for eliminating primary side feedback Switching Power Supply audio-frequency noise |
| CN110504848A (en) * | 2019-07-24 | 2019-11-26 | 上海源微电子科技有限公司 | A kind of input current peak value modulator approach of Switching Power Supply |
-
2012
- 2012-12-28 CN CN2012207393883U patent/CN203014670U/en not_active Withdrawn - After Issue
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103051170A (en) * | 2012-12-28 | 2013-04-17 | 上海贝岭股份有限公司 | Audio-frequency noise eliminating circuit |
| CN103051170B (en) * | 2012-12-28 | 2015-06-03 | 上海贝岭股份有限公司 | Audio-frequency noise eliminating circuit |
| CN108923639A (en) * | 2018-08-28 | 2018-11-30 | 南京微盟电子有限公司 | A kind of circuit for eliminating primary side feedback Switching Power Supply audio-frequency noise |
| CN110504848A (en) * | 2019-07-24 | 2019-11-26 | 上海源微电子科技有限公司 | A kind of input current peak value modulator approach of Switching Power Supply |
| CN110504848B (en) * | 2019-07-24 | 2021-07-16 | 上海源微电子科技有限公司 | Input current peak value modulation method of switching power supply |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US20180062504A1 (en) | Power factor correction device and controlling method thereof, and electronic device | |
| CN103675426B (en) | Inductive current zero-crossing detection method, circuit and switch power supply with circuit | |
| CN106100373B (en) | The high frequency CRM boost PFC converters of adaptive optimization THD | |
| CN104038045B (en) | high power factor correction control circuit and device | |
| CN103458579A (en) | Load driving circuit and method | |
| CN104470158B (en) | Buck configuration LED drive circuit and its constant-current driver and method for designing | |
| CN103401442B (en) | A kind of digitial controller of the AC-DC isolated converter based on output constant current | |
| CN106253662B (en) | Switch converters determine frequency V2C dynamic afterflow control methods and its control device | |
| CN101976958A (en) | High-efficiency power regulating device based on power factor correction | |
| CN103178712A (en) | Device and method for suppressing low-frequency fluctuation of pulse-cycle skip modulation switching converter | |
| CN109660132A (en) | A kind of device of inhibition bis- times of working frequency ripple waves of PFC of voltage-type COT control | |
| CN203014670U (en) | Audio frequency noise elimination circuit | |
| CN106787669A (en) | A kind of digital control Active Power Factor Correction Converter of boost type | |
| CN205070828U (en) | AC -DC single -stage control chip and control system thereof | |
| CN107277966A (en) | One kind is used for high power factor LED drive power switching frequency limiting circuit | |
| CN111342684B (en) | Single-phase three-level Buck PFC rectifier and control method thereof | |
| CN105186861B (en) | Pseudo- continuous conduction mode switch converters determine afterflow Duty ratio control method and its device | |
| CN103051170B (en) | Audio-frequency noise eliminating circuit | |
| CN110831284B (en) | LED driving power supply and controller thereof | |
| CN102711330B (en) | Rapid reaction energy balancing calculation technology-based light-emitting diode (LED) driving method and system | |
| CN201557044U (en) | Frequency limited circuit capable of controlling power factor correcting circuit via critical current | |
| CN104009631B (en) | Buck-type power factor converter for eliminating dead zone through pulse auxiliary method | |
| CN203434855U (en) | Control circuit applied to power factor correction circuit | |
| CN112968597B (en) | Single-period control method of power factor correction circuit in continuous mode | |
| CN112787338B (en) | Synchronous zero-crossing switch circuit for power capacitor |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20130619 Effective date of abandoning: 20150603 |
|
| RGAV | Abandon patent right to avoid regrant |