CN110504848B - Input current peak value modulation method of switching power supply - Google Patents
Input current peak value modulation method of switching power supply Download PDFInfo
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- CN110504848B CN110504848B CN201910672028.2A CN201910672028A CN110504848B CN 110504848 B CN110504848 B CN 110504848B CN 201910672028 A CN201910672028 A CN 201910672028A CN 110504848 B CN110504848 B CN 110504848B
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/625—Regulating voltage or current wherein it is irrelevant whether the variable actually regulated is ac or dc
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
- H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
- H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
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Abstract
The invention provides an input current peak value modulation method of a switching power supply, which is based on a boost switching power supply driving circuit; one end of the charge and discharge inductor L1 is connected with the direct-current voltage Vin, and the other end is connected with the drain electrode of the switch MOS tube M1; one end of the output capacitor C3 is connected with the VCC end of the driving chip T1; the Gate of the switching MOS transistor M1 is connected with the Gate of the driving chip T1, and the source is connected with the CS end of the driving chip T1; one end of the current detection resistor Rs is connected with the source electrode of the switch MOS tube M1; the input current modulation circuit K2 includes an operational amplifier G21; the non-inverting input terminal of the operational amplifier G21 is connected to the modulation reference voltage Vref _ dim; the value of the modulation reference voltage Vref _ dim is smaller than the saturation current of the inductor and the current detection resistor. The method has the advantages that the balance can be obtained between the peak current and the power factor of the inductor, and the peak value of the input current is greatly reduced under the condition of reducing a little power factor, so that the scheme cost and the volume of the switching power supply are saved; the operation is reliable and stable.
Description
Technical Field
The invention discloses an input current peak value modulation method of a switching power supply.
Background
The power supply module is a power supply for supplying power to an application-specific integrated circuit, a digital signal processor, a microprocessor, a memory, a field programmable gate array and other digital or analog loads, and is widely applied to the fields of switching equipment, access equipment, mobile communication, household appliances, industrial control and the like.
The switching power supply is different from a linear power supply, the switching power supply works in a conducting mode and a switching-off mode by switching the MOS tube, and the two modes have the characteristic of low power consumption, so that energy is saved, and the efficiency is high. Ideally, the switching power supply does not consume electric energy, and the voltage stabilization is achieved by adjusting the on and off time of the MOS transistor. In contrast, in the process of generating the output voltage by the linear power supply, the MOS transistor works in a saturation region and consumes power. The high conversion efficiency of the switching power supply is one of the great advantages, and thus the switching power supply is widely used.
When an ac power source such as a commercial power is inputted to the switching power source, the output of the switching power source is mostly a device requiring a dc power source, such as a personal computer, a charger, etc., and the switching power source performs voltage and current conversion between the two. The power factor of the switching power supply adopting the Power Factor Correction (PFC) power factor correction technology can be improved to 0.95-0.99, so that the harmonic pollution of a power grid is treated, and the overall efficiency of the power supply is improved. This technique, called active power factor correction APFC, has been widely used in the development and application of switching power supplies.
In switching power supply schemes with APFC technology, to achieve a high power factor, the input current is designed to closely follow the phase and amplitude of the input ac voltage, with the peak of the input current appearing at the peak of the input voltage. Meanwhile, the peak value of the input current becomes higher as the load increases. In the extreme case, i.e. when the effective value of the input ac voltage is minimum and the load is maximum, the amplitude of the input current is highest. In order to bear high peak value input current, the application scheme of the switching power supply has to adopt an inductor with high saturation current, so that the cost is sharply increased, the volume is expressed, and inconvenience is caused to many application schemes.
Disclosure of Invention
The invention provides an input current peak value modulation method of a switching power supply, which can balance inductance peak value current and power factors, and greatly reduce the peak value of the input current under the condition of reducing a little power factor, thereby saving the scheme cost and the volume of the switching power supply; the operation is reliable and stable; to overcome the disadvantages of the prior art.
The invention provides an input current peak value modulation method of a switching power supply, which is based on a boost switching power supply driving circuit; the boost switching power supply driving circuit comprises an input capacitor C1, an external capacitor C4, a charging and discharging inductor L1, a switching MOS tube M1, a current detection resistor Rs, an output capacitor C3 and a driving chip T1; the driving chip T1 has an HV terminal, a Vcc terminal, a Gate terminal, a CS terminal, a FB terminal, and a GND terminal; one end of the input capacitor C1 is connected with the direct-current voltage Vin, and the other end is grounded; one end of the charge and discharge inductor L1 is connected with the direct-current voltage Vin, and the other end is connected with the drain electrode of the switch MOS tube M1; the HV end of the driving chip T1 is connected with the direct-current voltage Vin; one end of the output capacitor C3 is connected with the VCC end of the driving chip T1, and the other end is grounded; one end of the external capacitor C4 is connected with the COMP end of the driving chip T1, and the other end is grounded; the Gate of the switching MOS transistor M1 is connected with the Gate of the driving chip T1, and the source is connected with the CS end of the driving chip T1; one end of the current detection resistor Rs is connected with the source electrode of the switch MOS transistor M1, and the other end of the current detection resistor Rs is grounded; the input current peak value modulation method of the switching power supply comprises the following steps: the constant-voltage control circuit K1, the input current modulation circuit K2, the logic control circuit K3, the zero-crossing current detection circuit K4, the MOS tube driving circuit K5 and the low-voltage power supply circuit K6; the low-voltage power supply circuit K6 inputs high voltage from the HV end and outputs low voltage to the Vcc end; one end of the input current modulation circuit K2 is connected with the CS end of the driving chip T1, and the other end is connected with one input end of the logic control circuit K3; the output end of the zero-crossing current detection circuit K4 is connected with the other input end of the logic control circuit K3; the constant voltage control circuit K1 is respectively connected with the FB end and the COMP end, and the output end is connected with the third input end of the logic control circuit K3; the output end of the logic control circuit K3 is connected with the input end of the MOS tube driving circuit K5; the output end of the MOS tube driving circuit K5 is connected with the GATE end and the zero-crossing current detection circuit K4; the input current modulation circuit K2 includes an operational amplifier G21; the positive phase input end of the operational amplifier G21 is connected with the modulation reference voltage Vref _ dim, the negative phase input end is connected with the CS end of the driving chip T1, and the output end is connected with the logic control circuit K3; the value of the modulation reference voltage Vref _ dim is smaller than the product of the saturation current of the charge and discharge inductor L1 and the current detection resistor Rs.
Further, the present invention provides a method for modulating the peak value of the input current of the switching power supply, which may further have the following characteristics: the boost switching power supply driving circuit further comprises a freewheeling diode D2, a first voltage-dividing resistor R1 and a second voltage-dividing resistor R2; the anode of the freewheeling diode D2 is connected with the drain of the switching MOS tube M1, and the cathode is connected with one end of the first divider resistor R1; one end of the second divider resistor R2 is connected with the other end of the first divider resistor R1; the other end is grounded.
Further, the present invention provides a method for modulating the peak value of the input current of the switching power supply, which may further have the following characteristics: the FB terminal of the driving chip T1 is connected with the connection part of the first voltage-dividing resistor R1 and the second voltage-dividing resistor R2; the GND terminal of the driver chip T1 is grounded.
Further, the present invention provides a method for modulating the peak value of the input current of the switching power supply, which may further have the following characteristics: the boost switching power supply driving circuit further comprises an energy storage capacitor C2; the energy storage capacitor C2 is connected in parallel at two ends of the first divider resistor R1 and the second divider resistor R2; namely, one end is connected with one end of the first voltage-dividing resistor R1, and the other end is connected with the other end of the second voltage-dividing resistor R2.
Further, the present invention provides a method for modulating the peak value of the input current of the switching power supply, which may further have the following characteristics: the constant voltage control circuit K1 comprises an operational amplifier G11, an operational amplifier G12, a current source I13 and a capacitor C14; the positive phase input end of the operational amplifier G11 is connected with a constant voltage control reference voltage Vref _ cv, the negative phase input end is connected with the FB end of the driving chip T1, and the output end is connected with the COMP end; the input end of the current source I13 is connected with the VCC end, and the output end is connected with the negative phase input end of the operational amplifier G12; the positive phase input end of the operational amplifier G12 is connected with the COMP end, the output end is connected with the logic control circuit K3, and a constant voltage control signal norm _ off is output; one end of the capacitor C14 is connected to the negative phase input end of the operational amplifier G12, and the other end is grounded.
Further, the present invention provides a method for modulating the peak value of the input current of the switching power supply, which may further have the following characteristics: the logic control circuit K3 includes: a D flip-flop DFF and an OR gate OR; one input end of the OR gate is connected with the input current modulation circuit K2, the other input end of the OR gate is connected with the constant voltage control circuit K1, and the output end of the OR gate is connected with the R end of the D trigger DFF; the D end of the D trigger DFF is connected with the VCC end, and the CK end is connected with the zero-crossing current detection circuit K4; the Q end of the D trigger DFF is connected with the MOS tube driving circuit K5.
Further, the present invention provides a method for modulating the peak value of the input current of the switching power supply, which may further have the following characteristics: the MOS tube driving circuit K5 comprises: an inverter INV51, a MOS tube MP52, a MOS tube MN53 and a resistor R54; the input end of the inverter INV51 is connected with the logic control circuit K3; the output end of the MOS tube is connected with the grid of the MOS tube MN53 and the grid of the MOS tube MP 52; the source electrode of the MOS tube MP52 is connected with the VCC end; the drain electrode of the MOS transistor MN53 is connected with the drain electrode of the MOS transistor MP52, and the connection point is used as a GATE end; one end of the resistor R54 is connected with the source of the MOS transistor MN53, and the other end is connected with the GND end.
Drawings
Fig. 1 is a diagram of a boost switching power supply driving circuit in this embodiment.
Fig. 2 is a waveform diagram of current applied to the high power factor boost switching power supply in this embodiment.
Fig. 3 is a block schematic diagram of the driving chip in this embodiment.
Fig. 4 is a block circuit diagram of the driving chip in this embodiment.
Fig. 5 is a waveform diagram of the operation in the modulation mode without input current.
Fig. 6 is a waveform diagram of the operation in the input current modulation mode.
Fig. 7 is a waveform diagram of input current modulation of a high power factor boost switching power supply.
Reference numerals:
RL-load RL
Rs-current detection resistor
L1-Charge and discharge inductor
C1-input capacitance
C2-energy storage capacitor
C3-output capacitor
C4-external capacitor
T1-drive chip
M1-switching MOS tube
R1-first divider resistor
R2-second divider resistor
D2-free wheel diode
Vin-input rectified voltage
Im-current of inductor L1
Is-charging current of inductor L1
Id-discharge current of inductor L1
Im _ pk-inductance L1 peak current
Iout-output current
MOS _ ON-output signal of logic control circuit K3
drn-drain of MOS transistor M1
zcd-zero crossing signal of inductive current
Ipk _ off-peak current arrival signal
norm _ off-constant voltage control circuit output signal
K1-constant voltage control circuit
K2-input current modulation circuit
K3-logic control circuit
Vref _ dim-modulated reference voltage
Vref _ cv-constant voltage control reference voltage
dim _ off-input current modulation circuit output signal
Gate-MOS transistor M1 Gate drive signal
The specific implementation mode is as follows:
the invention is further described below with reference to the following figures and specific examples.
Fig. 1 is a diagram of a boost switching power supply driving circuit in this embodiment.
As shown in fig. 1, a boost switching power supply driving circuit includes a rectifier bridge, an input capacitor C1, an energy storage capacitor C2, an external capacitor C4, a charging/discharging inductor L1, a freewheeling diode D2, a first voltage-dividing resistor R1, a second voltage-dividing resistor R2, a switching MOS transistor M1, a current detection resistor Rs, an output capacitor C3, and a driving chip T1. The driver chip T1 has an HV terminal, a Vcc terminal, a Gate terminal, a CS terminal, a FB terminal, and a GND terminal.
The ac input ACin is rectified to output a dc voltage Vin. One end of the input capacitor C1 is connected to the dc voltage Vin, and the other end is connected to ground. One end of the charge and discharge inductor L1 is connected to the DC voltage Vin, and the other end is connected to the drain of the switch MOS transistor M1. The HV terminal of the driver chip T1 is connected to the dc voltage Vin. The anode of the freewheeling diode D2 is connected to the drain of the switching MOS transistor M1, and the cathode is connected to one end of the first voltage-dividing resistor R1. One end of the second divider resistor R2 is connected with the other end of the first divider resistor R1; the other end is grounded. The energy storage capacitor C2 is connected in parallel at two ends of the first divider resistor R1 and the second divider resistor R2; namely, one end is connected with one end of the first voltage-dividing resistor R1, and the other end is connected with the other end of the second voltage-dividing resistor R2.
One end of the output capacitor C3 is connected to the VCC terminal of the driver chip T1, and the other end is grounded. One end of the external capacitor C4 is connected to the COMP end of the driver chip T1, and the other end is grounded. The Gate of the switching MOS transistor M1 is connected to the Gate of the driver chip T1, and the source is connected to the CS terminal of the driver chip T1. One end of the current detection resistor Rs is connected with the source electrode of the switch MOS transistor M1, and the other end is grounded. The FB terminal of the driver chip T1 is connected to the connection of the first divider resistor R1 and the second divider resistor R2. The GND terminal of the driver chip T1 is grounded. The load RL is connected in parallel to two ends of the energy storage capacitor C2, that is, one end is connected to two output ends of the rectifier bridge.
As shown in fig. 1, the driver chip T1 and other external components form a boost switching power supply driving circuit for providing a constant voltage output from the load RL. The ac input is rectified and filtered by an input capacitor C1 to generate a dc voltage Vin for powering a load RL. When the switching MOS transistor M1 is turned on, the input voltage Vin charges the switching MOS transistor M1, and when the switching MOS transistor M1 is turned off, the charging and discharging inductor L1 charges the load RL. The first voltage dividing resistor R1 and the second voltage dividing resistor R2 are output voltage dividing resistors, and transmit a divided signal of the output voltage to the driving sheet T1 through the FB terminal. The driving chip T1 adjusts the on and off time of the switching MOS transistor M1 through the Gate terminal to provide a constant output voltage to the loads RL in different situations.
As shown in fig. 2, in the application scheme of high power factor, the capacitance of the input capacitor C1 is small, the driving chip T1 modulates the waveform of the current Im of the charge/discharge inductor L1 to follow the waveform of the input voltage Vin, and the peak current Im _ pk of the current Im of the inductor L1 reaches a maximum when the input voltage Vin reaches a peak value. Meanwhile, the peak current Im _ pk of Im increases as the output current Iout increases. In some extreme cases, too high a peak current Im _ pk may cause the inductor L1 to saturate with current.
Fig. 3 is a block schematic diagram of the driving chip in this embodiment.
As shown in fig. 3, the driving chip includes: the constant-voltage control circuit K1, the input current modulation circuit K2, the logic control circuit K3, the zero-cross current detection circuit K4, the MOS tube driving circuit K5 and the low-voltage power supply circuit K6.
The low voltage supply circuit K6 inputs high voltage from the HV terminal, outputs low voltage to the Vcc terminal, and stores energy in the external capacitor C4 to supply power to other functional modules inside the driver chip T1, and all the modules are connected to Vcc by default. One end of the input current modulation circuit K2 is connected to the CS terminal of the driver chip T1, and the other end is connected to one input terminal of the logic control circuit K3. The input current modulation circuit K2 detects and limits the peak current of the inductor and outputs a peak current arrival signal dim _ off. The output end of the zero-crossing current detection circuit K4 is connected with the other input end of the logic control circuit K3. The zero-crossing current detection circuit K4 detects the zero crossing of the inductor current and outputs a current zero-crossing signal zcd. The constant voltage control circuit K1 is respectively connected with the FB end and the COMP end, and the output end is connected with the third input end of the logic control circuit K3. The constant voltage control circuit K1 achieves a constant voltage output by closed loop control and outputs a signal norm _ off. The logic control circuit K3 receives an output signal dim _ off of the input current modulation circuit, an output signal norm _ off of the constant voltage control circuit, and a detection signal zcd of the zero crossing point of the inductor current, and the output end is connected with the input end of the transistor drive circuit K5 to output a signal MOS _ ON. The MOS tube driving circuit K5 is connected with the output signal MOS _ ON of the logic control circuit K3, the output end is connected with the GATE end and the zero-crossing current detection circuit K4, and the switching state of the MOS tube M1 is determined so as to achieve the purpose of constant voltage output.
As shown in fig. 4, the constant voltage control circuit K1 includes an operational amplifier G11, an operational amplifier G12, a current source I13, and a capacitor C14. The positive phase input end of the operational amplifier G11 is connected with the constant voltage control reference voltage Vref _ cv, the negative phase input end is connected with the FB end of the driving chip T1, and the output end is connected with the COMP end. The input end of the current source I13 is connected with the VCC end, and the output end is connected with the negative phase input end of the operational amplifier G12; the non-inverting input end of the operational amplifier G12 is connected with the COMP end, and the output end is connected with the logic control circuit K3 and outputs a constant current control signal norm _ off. One end of the capacitor C14 is connected to the negative phase input end of the operational amplifier G12, and the other end is grounded.
The input current modulation circuit K2 includes an operational amplifier G21. The positive phase input end of the operational amplifier G21 is connected with the modulation reference voltage Vref _ dim, the negative phase input end is connected with the CS end of the driving chip T1, the output end is connected with the logic control circuit K3, and the signal dim _ off is output.
The logic control circuit K3 includes: d flip-flop DFF and OR gate OR. One input end of the OR gate OR is connected to the input current modulation circuit K2, i.e. to the output end of the operational amplifier G12, and receives the output signal dim _ off of the input current modulation circuit. The other input end of the OR gate OR is connected with the constant voltage control circuit K1, namely, the output end of the operational amplifier G12, and is connected with the output signal norm _ off of the constant voltage control circuit K1. The output end of the OR gate is connected with the R end of the D trigger DFF. The D end of the D trigger DFF is connected with the VCC end, and the CK end is connected with an output signal zcd of the zero-crossing current detection circuit K4; the Q end of the D trigger DFF is connected with the MOS tube driving circuit K5 and outputs a signal MOS _ ON.
The MOS tube driving circuit K5 comprises: inverter INV51, MOS pipe MP52, MOS pipe MN53, resistance R54.
The input end of the inverter INV51 is connected to the logic control circuit K3, i.e., to the Q end of the D flip-flop DFF, and receives the logic control signal MOS _ ON. The output end of the inverter INV51 is connected to the gate of the MOS transistor MN53 and the gate of the MOS transistor MP 52. The source of the MOS transistor MP52 is connected to the VCC terminal. The drain of MOS transistor MN53 is connected to the drain of MOS transistor MP52, and the connection point is used as the GATE end. One end of the resistor R54 is connected with the source of the MOS transistor MN53, and the other end is connected with the GND end.
When the modulation reference voltage Vref _ dim is set to a large value (so that the allowed inductor peak current is larger than the inductor saturation current), Im _ pk is not limited by the value of Vref _ dim, and the system operates in the mode without input current modulation, and the operating waveform diagram is shown in fig. 5. When the modulation reference voltage Vref _ dim is set to a small value (so that the allowed inductor peak current is less than the inductor saturation current), Im _ pk will be limited by the value of Vref _ dim and will not increase as Vin increases. The system is operated in the input current modulation mode, and the operating waveform diagram is shown in fig. 6.
As shown in fig. 7, the peak value of the input current is limited after the current modulation
I.e. Vref_dim＝Im_pk×RS。
The requirement Im _ pk is smaller than the saturation current of the charge-discharge inductor L1, which is achieved by setting the value of Vref _ dim, i.e. the value of Vref _ dim is smaller than the product of the saturation current of the charge-discharge inductor L1 and the current detection resistor Rs.
While the present invention has been described in detail with reference to the preferred embodiments, it should be understood that the above description should not be taken as limiting the invention. Various modifications and alterations to this invention will become apparent to those skilled in the art upon reading the foregoing description. Any invention creation, insubstantial replacement, change or modification without departing from the spirit of the invention falls within the protection scope of the invention.
Claims (7)
1. An input current peak value modulation method of a switching power supply is characterized in that: based on the boost switching power supply driving circuit; the boost switching power supply driving circuit comprises an input capacitor C1, an external capacitor C4, a charging and discharging inductor L1, a switching MOS tube M1, a current detection resistor Rs, an output capacitor C3 and a driving chip T1; the driving chip T1 has an HV end, a Vcc end, a Gate end, a CS end, a FB end and a GND end;
one end of the input capacitor C1 is connected with the direct-current voltage Vin, and the other end of the input capacitor C1 is grounded; one end of the charge and discharge inductor L1 is connected with the direct-current voltage Vin, and the other end is connected with the drain electrode of the switch MOS tube M1; the HV end of the driving chip T1 is connected with the direct-current voltage Vin; one end of the output capacitor C3 is connected with the VCC end of the driving chip T1, and the other end is grounded; one end of the external capacitor C4 is connected with the COMP end of the driving chip T1, and the other end is grounded; the Gate of the switching MOS transistor M1 is connected with the Gate of the driving chip T1, and the source is connected with the CS end of the driving chip T1; one end of the current detection resistor Rs is connected with the source electrode of the switch MOS transistor M1, and the other end of the current detection resistor Rs is grounded;
the input current peak value modulation method of the switching power supply comprises the following steps: the constant-voltage control circuit comprises a constant-voltage control circuit (K1), an input current modulation circuit (K2), a logic control circuit (K3), a zero-crossing current detection circuit (K4), an MOS tube driving circuit (K5) and a low-voltage power supply circuit (K6);
the low-voltage power supply circuit (K6) inputs high voltage from the HV end and outputs low voltage to the Vcc end; one end of the input current modulation circuit (K2) is connected with the CS end of the driving chip T1, and the other end of the input current modulation circuit is connected with one input end of the logic control circuit (K3); the output end of the zero-crossing current detection circuit (K4) is connected with the other input end of the logic control circuit (K3); the constant voltage control circuit (K1) is respectively connected with the FB end and the COMP end, and the output end is connected with the third input end of the logic control circuit (K3); the output end of the logic control circuit (K3) is connected with the input end of the MOS tube driving circuit (K5); the output end of the MOS tube driving circuit (K5) is connected with the GATE end and the zero-crossing current detection circuit (K4);
the input current modulation circuit (K2) includes an operational amplifier G21; the positive phase input end of the operational amplifier G21 is connected with the modulation reference voltage Vref _ dim, the negative phase input end is connected with the CS end of the driving chip T1, and the output end is connected with the logic control circuit (K3);
the value of the modulation reference voltage Vref _ dim is smaller than the product of the saturation current of the charge-discharge inductor L1 and the current detection resistor Rs;
when the value of Vref _ dim is smaller than the product of the saturation current of the charge-discharge inductor L1 and the current detection resistor Rs, the peak value of the input current
2. The method of peak modulation of input current to a switching power supply of claim 1, wherein: the boost switching power supply driving circuit further comprises a freewheeling diode D2, a first voltage-dividing resistor R1 and a second voltage-dividing resistor R2;
the anode of the freewheeling diode D2 is connected with the drain of the switching MOS tube M1, and the cathode is connected with one end of the first divider resistor R1; one end of the second divider resistor R2 is connected with the other end of the first divider resistor R1; the other end is grounded.
3. The method of peak modulation of input current to a switching power supply of claim 2, wherein:
the FB end of the driving chip T1 is connected with the connection part of the first divider resistor R1 and the second divider resistor R2; the GND terminal of the driver chip T1 is grounded.
4. The method of peak modulation of input current to a switching power supply of claim 2, wherein:
the boost switching power supply driving circuit further comprises an energy storage capacitor C2;
the energy storage capacitor C2 is connected in parallel at two ends of the first divider resistor R1 and the second divider resistor R2; namely, one end is connected with one end of the first voltage-dividing resistor R1, and the other end is connected with the other end of the second voltage-dividing resistor R2.
5. The method of peak modulation of input current to a switching power supply of claim 1, wherein:
the constant voltage control circuit (K1) comprises an operational amplifier G11, an operational amplifier G12, a current source I13 and a capacitor C14;
the positive phase input end of the operational amplifier G11 is connected with a constant voltage control reference voltage Vref _ cv, the negative phase input end is connected with the FB end of the driving chip T1, and the output end is connected with the COMP end; the input end of the current source I13 is connected with the VCC end, and the output end is connected with the negative phase input end of the operational amplifier G12; the non-inverting input end of the operational amplifier G12 is connected with the COMP end, the output end is connected with the logic control circuit (K3), and a constant voltage control signal norm _ off is output; one end of the capacitor C14 is connected to the negative phase input end of the operational amplifier G12, and the other end is grounded.
6. The method of peak modulation of input current to a switching power supply of claim 1, wherein:
wherein the logic control circuit (K3) comprises: a D flip-flop DFF and an OR gate OR;
one input end of the OR gate is connected with the input current modulation circuit (K2), the other input end of the OR gate is connected with the constant voltage control circuit (K1), and the output end of the OR gate is connected with the R end of the D trigger DFF;
the D end of the D trigger DFF is connected with the VCC end, and the CK end is connected with the zero-crossing current detection circuit (K4); the Q end of the D trigger DFF is connected with a MOS tube driving circuit (K5).
7. The method of peak modulation of input current to a switching power supply of claim 1, wherein: the MOS transistor driving circuit (K5) comprises: an inverter INV51, a MOS tube MP52, a MOS tube MN53 and a resistor R54;
the input end of the inverter INV51 is connected with a logic control circuit (K3); the output end of the MOS tube is connected with the grid of the MOS tube MN53 and the grid of the MOS tube MP 52; the source electrode of the MOS tube MP52 is connected with the VCC end; the drain electrode of the MOS transistor MN53 is connected with the drain electrode of the MOS transistor MP52, and the connection point is used as a GATE end; one end of the resistor R54 is connected with the source of the MOS transistor MN53, and the other end is connected with the GND end.
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Denomination of invention: A peak modulation method for input current of switching power supply Granted publication date: 20210716 Pledgee: Shanghai Rural Commercial Bank Co.,Ltd. Pudong branch Pledgor: POWER MICRO-ELECTRONICS CO.,LTD. Registration number: Y2024310000834 |