CN104201897A - Dynamic process detection method and fast response circuit of switching power supply - Google Patents
Dynamic process detection method and fast response circuit of switching power supply Download PDFInfo
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Abstract
The invention provides a fast response circuit and a dynamic process detection method of a switching power supply. By adopting the fast response circuit and the dynamic process detection method, high output voltage accuracy in a secondary feedback control mode and fast dynamic response speed can be obtained. According to the detection method, the dynamic process when output load changes suddenly can be fast detected, acts can be adopted before secondary voltage negative feedback, output voltage can be adjusted timely, and therefore the dynamic response speed as fast as the primary feedback can be obtained.
Description
Technical field
The present invention relates to dynamic process detection method and the fast response circuit of Switching Power Supply, particularly dynamic process detection method and the fast response circuit of secondary feedback switch power supply.
Background technology
Along with the development of switch power technology, Switching Power Supply has become the main power supply of electrical appliance, and with transformer, realizes electrical equipment and isolate to improve fail safe.Fig. 1 is the inverse-excitation type switch power-supply of conventional secondary FEEDBACK CONTROL, resistance R 1 and R2 are output voltage sampling resistors, their dividing potential drop is as the input signal of TL431, and this signal is transferred to the FB input of control chip after the trsanscondutance amplifier being comprised of TL431 and optocoupler amplifies.So voltage V of FB port
fBreflected electric power output voltage V
oUTsize, be often called voltage feedback loop, again because be the secondary induction feedback output voltage from transformer, so can be described as again secondary voltage feedback control loop.Controller is according to V
fBthe duty ratio size of size modulations GATE output control output voltage, work as output voltage V
oUTwhen higher, optocoupler extracts more electric current from FB pin, makes V
fBdecline, the duty ratio of GATE output diminishes, output voltage V
oUTdecline gradually; When output voltage is less than normal, optocoupler extracts less electric current from FB pin, makes V
fBincrease, the duty ratio of GATE output becomes large, output voltage V
oUTincrease gradually.Therefore the continuous adjustment by loop makes output voltage stabilization in the value of setting.Due to this secondary, controlling is from output Direct Sampling voltage, can make output voltage precision very high, so use in to the high application of output voltage required precision in a large number.But the limit bandwidth of the voltage feedback loop that secondary is controlled the speed of dynamic response, in order to make, output voltage precision is high, loop stability good, the Bandwidth-Constrained of feedback control loop, and limited in order to meet the Slew Rate at low standby power loss FB place makes power supply export V
oUTload changing time, there is dynamic process, response speed is slow and make exporting change amplitude very large.Especially, along with the enhancing of people to environmental consciousness, in order to improve more underloaded efficiency and to reduce stand-by power consumption, present power-supply controller of electric is set frequency reducing pattern often in underload, operating frequency the reducing along with load of chip when certain year, (as semi-load) were following, the operating frequency of controller reduces gradually, thereby reduces switching loss and no-load power consumption, but due to underload and when unloaded frequency reduce that to make to export dynamic response poorer.
In order to reduce cost that TL431 and optocoupler bring and the restriction of power consumption and bandwidth, former limit feedback controller as shown in Figure 2 solves these problems, and has the control advantage of oneself.It assists the port voltage V of winding when transformer demagnetization by sampling
acarry out sampling and outputting voltage, because the inferior limit winding of transformer and auxiliary winding are in the same way, the V of two port voltages when transformer demagnetization
swith V
aproportional relation, that is:
n wherein
aand N
sit is respectively the number of turn of the auxiliary winding of transformer and time limit winding.V again
oUTwith V
sonly differ a diode drop, if when sampling by this voltage-drop compensation and after balancing out, voltage V
ajust and output voltage V
oUTbe directly proportional, so controller is at FB port sampling V
adividing potential drop after voltage just reflected the size of output voltage.By regulating the duty of GATE recently to regulate the sampled voltage at FB place just can control the value that output voltage is being set.Because output voltage is that winding by transformer feeds back on former limit, so be called former limit FEEDBACK CONTROL.The feedback of transformer is the propagation of magnetic, and speed is very fast, almost without time delay, so sampling and outputting voltage is rapidly fed back on former limit, and output voltage is regulated.So the former limit FEEDBACK CONTROL of frequency more than audio frequency 22K has good fast dynamic response, yet because the pressure drop of output diode at different electric currents, temperature is different, and its size changes the size that directly affects output voltage, in addition the transformer number of turn, divider resistance R
sand R
s1precision also directly affect the precision of output voltage, so the output voltage precision of former limit feedback controling mode can not show a candle to secondary control mode.
Summary of the invention
1, an object of the present invention is to provide a kind of fast response circuit, comprising: the FR end of controller, the FB end of controller, the CS end of controller and GATE end, output voltage sampling circuit, comparison decision circuitry, the control signal of controller produce circuit, pwm signal generator and current generating circuit;
The FR end of the first input end mouth of described output voltage sampling circuit and described controller is connected, and the second input port is held and is connected with the GATE of described controller; The first output port of described output voltage sampling circuit is connected with the first input end mouth of described comparison decision circuitry, and the second output port of described output voltage sampling circuit is connected with the second input port of described comparison decision circuitry; Described output voltage sampling circuit not only each cycle is sampled and is preserved the sampled voltage of current period, but also preserves the sampled voltage in the cycle before current period, and sends the sampled voltage of preservation to described comparison decision circuitry;
The first input end mouth of described comparison decision circuitry and the second input port receive respectively the sampled voltage from described output voltage sampling circuit the first output port and the second output port, and judge whether to occur dynamic event according to the size of sampled voltage, and by comparing the output port of decision circuitry, send to described control signal to produce circuit by responding fast useful signal;
The first input end mouth that described control signal produces circuit receives after the quick response useful signal from described relatively decision circuitry, can produce two-way fast-response control pulse signal, the first output port that first via control signal produces circuit by control signal sends the first input end mouth of pwm signal generator to, and the second output port that the second tunnel control signal produces circuit by control signal sends the input port of current generating circuit to; The second input port that control signal produces circuit receives the work clock signal from the second output port of described pwm signal generator;
The second input port of described pwm signal generator is connected with the FB of described controller end, and the 3rd input port is connected with the CS pin of described controller, and the first output port of described pwm signal generator is connected with the GATE of described controller end; Described pwm signal generator receives after described first via control signal, promotes rapidly the output duty cycle of the GATE end of described controller;
The input of described current generating circuit receives after the second described tunnel control signal, produces large electric current to the FB end charging of described controller.
Preferably, described output voltage sampling circuit comprises pulse generator, the first transmission gate, the second transmission gate, the first electric capacity, the second electric capacity, voltage follower and cycle counter; The first transmit port of described the first transmission gate is connected with the first input end mouth of described output voltage sampling circuit, and the positive and negative control port of described the first transmission gate is connected with effective low and high level output port of pulse generator respectively; The second transmit port of described the first transmission gate is connected respectively at the first output of the positive input terminal of voltage follower, the positive input terminal of the first electric capacity and output voltage sampling circuit; The negative input port of the output port of described voltage follower, described voltage follower is connected with the first transmit port of described the second transmission gate; The positive and negative control port of the second described transmission gate is connected with effective positive-negative output end mouth of described cycle counter respectively; The second transmit port of the second described transmission gate, the anode of described the second electric capacity are connected with the second output port of described output voltage sampling circuit; The negative terminal of the negative terminal of the first electric capacity and the second electric capacity be connected to " "; The input port of described pulse generator is connected with the second input port of described output voltage sampling circuit with the input port of described cycle counter.
Preferably, the first described electric capacity is preserved the voltage of current period, the voltage in 1～4 cycle before the second described electric capacity preservation current period.
Preferably, described comparison decision circuitry comprises a P channel MOS tube, the 2nd P channel MOS tube, the 5th resistance, current mirror and the first comparator; The grid of the first metal-oxide-semiconductor is connected with the first input end mouth of described relatively decision circuitry, the drain electrode of the first metal-oxide-semiconductor connect " ", the source electrode of the first metal-oxide-semiconductor is connected with the second port of the 5th resistance; The grid of the second metal-oxide-semiconductor is connected with the second input port of described relatively decision circuitry, the drain electrode of the second metal-oxide-semiconductor connect " ", the second metal-oxide-semiconductor source electrode be connected with current mirror output port with the first comparator negative input port respectively; The first port of the 5th resistance, current mirror output port are connected with the first comparator positive input port; The first comparator output terminal mouth is connected with the described relatively output port of decision circuitry.
Preferably, described control signal generation circuit comprises: the first rest-set flip-flop and control pulsewidth counter; The triggering port S of the first rest-set flip-flop is connected with the first input end mouth that described control signal produces circuit; The input port of controlling pulsewidth counter is connected with the first rest-set flip-flop output port Q, the first output port is connected with the triggering port R of the first rest-set flip-flop, and the second output port, the 3rd output port and the 4th output port of controlling pulsewidth counter are connected with the second output port, the first output port and second input port of described control signal generation circuit respectively.
Preferably, described pwm signal generator comprises triode, the first resistance, the 3rd resistance and the 4th resistance, the second comparator, oscillator, the second rest-set flip-flop and the 4th P channel MOS tube; The second port of the base stage of triode, transistor collector and the first resistance is connected with the second input port of described pwm signal generator respectively; The first port of the emitter of triode, the 3rd resistance is connected with the input port of oscillator respectively with the drain electrode of the 4th P channel MOS tube; The second port of the 3rd resistance is connected with the first port of the 4th resistance and the positive input port of the second comparator; The negative input port of the second comparator is connected with the 3rd input port of described pwm signal generator, and the output port of the second comparator is put port R with the second trigger and is connected; The output port of oscillator is connected with the port S of the second rest-set flip-flop and the second output port of pwm signal generator respectively; The second rest-set flip-flop output port Q is connected with the first output port of pwm signal generator; The first port of the first resistance and the source electrode of the 4th P channel MOS tube meet internal electric source VCC; The 4th resistance R 4 second ports connect " ".
Preferably, described current generating circuit comprises the 3rd P channel switches pipe and the second resistance; The 3rd drain electrode of P channel switches pipe and the first port of the second resistance are connected, and the grid of the 3rd P channel switches pipe is connected with the input port of described current generating circuit, and the source electrode of the 3rd P channel switches pipe meets internal electric source VCC; The second port of the second resistance is connected with the output port of described current generating circuit.
Another object of the present invention is to provide a kind of dynamic process detection method of utilizing above-mentioned fast response circuit, and described method comprises:
Described output voltage sampling circuit is responded to the variation of output voltage by the dividing potential drop of the auxiliary winding of sampling transformer, be called the first original edge voltage feedback control loop, the first described original edge voltage feedback control loop not only each cycle is sampled and is preserved the sampled voltage of current period, but also preserve current period before the sampled voltage in 1～4 cycle; Described output voltage sampling circuit sends current period and the sampled voltage in front 1～4 cycle to described relatively decision circuitry;
Described comparison decision circuitry judges according to the size of the sampled voltage of the sampled voltage in front 1～4 cycle and current period whether output dynamic process occurs, if front 1 sampled voltage to 4 cycles is greater than Δ V than with the difference of current period sampled voltage, Δ V is the reference voltage of a setting, think that dynamic event occurs in output, and send quick response useful signal and produce circuit to control signal;
Described control signal produces circuit and receives after the quick response useful signal from described relatively decision circuitry, can produce two-way fast-response control pulse signal, first via control signal sends pwm signal generator to, and the second tunnel control signal sends current generating circuit to;
Described pwm signal generator receives after described first via control signal, promotes rapidly the output duty cycle of GATE;
Described current generating circuit receives after described the second tunnel control signal, produces large electric current to the controller input FB charging of secondary voltage feedback control loop, improves the voltage of FB port.
Described first via control wave increases sharply controller output duty cycle, can contain the trend of falling under electric power output voltage is owing to loading suddenly, described the second tunnel control signal increases FB port voltage, thereby described first via control wave can also maintain large duty ratio after disappearing, electric power output voltage returns to set point rapidly, has realized the object of fast dynamic response.
The FB pin of controller is the feedback port of the second secondary voltage feedback control loop, and output voltage sampling network and optocoupler that the second secondary voltage feedback control loop is formed by TL431, sampling resistor, building-out capacitor form.The second secondary voltage feedback control loop has guaranteed high electric power output voltage precision, can greatly improve by the first original edge voltage feedback control loop the dynamic responding speed of output voltage again simultaneously, and the raising of this rapid response speed is short time effect, afterwards again by the second secondary feedback control loop regulation output voltage voluntarily, avoided the long-term positive action of the first original edge voltage feedback control loop to the second secondary voltage feedback, thus the output voltage in the time of can not affecting stable state.
A kind of Switching Power Supply dynamic process detection method of the present invention and fast response circuit, can obtain high output voltage precision and have again fast dynamic responding speed.The output voltage precision not only with secondary feedback controling mode, suddenly in the dynamic process changing in output loading, it can fast detecting to the generation of this event and moved before secondary voltage negative feedback, timely regulation output voltage, from and there is the same dynamic responding speed of former limit feedback.
Accompanying drawing explanation
Fig. 1 is the application circuit of the inverse-excitation type switch power-supply of secondary FEEDBACK CONTROL
Fig. 2 is the application circuit of the inverse-excitation type switch power-supply of former limit FEEDBACK CONTROL
Fig. 3 comprises that dynamic process of the present invention detects and the application circuit of the controller of fast response circuit
Fig. 4 is the schematic diagram of the fast response circuit described in the embodiment of the present invention one
Fig. 5 is the sample waveform to output voltage of voltage sample module of the present invention
Embodiment
In order to make object of the present invention, technical scheme and advantage clearer, below in conjunction with drawings and Examples, the present invention is described in more detail.Should be appreciated that specific embodiment described herein, only in order to explain the present invention, is not intended to limit the present invention.
Embodiment mono-
Fig. 4 is the circuit theory diagrams of embodiment mono-.A fast response circuit for Switching Power Supply, comprising: comprise the FR end of controller, the FB of controller end, the CS end of controller, the GATE end of controller, output voltage sampling circuit 101, relatively decision circuitry 102, control signal generation circuit 103, pwm signal generator 104, current generating circuit 105.Output voltage sampling circuit has two input port D11 and D14, two output port D12 and D13, input port D11 is connected with the FR pin of controller, another input port D14 is connected with GATE pin, and two output port D12 and D13 export respectively Vo_new and Vo_old signal to two input ports of decision circuitry 102 relatively; Relatively another output port output Vo_fast signal of decision circuitry 102 produces an input port of circuit 103 to control signal; Another input port of 103 receives the CLK signal from pwm signal generator 104, and in addition, 103 also have two output ports, an output F
c1control signal is to pwm signal generator 104, and another exports F
c2control signal is to current generating circuit 105; An output port of pwm signal generator 104 is connected with the GATE pin of controller; One number port of current generating circuit is connected with an input port of the FB port of controller and pwm signal generator 104.
Output voltage sampling circuit 101 comprises: before pulse generator, transmission gate TG1, the voltage sample capacitor C 1 of preserving current period, voltage follower OPA, transmission gate TG2, current period, 1～4 periodic voltage is preserved capacitor C 2, cycle counter.The first transmit port A1 of transmission gate TG1 is connected with D11 port, and positive and negative control port is connected with effective low and high level output port of pulse generator respectively; The positive input terminal of the second transmit port B1, OPA of TG1 is, the positive input terminal of capacitor C 1 is connected together with D12 port; The negative input port of the output port of OPA, OPA is connected with the first transmit port A2 of transmission gate TG2; The positive and negative control port of transmission gate TG2 is connected with effective positive-negative output end mouth of cycle counter respectively; The second transmit port B2 of TG2, the anode of capacitor C 2 are connected with D13 port; Capacitor C 1 and C2 negative terminal mouth be separately connected to " "; The input port of pulse generator and cycle counter is connected with D14.
Described relatively decision circuitry 102 comprises: current potential translation P channel MOS tube MP1 and MP2, return difference arrange resistance R 5, current mirror, comparator C MP1.The grid of MP1 is connected with D21 port, drain electrode connect " ", source electrode is connected with the second port of resistance R 5; The grid of MP2 is connected with D22 port, drain electrode connect " ", source electrode is connected with comparator negative input port, current mirror output port; The first end of resistance R 5, current mirror output port are connected with comparator positive input port; Comparator output terminal mouth is connected with D23 port.
Described control signal produces circuit 103 and comprises: rest-set flip-flop RS1, control pulsewidth counter." 1 " of trigger RS1 is triggered port S and is connected with D31 port; The input port of controlling pulsewidth counter is connected with rest-set flip-flop output port Q, and the first output port triggers port R with " 0 " of RS1 trigger and is connected, and other three ports are connected with port D32, D33, D34 respectively.
Described pwm signal generator 104 comprises: level shift triode Q1, pull-up resistor R1, divider resistance R3 and R4, PWM comparator C MP2, oscillator, rest-set flip-flop RS2, P channel MOS tube MP4.The second port of the base stage of triode Q1, collector electrode, resistance R 1 is connected with D41 port; The drain electrode of the first port of the emitter of triode, resistance R 3, P channel MOS tube MP4 is connected with the input port of oscillator; The second port of resistance R 3, the first port of R4 are connected with the positive input port of PWM comparator C MP2; The negative input port of comparator is connected with D42 port, and output port is connected with the reset port R of trigger RS2; The output port of oscillator is connected with set port S, the D44 port of trigger RS2; Trigger RS2 output port Q is connected with D45 port; Resistance R 1 first port and MP4 source electrode meet internal electric source VCC; Resistance R 4 second ports connect " ".
Described current generating circuit 105 comprises: P channel switches pipe MP3, resistance R 2.The drain electrode of MP3 is connected with the first port of resistance R 2, and grid is connected with D52 port, and source electrode meets internal electric source VCC; The second port of resistance R 2 is connected with D51 port.
The operation principle of each circuit module is as follows:
The operation principle of described output voltage sampling circuit 101: become after low level at GATE, there is the voltage waveform of demagnetization in FR, its size has reflected the size of electric power output voltage, postpone a bit of sampling delay time afterpulse generator and send pulse signal, opening a bit of time of transmission gate preserves the voltage swing of FR by capacitor C 1, and the waveform of sampling process as shown in Figure 5; Voltage follower OPA copies the voltage of C1, so that certain driving force to be provided; Every 4 (not limiting) cycles of cycle counter are opened transmission gate TG2 one time, make the voltage in capacitor C 2 equal the voltage in capacitor C 1.So 101 effect is exactly, the output voltage of each cycle (not limiting) capacitor C 1 sampling power supply, every 4 cycle capacitor C 2 copy the voltage on C1 one time, and so, the voltage of the upper preservation of C2 is exactly the output voltage before 1～4 cycle of just passing by.
The described relatively operation principle of decision circuitry 102: the grid of P channel MOS tube MP1 and MP2 receives respectively the voltage in capacitor C 1 and capacitor C 2, the effect of MP1 and MP2 is respectively the voltage on C1 and C2 to be carried out to current potential translation, the source gate voltage V of the identical PMOS pipe that superposes respectively on the voltage of C1 and C2
sGthe electric current that current mirror produces produces a small voltage Δ V in resistance R 5, thereby the voltage of comparator input anode deducts voltage Vo_new and the Δ V sum that the voltage of input negative terminal equals in capacitor C 1 and deducts the voltage Vo_old in capacitor C 2 again, that is to say in the situation that Vo_new is identical with Vo_old, the positive input terminal voltage of comparator C MP1 exceeds Δ V than negative input end, only have so the output as Vo_new comparator C MP1 during than the low Δ V of going out of Vo_old to become low level, represent that larger having fallen appears in electric power output voltage.
Described control signal produces the operation principle of circuit 103: when falling more greatly appears in electric power output voltage, trigger RS1 can be triggered into one state, electric power output voltage be occurred to falling more greatly this logout gets off.And then, control pulse width timer output two path control signal FC1 and FC2, they are Low level effectives.103 input port D34 receiving chip work clock signal CLK, clock cycle T is as the least unit time of FC1 and FC2.After FC1 and FC2 useful signal disappear, trigger RS1 is set to again " 0 " state, again waits for the generation of dynamic event.
The operation principle of described pwm signal generator 104: pull-up resistor R1, current potential translation triode Q1, divider resistance R3 form conventional pwm signal generation circuit together with R4, comparator C MP2, trigger RS2, the duty of controlling GATE port output pulse width is recently stablized the voltage of out-put supply.The frequency of oscillator is also subject to the control of FB port voltage, can be according to the operating frequency of the big or small control chip of load, and the efficiency while optimizing underload.When the grid of MP4 becomes low level, transistor emitter voltage improves rapidly, thereby frequency increases sharply; The voltage of the positive input port of CMP2 increases sharply, thereby CS port peak electric current increases sharply.So, the duty ratio of GATE and frequency all increase sharply.
The operation principle of described current generating circuit 105: the grid of P channel MOS tube MP3 becomes after low level, MP3 conducting, the circuit I that power supply VCC produces by less resistance R 2 so
fBcharge rapidly to the external building-out capacitor of FB port.
Visible, what above 5 modular circuits had completed detection that output voltage falls suddenly this dynamic process, control signal jointly sends and responds fast this series of task.By the size of FR port sampling and outputting voltage, and the voltage that samples of this cycle will compare with the voltage that sampling obtains before, only has the low Δ V before the voltage ratio of sampling this week just to think that above large falling appears in output voltage.Δ V suitably design just can avoid interference etc. that output voltage that reason causes falls and the situation about falling that is mistaken for dynamic process.In 104, by P channel MOS tube MP4 conducting, improve rapidly frequency and duty ratio, can contain at once that output voltage is because the trend of falling more greatly appears in loading suddenly.Because the mode of this rapid raising duty ratio is enforceable, it is the feedback voltage of not taking FB port into account, it is open loop, so mandatory like this raising frequency and duty ratio chronically, otherwise the output voltage charging that likely makes power supply is too high, damage power supply, must cancel after a period of time this positive action and allow the negative feedback of loop automatically regulate electric power output voltage.After yet the signal of forcing raising duty ratio and frequency in 104 is cancelled, the voltage of FB port may rise to greatly and not needed voltage due to external building-out capacitor, and duty ratio and frequency are reduced again, and output voltage falls again.Thereby by the voltage of improving rapidly FB port to the external capacitor charging of FB port, rear duty ratio is cancelled in the positive action in 104 by the time and frequency can not reduce again, but carrys out automatic regulation output voltage by the feedback of FB port in 105.So 104 and 105 have completed the process of quick response jointly, can contain at once the trend that output voltage falls and to make to fall amplitude little, can finally pass through again the self-regulation output voltage of loop, prevented enforceable accommodative excess.Arrived the beneficial effect that quick response is fast, accurate, ruthless.
Embodiment bis-
The present embodiment is to propose the dynamic process detection method of circuit described in a kind of embodiment of utilization mono-, it is characterized in that:
Output voltage sampling circuit is responded to the variation of output voltage by the dividing potential drop (being the signal voltage that described controller FR pin goes out) of the auxiliary winding of sampling transformer, not only each cycle is sampled and is preserved the sampled voltage of current period, but also preserves the sampled voltage in previous or several cycles; Described output voltage sampling circuit sends the sampled voltage in 1～4 cycle before current period and current period to described relatively decision circuitry, then described relatively decision circuitry judges according to the size of these two voltages whether output dynamic process occurs, if front 1 sampled voltage to 4 cycles is greater than Δ V than with the difference of current period sampled voltage, Δ V is the reference voltage (for example 50mV) of a setting, think that dynamic event occurs in output, and send quick response useful signal and produce circuit to control signal;
Described control signal produces circuit and receives after the quick response useful signal from described relatively decision circuitry, can produce two-way fast-response control pulse signal, first via control signal sends pwm signal generator to, and the second tunnel control signal sends current generating circuit to;
Described pwm signal generator receives after described first via control signal, promotes rapidly the output duty cycle of GATE;
Described current generating circuit receives after described the second tunnel control signal, produces large electric current to the controller input FB charging of secondary voltage feedback control loop, improves the voltage of FB port.
Embodiments of the present invention are not limited to this; according to foregoing of the present invention; utilize ordinary skill knowledge and the customary means of this area; do not departing under the above-mentioned basic fundamental thought of the present invention prerequisite; the present invention can also make modification, replacement or the change of other various ways, within all dropping on rights protection scope of the present invention.
Claims (8)
1. a fast response circuit for Switching Power Supply, is characterized in that: comprise the FR end of controller, the FB end of controller, the CS end of controller, the GATE end of controller, output voltage sampling circuit, comparison decision circuitry, control signal produce circuit, pwm signal generator and current generating circuit;
The FR end of the first input end mouth of described output voltage sampling circuit and described controller is connected, and the second input port is held and is connected with the GATE of described controller; The first output port of described output voltage sampling circuit is connected with the first input end mouth of described comparison decision circuitry, and the second output port of described output voltage sampling circuit is connected with the second input port of described comparison decision circuitry; Described output voltage sampling circuit not only each cycle is sampled and is preserved the sampled voltage of current period, but also preserves the sampled voltage in the cycle before current period, and sends the sampled voltage of preservation to described comparison decision circuitry;
The first input end mouth of described comparison decision circuitry and the second input port receive respectively the sampled voltage from described output voltage sampling circuit the first output port and the second output port, and judge whether to occur dynamic event according to the size of sampled voltage, and by comparing the output port of decision circuitry, send to described control signal to produce circuit by responding fast useful signal;
The first input end mouth that described control signal produces circuit receives after the quick response useful signal from described relatively decision circuitry, can produce two-way fast-response control pulse signal, the first output port that first via control signal produces circuit by control signal sends the first input end mouth of pwm signal generator to, and the second output port that the second tunnel control signal produces circuit by control signal sends the input port of current generating circuit to; The second input port that control signal produces circuit receives the work clock signal from the second output port of described pwm signal generator;
The second input port of described pwm signal generator is connected with the FB of described controller end, and the 3rd input port is connected with the CS pin of described controller, and the first output port of described pwm signal generator is connected with the GATE of described controller end; Described pwm signal generator receives after described first via control signal, promotes rapidly the output duty cycle of the GATE end of described controller;
The input of described current generating circuit receives after the second described tunnel control signal, produces large electric current to the FB end charging of described controller.
2. fast response circuit according to claim 1, is characterized in that: described output voltage sampling circuit comprises pulse generator, the first transmission gate, the second transmission gate, the first electric capacity, the second electric capacity, voltage follower and cycle counter; The first transmit port of described the first transmission gate is connected with the first input end mouth of described output voltage sampling circuit, and the positive and negative control port of described the first transmission gate is connected with effective low and high level output port of pulse generator respectively; The second transmit port of described the first transmission gate is connected respectively at the first output of the positive input terminal of voltage follower, the positive input terminal of the first electric capacity and output voltage sampling circuit; The negative input port of the output port of described voltage follower, described voltage follower is connected with the first transmit port of described the second transmission gate; The positive and negative control port of the second described transmission gate is connected with effective positive-negative output end mouth of described cycle counter respectively; The second transmit port of the second described transmission gate, the anode of described the second electric capacity are connected with the second output port of described output voltage sampling circuit; The negative terminal of the negative terminal of the first electric capacity and the second electric capacity be connected to " "; The input port of described pulse generator is connected with the second input port of described output voltage sampling circuit with the input port of described cycle counter.
3. fast response circuit according to claim 2, is characterized in that: the first described electric capacity is preserved the voltage of current period, the voltage in 1～4 cycle before the second described electric capacity preservation current period.
4. fast response circuit according to claim 1, is characterized in that: described comparison decision circuitry comprises a P channel MOS tube, the 2nd P channel MOS tube, the 5th resistance, current mirror and the first comparator; The grid of the first metal-oxide-semiconductor is connected with the first input end mouth of described relatively decision circuitry, the drain electrode of the first metal-oxide-semiconductor connect " ", the source electrode of the first metal-oxide-semiconductor is connected with the second port of the 5th resistance; The grid of the second metal-oxide-semiconductor is connected with the second input port of described relatively decision circuitry, the drain electrode of the second metal-oxide-semiconductor connect " ", the second metal-oxide-semiconductor source electrode be connected with current mirror output port with the first comparator negative input port respectively; The first port of the 5th resistance, current mirror output port are connected with the first comparator positive input port; The first comparator output terminal mouth is connected with the described relatively output port of decision circuitry.
5. fast response circuit according to claim 1, is characterized in that: described control signal produces circuit and comprises: the first rest-set flip-flop and control pulsewidth counter; The triggering port S of the first rest-set flip-flop is connected with the first input end mouth that described control signal produces circuit; The input port of controlling pulsewidth counter is connected with the first rest-set flip-flop output port Q, the first output port is connected with the triggering port R of the first rest-set flip-flop, and the second output port, the 3rd output port and the 4th output port of controlling pulsewidth counter are connected with the second output port, the first output port and second input port of described control signal generation circuit respectively.
6. fast response circuit according to claim 1, is characterized in that: described pwm signal generator comprises triode, the first resistance, the 3rd resistance and the 4th resistance, the second comparator, oscillator, the second rest-set flip-flop and the 4th P channel MOS tube; The second port of the base stage of triode, transistor collector and the first resistance is connected with the second input port of described pwm signal generator respectively; The first port of the emitter of triode, the 3rd resistance is connected with the input port of oscillator respectively with the drain electrode of the 4th P channel MOS tube; The second port of the 3rd resistance is connected with the first port of the 4th resistance and the positive input port of the second comparator; The negative input port of the second comparator is connected with the 3rd input port of described pwm signal generator, and the output port of the second comparator is put port R with the second trigger and is connected; The output port of oscillator is connected with the port S of the second rest-set flip-flop and the second output port of pwm signal generator respectively; The second rest-set flip-flop output port Q is connected with the first output port of pwm signal generator; The first port of the first resistance and the source electrode of the 4th P channel MOS tube meet internal electric source VCC; The 4th resistance R 4 second ports connect " ".
7. fast response circuit according to claim 1, is characterized in that: described current generating circuit comprises the 3rd P channel switches pipe and the second resistance; The 3rd drain electrode of P channel switches pipe and the first port of the second resistance are connected, and the grid of the 3rd P channel switches pipe is connected with the input port of described current generating circuit, and the source electrode of the 3rd P channel switches pipe meets internal electric source VCC; The second port of the second resistance is connected with the output port of described current generating circuit.
8. a dynamic process detection method of utilizing above-mentioned fast response circuit, is characterized in that:
Described output voltage sampling circuit is responded to the variation of output voltage by the dividing potential drop of the auxiliary winding of sampling transformer, be called the first original edge voltage feedback control loop, the first described original edge voltage feedback control loop not only each cycle is sampled and is preserved the sampled voltage of current period, but also preserve current period before the sampled voltage in 1～4 cycle; Described output voltage sampling circuit sends current period and the sampled voltage in front 1～4 cycle to described relatively decision circuitry;
Described comparison decision circuitry judges according to the size of the sampled voltage of the sampled voltage in front 1～4 cycle and current period whether output dynamic process occurs, if front 1 sampled voltage to 4 cycles is greater than Δ V than with the difference of current period sampled voltage, Δ V is the reference voltage of a setting, think that dynamic event occurs in output, and send quick response useful signal and produce circuit to control signal;
Described control signal produces circuit and receives after the quick response useful signal from described relatively decision circuitry, can produce two-way fast-response control pulse signal, first via control signal sends pwm signal generator to, and the second tunnel control signal sends current generating circuit to;
Described pwm signal generator receives after described first via control signal, promotes rapidly the output duty cycle of GATE;
Described current generating circuit receives after described the second tunnel control signal, produces large electric current to the controller input FB charging of secondary voltage feedback control loop, improves the voltage of FB port.
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