CN203661377U - Dual-winding single-stage primary side feedback type LED lamp drive circuit - Google Patents
Dual-winding single-stage primary side feedback type LED lamp drive circuit Download PDFInfo
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- CN203661377U CN203661377U CN201420020940.2U CN201420020940U CN203661377U CN 203661377 U CN203661377 U CN 203661377U CN 201420020940 U CN201420020940 U CN 201420020940U CN 203661377 U CN203661377 U CN 203661377U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract
The utility model provides a dual-winding single-stage primary side feedback type LED lamp drive circuit. An LED drive chip adopting the source drive technology is adopted, and the demagnetization time Tons (i.e., the secondary side conduction time) is indirectly detected through the stray capacitance of an external first power tube source and drain. A high power factor is realized through the control method in which the primary side conduction time Tonp is fixed to relieve the grid pressure. Through the association technology of the secondary side conduction time and the primary side current peak, the open-circuit protection of the output LED can be realized. Moreover, the LED drive chip has a very low working current, line voltage power supply can be performed directly through a first resistor, so that the LED drive chip power supply and demagnetization time required by existing primary side feedback LED drive circuits and auxiliary windings detected by the output voltage can be omitted, the transformer only needs the primary winding and the secondary winding, the manufacturing process flow of the transformer can be simplified, and the cost can be further reduced.
Description
Technical field
The utility model relates to switch power technology field, relates in particular to the LED lamp drive circuit of the former limit of a kind of double winding single-stage feedback.
Background technology
Along with people are to environmental protection, energy-conservation, efficient requirement, LED throws light on and advances by leaps and bounds recent years, has realized the development of great-leap-forward.In order to alleviate electrical network pressure, and reduce costs, former limit feedback (PSR) LED with single-stage Active PFC (PFC) drives chip to start to appear on market in nearest 2 years.
Refer to Fig. 1, it is the former limit feedback LED drive circuit of existing single-stage Active PFC, and this former limit feedback LED drive circuit comprises: control chip 400, transformer 413, power tube Q100, rectifier bridge 401, line detecting voltage resistance R 101 and R102, high-voltage capacitance C101, auxiliary limit rectifier diode D101 and divider resistance R103 and R104, filter capacitor C102, output rectifier diode D102, output capacitance C103 and LED lamp string 416.Described transformer 413 comprises former limit winding Np, auxiliary winding Na and secondary winding Ns.Wherein the auxiliary winding Na of transformer 413 is for indirectly detecting secondary ON time Tons and secondary output voltage V out, for use in system control and output LED open-circuit-protection; The mult pin of the line voltage detection circuit input control chip 400 being formed by line detecting voltage resistance 403 and 404, be used for according to primary current peak value of each cycle of the size adjustment of line voltage, line voltage is higher, and primary current peak value is larger, thereby realizes high power factor (PF).Due to needs line voltage detection circuit and three windings of transformer needs, complex manufacturing technology, cost is higher.
Therefore, there is defect in prior art, needs to improve.
Utility model content
Technical problem to be solved in the utility model is: the LED lamp drive circuit that the former limit of a kind of double winding single-stage feedback is provided, need line voltage detection circuit and three windings of transformer needs to solve LED lamp drive circuit in prior art, complex manufacturing technology, the problem that cost is higher.
The technical solution of the utility model is as follows: the utility model provides the LED lamp drive circuit of the former limit of a kind of double winding single-stage feedback, comprising: alternating current input, the first rectification filtering module, absorption circuit, transformer, the second rectification filtering module, LED lamp incoming end, the first power tube, LED drives chip, the first resistance, the second resistance, the first electric capacity and the second electric capacity, described LED drives chip to have the first to the 5th pin, described the first rectification filtering module respectively with alternating current input, one end of the first resistance, absorption circuit, and transformer is electrically connected, the other end of described the first resistance respectively with one end of the first electric capacity, the first pin, and first power tube be electrically connected, described the first power tube also respectively with absorption circuit, transformer and the 5th pin are electrically connected, described transformer is also electrically connected with described the second rectification filtering module, described the second rectification filtering module is also electrically connected with LED lamp incoming end, one end of described the second resistance and the 4th pin are electrically connected, one end of described the second electric capacity and the 3rd pin are electrically connected, described the first rectification filtering module, the second pin, the other end of the first electric capacity, the other end of the second electric capacity, the other end of the second resistance, transformer and the second rectification filtering module are all electrically connected with ground wire,
Described LED drives chip to comprise: line voltage compensation module, sampling keeps module, constant current control and output open circuit protection module, error amplifier, clamper module, PWM comparator, logical AND driver module, erasing time detecting module, maximum turn-off time module, overvoltage/under-voltage module, saw-toothed wave generator, built-in power module and the second power tube, described error amplifier has the first in-phase input end, the first inverting input and the first output, described PWM comparator has the second in-phase input end, the second inverting input and the second output, described the first pin respectively with overvoltage/under-voltage module, built-in power module is electrically connected, described overvoltage/under-voltage module also respectively with logical AND driver module, built-in power module is electrically connected, described logical AND driver module also respectively with maximum turn-off time module, erasing time detecting module, the second power tube, the second output of PWM comparator and constant current control and output open circuit protection module are electrically connected, described the 3rd pin respectively with clamper module, the second inverting input of the first output of error amplifier and PWM comparator is electrically connected, and the second in-phase input end of described PWM comparator and described saw-toothed wave generator are electrically connected, and described the 4th pin keeps module with sampling respectively, second power tube be electrically connected, described the 5th pin respectively with erasing time detecting module, the second power tube is electrically connected, described sampling keep module also respectively with line voltage compensation module, constant current control and output open circuit protection module are electrically connected, described constant current control and output open circuit protection module also respectively with the first inverting input of error amplifier, erasing time detecting module and the second power tube are electrically connected, and the first in-phase input end of described error amplifier and described built-in power module are electrically connected.
Described the first power tube has first grid, the first source electrode and the first drain electrode, described first grid is electrically connected with the other end of the first pin, the first resistance, one end of the first electric capacity respectively, described the first source electrode and described the 5th pin are electrically connected, and described the first drain electrode is electrically connected with absorption circuit, transformer respectively.
Described the second power tube has second grid, the second source electrode and the second drain electrode, described second grid and described logical AND driver module are electrically connected, described the second source electrode keeps module to be electrically connected with the 4th pin, sampling respectively, and described the second drain electrode is electrically connected with erasing time detecting module, the 5th pin respectively.
Described transformer comprises former limit and secondary.
The 3rd electric capacity that described the first rectification filtering module comprises rectifier bridge and is connected in parallel with rectifier bridge, the 4th electric capacity that described the second rectification filtering module comprises the first diode and is connected in series with the first diode, the anode of described the first diode and described transformer are electrically connected, the negative electrode of described the first diode is electrically connected with one end, the LED lamp incoming end of described the 4th electric capacity respectively, and the other end of described the 4th electric capacity is used for connecting ground wire.
Described absorption circuit comprises: the 3rd resistance, the 5th electric capacity and the second diode, described the 3rd resistance one end is electrically connected with one end of the first rectification filtering module, the first resistance, one end and the transformer of the 5th electric capacity respectively, the other end of described the 3rd resistance is electrically connected with the other end of the 5th electric capacity, the negative electrode of the second diode respectively, and the anode of described the second diode respectively the first power tube, transformer is electrically connected.
Described erasing time detecting module comprises clamp diode, the first voltage comparator and logic lock storing module, described the first voltage comparator has the 3rd in-phase input end, the 3rd negative input and the 3rd output, the anode of described clamp diode respectively with the 5th pin, the first power tube, and the 3rd in-phase input end connect, the negative electrode of described clamp diode respectively with the first pin, the 3rd inverting input is electrically connected, described the 3rd output and described latching logic module are electrically connected, described latching logic module also respectively with described logical AND driver module, constant current control and output open circuit protection module are electrically connected.
Described constant current control and output open circuit protection module comprise: unity gain buffer, first to fourth switch, the 4th resistance, the 6th electric capacity, the 7th electric capacity, the first inverter, the second inverter, second voltage comparator, current source and three input NOR gate, described second voltage comparator has the 4th in-phase input end, the 4th inverting input and the 4th output, described unity gain buffer has the 5th in-phase input end, the 5th inverting input and the 5th output, described the 5th in-phase input end respectively with the 4th inverting input, sampling keeps module to be electrically connected, and described the 5th reverse input end and the 5th output are electrically connected, described the 5th output also with the first switch electric connection, described the first switch also respectively with erasing time detecting module, one end of the 4th resistance, second switch be electrically connected, the other end of described the 4th resistance respectively with logical AND driver module, one end of the 6th electric capacity is electrically connected, the other end of described the 6th electric capacity and ground wire electric connection, described second switch also respectively with the output of the first inverter, ground wire is electrically connected, the input of described the first inverter and the detecting module electric connection of described erasing time, described the 4th in-phase input end respectively with the 3rd switch, one end of the 7th electric capacity, the 4th switch is electrically connected, the electric connection of the other end of described the 7th electric capacity and ground wire, described the 3rd switch also respectively with current source, the output of the second inverter is electrically connected, described the 4th switch also respectively with the second power tube, the input of the second inverter and ground wire are electrically connected, described the 4th output respectively with logical AND driver module, three input NOR gate be electrically connected, described three input NOR gate also respectively with erasing time detecting module, the second power tube and logical AND driver module are electrically connected.
Adopt such scheme, the LED lamp drive circuit of the former limit of double winding single-stage of the present utility model feedback, it adopts the LED of source drive technology to drive chip, and indirectly to detect erasing time Tons(by the parasitic capacitance of outside the first power tube source-drain electrode be secondary ON time); Also realize very high power factor (PF) by the control method of fixing former limit ON time Tonp, alleviate electrical network pressure; By the corresponding technology of secondary ON time and primary current peak value, realize the open-circuit-protection of output LED; In addition, because driving chip, LED there is extremely low operating current, can be by the first resistance directly by line power voltage supply, thereby it is needed for drive the auxiliary winding of chip power supply and erasing time, output voltage detecting to LED to have omitted existing former limit feedback LED drive circuit, transformer only needs former limit winding and secondary winding, simplify the manufacturing process flow of transformer, further reduced cost.
Accompanying drawing explanation
Fig. 1 is the circuit diagram of existing former limit feedback LED drive circuit.
Fig. 2 is the circuit diagram of the LED lamp drive circuit of the former limit of the utility model double winding single-stage feedback.
Fig. 3 is the internal frame diagram that in the utility model, LED drives chip.
Fig. 4 is physical circuit and the annexation schematic diagram thereof of erasing time detecting module in the utility model.
Fig. 5 is the oscillogram of important node in Fig. 4.
Fig. 6 is the circuit diagram of constant current control and output open circuit protection module in the utility model.
Embodiment
Below in conjunction with the drawings and specific embodiments, the utility model is elaborated.
Refer to Fig. 2, the utility model provides the LED lamp drive circuit of the former limit of a kind of double winding single-stage feedback, comprising: alternating current input 12, the first rectification filtering module 14, absorption circuit 16, transformer 18, the second rectification filtering module 19, LED lamp incoming end 17, the first power tube Q1, LED drives chip 22, the first resistance R 1, the second resistance R 2, the first capacitor C 1 and the second capacitor C 2, described LED drives chip 22 to have the first to the 5th pin 1, 2, 3, 4, 5(vcc, gnd, comp, cs, S), described the first rectification filtering module 14 respectively with alternating current input 12, one end of the first resistance R 1, absorption circuit 16, and transformer 18 is electrically connected, the other end of described the first resistance R 1 respectively with one end of the first capacitor C 1, the first pin 1, and first power tube Q1 be electrically connected, described the first power tube Q1 also respectively with absorption circuit 16, transformer 18 and the 5th pin 5 are electrically connected, described transformer 18 is also electrically connected with described the second rectification filtering module 19, described the second rectification filtering module 19 is also electrically connected with LED lamp incoming end 17, one end of described the second resistance R 2 and the 4th pin 4 are electrically connected, one end of described the second capacitor C 2 and the 3rd pin 3 are electrically connected, described the first rectification filtering module 14, the second pin 2, the other end of the first capacitor C 1, the other end of the second capacitor C 2, the other end of the second resistance R 2, transformer 18 and the second rectification filtering module 17 are all electrically connected with ground wire.Described transformer 18 comprises former limit Np and secondary Ns, and described secondary Ns is for powering to LED lamp 20.
Wherein, described LED drives chip 22 directly to be powered by line voltage Vin by the first resistance R 1, because LED drives chip 22 operating currents low, can ignore it and bring impact to efficiency; Indirectly detect the erasing time by the parasitic capacitance Cds of the first power tube Q1 source-drain electrode, the combination of above two technology makes this LED lamp drive circuit can save the auxiliary winding of transformer and the circuit connecting thereof simultaneously; In addition by fixing former limit Np ON time Tonp technology, after this LED lamp drive circuit steady operation, former limit Np ON time of each cycle is the same, Vin is higher for this line-transect voltage, former limit peak current Ipp=(Vin/Lp) * Tonp is just higher, thereby realize very high power factor (PF), wherein, Lp is transformer primary side sensibility reciprocal.This control mode can be omitted line voltage detection circuit, can also avoid the distortion in line voltage Vin detecting and processing procedure, former limit peak current is directly directly proportional to line voltage Vin, has realized higher power factor (PF) (PF value) and less total harmonic distortion (THD).
Refer to Fig. 3, described LED drives chip 22 to comprise: line voltage compensation module 31, sampling keeps module 32, constant current control and output open circuit protection module 33, error amplifier 34, clamper module 35, PWM comparator 36, logical AND driver module 37, erasing time detecting module 38, maximum turn-off time module 39, overvoltage/under-voltage module 41, saw-toothed wave generator 42, built-in power module 43 and the second power tube Q2, described error amplifier 34 have the first in-phase input end+, the first inverting input-and the first output, described PWM comparator 36 have the second in-phase input end+, the second inverting input-and the second output, described the first pin 1 respectively with overvoltage/under-voltage module 41, built-in power module 43 is electrically connected, described overvoltage/under-voltage module 41 also respectively with logical AND driver module 37, built-in power module 43 is electrically connected, described logical AND driver module 37 also respectively with maximum turn-off time module 39, erasing time detecting module 38, the second power tube Q2, the second output of PWM comparator 36 and constant current control and output open circuit protection module 33 are electrically connected, described the 3rd pin 3 respectively with clamper module 35, the first output of error amplifier 34 and the second inverting input-electric connection of PWM comparator 36, the second in-phase input end of described PWM comparator 36+be electrically connected with described saw-toothed wave generator 42, described the 4th pin 4 keeps module 32 with sampling respectively, second power tube Q2 be electrically connected, described the 5th pin 5 respectively with erasing time detecting module 38, the second power tube Q2 is electrically connected, described sampling keep module 32 also respectively with line voltage compensation module 31, constant current control and output open circuit protection module 33 are electrically connected, described constant current control and output open circuit protection module 33 also respectively with the first inverting input of error amplifier 34-, erasing time detecting module 38 and the second power tube Q2 are electrically connected, the first in-phase input end of described error amplifier 34+be electrically connected with described built-in power module 43.
Described the first power tube Q1 has first grid g1, the first source electrode s1 and the first drain electrode d1, described first grid g1 is electrically connected with the other end of the first pin 1, the first resistance R 1, one end of the first capacitor C 1 respectively, described the first source electrode s1 and described the 5th pin 5 are electrically connected, and described the first drain electrode d1 is electrically connected with the former limit Np of absorption circuit 16, transformer 18 respectively.Described the second power tube Q2 has second grid g2, the second source electrode s2 and the second drain electrode d2, described second grid g2 and described logical AND driver module 37 are electrically connected, described the second source electrode s2 keeps module 32 to be electrically connected with the 4th pin 4, sampling respectively, and described the second drain electrode d2 is electrically connected with erasing time detecting module 38, the 5th pin 5 respectively.
The 3rd capacitor C 3 that described the first rectification filtering module 14 comprises rectifier bridge 15 and is connected in parallel with rectifier bridge 15, the 4th capacitor C 4 that described the second rectification filtering module 19 comprises the first diode D1 and is connected in series with the first diode D1, the secondary Ns of the anode of described the first diode D1 and described transformer 18 is electrically connected, the negative electrode of described the first diode D1 is electrically connected with one end, the LED lamp incoming end 17 of described the 4th capacitor C 4 respectively, and the other end of described the 4th capacitor C 4 is used for connecting ground wire.
Described absorption circuit 16 is for absorbing the self-induced e.m.f of the former limit of transformer 18 Np winding, it specifically comprises: the 3rd resistance R 3, the 5th capacitor C 5 and the second diode D2, described the 3rd resistance R 3 one end respectively with the first rectification filtering module 14, one end of the first resistance R 1, the former limit Np of one end of the 5th capacitor C 5 and transformer 18 is electrically connected, the other end of described the 3rd resistance R 3 respectively with the other end of the 5th capacitor C 5, the negative electrode of the second diode D2 is electrically connected, the anode of described the second diode D2 is the first power tube Q1 respectively, the former limit Np of transformer 18 is electrically connected.
Wherein, described sampling keeps module 32 for each cycle real-time sampling CS crest voltage, and keeps this peak level, until next former limit turn-on cycle resampling.Described line voltage compensation module 31, for AC-input voltage is carried out to CS peak compensation, makes the output current of (90-264 V) this LED lamp drive circuit within the scope of wide alternating current keep constant.Described saw-toothed wave generator 42 is for generation of sawtooth waveforms, this sawtooth waveforms be input to the second in-phase input end of PWM comparator 36+, compare with the first output output level comp of error amplifier 34, thereby determine former limit ON time Tonp of each cycle according to the size of average current.Described logical AND driver module 37 is for producing driving pulse according to each road signal, to drive the second inner integrated power tube Q2, by the conducting of the second power tube Q2, the 5th pin 5(S) the source electrode s1 of the first power tube Q1 dragged down, the first also conducting of power tube Q1, thus realize source drive.Described erasing time detecting module 38 is for indirectly detecting secondary ON time Tons by the parasitic capacitance Cds of the first power tube Q drain-source utmost point, and this secondary ON time Tons is for calculating the average current of LED lamp incoming end 17 according to former limit peak current.In addition LED drives chip 22 to be operated in critical discontinuous mode, and in the time that secondary ON time Tons finishes, the former limit Np of LED lamp drive circuit can start conducting, enters next cycle.Described maximum turn-off time module 39 for starting timing in the time that the former limit Np of LED lamp drive circuit turn-offs, when timing comes interim to maximum turn-off time Toff_max, the former limit Np of LED lamp drive circuit can open again, enter next cycle, so just avoid in the time of startup or output short-circuit, secondary Ns output voltage is very low, erasing time detecting module 38 is detected less than Tons, cause next cycle to open, in this case, LED lamp drive circuit can be opened once every the Toff_max time.Described built-in power module 43, for generation of internal source voltage 5V, thinks that LED drives the inner low-voltage device power supply of chip 22, and for generation of internal reference voltage.Described overvoltage/under-voltage module 41 drives the supply voltage vcc on chip 22 first pins 1 for detecting LED, when this supply voltage vcc is during lower than starting resistor threshold value Vst, LED drives chip 22 in closed condition, current sinking hardly, now line voltage Vin charges to the first capacitor C 1 by the first resistance R 1, when the voltage of the first capacitor C 1 is during higher than starting resistor threshold value Vst, LED drives chip 22 to start, and LED lamp drive circuit is started working.If after this there are various protections; LED drives chip 22 can close output pulse; and by an inside the second power tube Q2, this supply voltage vcc is pulled low to another threshold value VL(Vst>VL) below; LED drives chip 22 can again enter holding state, hardly current sinking.Then line voltage Vin charges again to the first capacitor C 1 by the first resistance R 1; until the voltage in the first capacitor C 1 is greater than starting resistor threshold value Vst; LED drives chip 22 again to start; so circulation; therefore LED drives the various protections of chip 22 all to have auto restore facility; once abnormal conditions disappear, LED drives chip 22 also to recover normal work by autoboot.Described clamper module 35 is for carrying out clamper to the output level comp of error amplifier 34 first outputs; make it be no more than 2V; because the slope of sawtooth waveforms is fixed; the clamper of output level comp by the first output can be controlled the maximum ON time of former limit Np like this; make it be no more than set point, to protect the safety of whole LED lamp drive circuit in the time that generation is abnormal.Described constant current control and output open circuit protection module 33, for the former limit crest voltage Vcsp sampling is converted to the average current of LED lamp incoming end 17 by computing, participate in the control of constant current loop, make constant output current; In addition it,, also by the corresponding technology between erasing time and this former limit crest voltage Vcsp, detects output voltage indirectly, for use in output LED open-circuit-protection.
Refer to Fig. 4 and Fig. 5, described erasing time detecting module 38 comprises clamp diode D3, the first voltage comparator 52 and logic lock storing module 54, described the first voltage comparator 52 have the 3rd in-phase input end+, the 3rd negative input-and the 3rd output, the anode of described clamp diode D3 respectively with the 5th pin 5, the first power tube Q1, and three in-phase input end+connection, the negative electrode of described clamp diode D3 respectively with the first pin 1, three inverting input-electric connection, described the 3rd output and described latching logic module 54 are electrically connected, described latching logic module 54 also respectively with described logical AND driver module 37, constant current control and output open circuit protection module 33 are electrically connected.
The detecting principle of secondary ON time Tons is as follows: when the signal gate on the second grid g2 of the second power tube Q2 is while being high, LED drives the second inner integrated power tube Q2 conducting of chip 22, signal on the 5th pin 5 is dragged down, because the first grid g1 of outside the first power tube Q1 directly connects supply voltage vcc, therefore the gate source voltage of the first power tube Q1 (Vgs=vcc-Vcs ≈ vcc) is opened threshold value much larger than it, therefore the first power tube Q1 conducting thereupon, it is the conducting of former limit, now the voltage peak-peak on the 5th pin 5 is that Vcsp is much smaller than supply voltage vcc, therefore (node is a) low level to the 3rd output of the first voltage comparator 52, in the time that former limit ON time Tonp finishes, signal gate on second grid g2 becomes low level, the second power tube Q2 closes, voltage on the 5th pin 5 raises, the first power tube Q1 closes thereupon immediately, the first drain electrode d1 terminal voltage of the first power tube Q1 be elevated to more taller than line voltage Vin after, after making secondary Ns voltage higher than output voltage V out, the first diode D1 forward conduction, secondary Ns starts conducting and discharges, in secondary Ns conduction period, transformer 18 maintains the first drain electrode d1 terminal voltage of the first power tube Q1 always higher than line voltage Vin.Turn-off at former limit Np, the process moment of secondary Ns conducting, because the first power tube Q1 has drain-source utmost point parasitic capacitance Cds, and according to circuit theory, electric capacity both end voltage is poor can not suddenly change, the sharply rising of the first drain electrode d1 terminal voltage (this drain-source utmost point parasitic capacitance Cds top crown voltage), the first source electrode s1 terminal voltage (this drain-source utmost point parasitic capacitance Cds bottom crown voltage) is also and then raised, and finally by clamp diode D3 clamper in the level of vcc+Vd (wherein, vcc is supply voltage, Vd is the forward conduction voltage drop of clamp diode), therefore in secondary Ns conducting moment, (node a) becomes high level from low level to the 3rd output of the first voltage comparator 52, latching logic module 54 is carried out latch and is delivered to logical AND driver module 37 it after detecting this rising edge, be that Tons becomes high level.Until secondary Ns discharges, secondary Ns voltage while end falls after rise rapidly like this, the voltage of node b also falls after rise rapidly, and enter resonance, the moment of falling after rise at the voltage of node b, because the both end voltage of the drain-source utmost point parasitic capacitance Cds of the first power tube Q1 can not be suddenlyd change, therefore the voltage on the 5th pin 5 also and then falls back to rapidly the level lower than supply voltage vcc, now (node is a) low level from high level upset to the 3rd output of the first voltage comparator 52, latching logic module 54 detects after this trailing edge latch immediately and is delivered to logical AND driver module 37, be that Tons becomes low level, then latch is always until the just release again while being high level of the signal gate on next cycle second grid g2, having avoided like this may be because the impact that the node a that resonance brings overturns repeatedly, therefore be high level at secondary Ns conducting phase Tons, in all the other times, be low level, thereby detected exactly secondary ON time Tons.In addition, LED drives chip 22 to work in critical discontinuous mode, in the time detecting secondary Ns electric discharge end, be that Tons is while being low from hypermutation, logical AND driver module 37 can be exported the second grid g2 of high level to the second power tube Q2 immediately, thereby makes the Np conducting of former limit, enters next cycle.
Secondary discharge peak currents Ips=Ipp* (Np/Ns); its limit, Central Plains peak current Ipp=Vcsp/Rcs; Vcsp is the crest voltage on former limit Np current sense resistance (i.e. the second resistance R 2); this crest voltage Vcsp can be sampled maintenance module 32 each cycles, and sampling should be carried out; and preserve this crest voltage Vcsp and input to constant current control and output open circuit protection module 33; Rcs is the resistance (resistance of the second resistance R 2) of primary current detecting resistance, and Np/Ns is the turn ratio of transformer primary secondary.And secondary output average current Io=(Ips*Tons)/(2*T)=[Vcsp* (Tons/T)] * [Np/ (2*Ns*Rcs)], T is switch periods.
Refer to Fig. 6, described constant current control and output open circuit protection module 33 comprise: unity gain buffer 55, first to fourth K switch 1, K2, K3, K4, the 4th resistance R 4, the 6th capacitor C 6, the 7th capacitor C 7, the first inverter 56, the second inverter 57, second voltage comparator 58, current source 59 and three input NOR gate 60, described second voltage comparator 58 have the 4th in-phase input end+, the 4th inverting input-and the 4th output, described unity gain buffer 55 have the 5th in-phase input end+, the 5th inverting input-and the 5th output, described the 5th in-phase input end+respectively and the 4th inverting input+, sampling keeps module 32 to be electrically connected, described the 5th reverse input end-with the 5th output electric connection, described the 5th output is also electrically connected with the first K switch 1, described the first K switch 1 also respectively with erasing time detecting module 38, one end of the 4th resistance R 4, second switch K2 be electrically connected, the other end of described the 4th resistance R 4 respectively with logical AND driver module 54, one end of the 6th capacitor C 6 is electrically connected, the other end of described the 6th capacitor C 6 and ground wire electric connection, described second switch K2 also respectively with the output of the first inverter 56, ground wire is electrically connected, and the input of described the first inverter 56 and described erasing time detecting module 38 are electrically connected, described the 4th in-phase input end+respectively and the 3rd K switch 3, one end of the 7th capacitor C 7, the 4th K switch 4 is electrically connected, and the other end of described the 7th capacitor C 7 and ground wire are electrically connected, described the 3rd K switch 3 also respectively with current source 59, the output of the second inverter 57 is electrically connected, described the 4th K switch 4 also respectively with the second power tube Q2, the input of the second inverter 57 and ground wire are electrically connected, described the 4th output respectively with logical AND driver module 37, three input NOR gate 60 is electrically connected, described three input NOR gate 60 also respectively with erasing time detecting module 38, the second power tube Q2 and logical AND driver module 37 are electrically connected.
The principle that described constant current control and output open circuit protection module 33 are exported average current signal Vavg is as follows: what the former limit peak current sampled signal Vcsp that there is no driving force was converted to current capacity by described unity gain buffer 55 follows voltage Vcs1, Vcs1=Vcsp; In the time that secondary Ns discharges, Tons is high level, the first K switch 1 conducting, and second switch K2 closes, and now follows voltage Vcs1 and charges to the 6th capacitor C 6 by the 4th resistance R 4; And in the other times that finish in secondary Ns electric discharge, the first K switch 1 is closed, second switch K2 conducting, now the 6th capacitor C 6 is discharged over the ground by the 4th resistance R 4.Because the 4th resistance R 4 and the 6th capacitor C 6 form RC filter circuit, in the time of LED lamp drive circuit steady operation, in the each semifocal chord of average current signal Vavg period of wave, its mean value is fixing identical, in each like this cycle, follow the quantity of electric charge Qin=[(Vcs1-Vavg that voltage Vcs1 charges to the 6th capacitor C 6)/R1] * Tons, and the electric weight Qout=(Vavg/R1 that capacitor C 6 of each cycle the 6th is discharged over the ground) * (T-Tons), average current signal Vavg its mean value within each semifocal chord period of wave is fixing identical when stablizing, therefore within each semifocal chord period of wave total charge capacity of the 6th capacitor C 6 will to equal total discharge electricity amount be Qin=Qout, therefore obtain Vavg=Vcsp* (Tons/T), and by we know secondary output average current above
Io=?[Vcsp*(Tons/T)]*[Np/(2*Ns*Rcs)]=Vavg*K
K=?Np/(2*Ns*Rcs)，
After the resistance Rcs of transformer 18 parameters of LED lamp drive circuit and primary current detecting resistance (the second resistance R 2) determines, K is exactly a constant, average current signal Vavg=Io/K, therefore average current signal Vavg is directly proportional to secondary output average current, can be used as the detection signal of secondary output average current.And the effect of error amplifier 34 is exactly regulation loop dynamically, make secondary output average current Io equal set point.In the time that secondary output average current Io is less than set point, internal reference voltage (being provided by built-in power module) is provided the mean value of Vavg, the output level (signal on the 3rd pin comp) of error amplifier 34 can be raised, make PWM comparator 36 export time of high level elongated, and then make former limit Np ON time elongated, former limit peak-current signal Vcsp also increases, thereby secondary output average current Io is also increased; Otherwise in the time that secondary output average current Io is greater than set point, constant current loop makes former limit peak current decline, former limit peak-current signal Vcsp declines, and secondary output average current Io declines thereupon.Under the dynamic adjustments of such loop, when final LED lamp drive circuit is stablized, in the semifocal chord period of wave after rectification, the average voltage of Vavg can equal internal reference voltage, therefore in whole semifocal chord period of wave, its output average current equals set point, and each semifocal chord is the same period of wave, thereby realize constant current output, with driving LED lamp 20.
In addition, due to external larger building-out capacitor the second capacitor C 2 of the 3rd pin 3, therefore in the time that LED lamp drive circuit is stablized, level on the 3rd pin 3 is stable substantially, thereby the former limit Np ON time Tonp in each cycle fixes, when each like this cycle former limit Np conducting, former limit peak current Ipp=(Vin/Lp) * Tonp, Lp is transformer primary side sensibility reciprocal, therefore along with the variation of the string wave envelope of line voltage Vin, Ipp also changes in proportion, on-Line Voltage Vin more eminence primary current Ipp is larger, the energy transmitting is also larger, thereby realize very high power factor (PF), effectively alleviate electrical network pressure.
The principle of output over-voltage protection (being LED open-circuit-protection) is as follows: in the time of the Np conducting of former limit, signal gate on the second power tube Q2 second grid g2 is high level, the 4th K switch 4 conductings, the 3rd K switch 3 is closed, the 7th capacitor C 7 is grounded, its both end voltage is 0, close and have no progeny at former limit NP, when secondary Ns starts conducting, signal gate on the second power tube Q2 second grid g2 is low level, the 3rd K switch 3 conductings, the 4th K switch 4 is closed, current source 59 starts to charge to the 7th capacitor C 7, in the 7th capacitor C 7, voltage Vc slowly rises from zero, when rising to this cycle while sampling the former limit crest voltage Vcsp threshold value keeping, the second comparator 58 overturns, turn-off from former limit Np, secondary Ns be conducting to that the second comparator 58 overturns we are referred to as minimum erasing time Tons_min during this period of time, Tons_min=(Vcsp*C7)/I1 so, I1 is the output current of current source 59, this time is directly proportional to this cycle former limit crest voltage Vcsp, because LED lamp drive circuit has Active PFC function, along with the rising of line voltage Vin semifocal chord ripple, former limit crest voltage Vcsp also increases, and therefore minimum erasing time Tons_min also can increase.And secondary ON time
Tons=(Ips*Ls)/(Vout+Vz)=[Vcsp*Np*Lp]/[Ns*Rcs*(Vout+Vz)]
Wherein K1=(Np*Lp)/(Ns*Rcs), Ls is secondary sensibility reciprocal to=[Vcsp/ (Vout+Vz)] * K1
After the resistance Rcs of transformer 18 parameters and the second resistance R 2 determines, K1 is exactly a constant, and secondary ON time Tons is directly proportional to former limit crest voltage Vcsp so, is inversely proportional to output voltage.Like this in the time of output LED open circuit; because former limit of each cycle can be to secondary Ns transmitting energy; output voltage can ceaselessly raise; secondary ON time Tons can ceaselessly dwindle; when narrowing down to, secondary ON time Tons is less than secondary ON time minimum value Tons_min; namely disconnected in the former frontier juncture of Tons_min=0, gate=0() and Tons=0(secondary electric discharge end); the outputs of three input NOR gate 60 can be overturn as high level so, and now we just think output LED open-circuit-protection has occurred.
The condition that LED open circuit occurs is Tons<Tons_min,
[Vcsp/(Vout+Vz)]*K1<(Vcsp*C7)/I1
Vout>K1*(I1/C7)
Therefore by output current I1, value, external transformer 18 parameters and the second resistance R 2 resistance Rcs of the 7th capacitor C 7 of appropriate design current source 59, we just can determine the threshold value of output over-voltage protection.By the corresponding technology of former limit crest voltage Vcsp and secondary ON time Tons, the impact that makes the threshold value of overvoltage protection not changed by former limit crest voltage Vcsp, thus make single-stage PFC system there is output LED open circuit protecting function.
In sum, the utility model provides the LED lamp drive circuit of the former limit of a kind of double winding single-stage feedback, it adopts the LED of source drive technology to drive chip, and indirectly to detect erasing time Tons(by the parasitic capacitance of outside the first power tube source-drain electrode be secondary ON time); Also realize very high power factor (PF) by the control method of fixing former limit ON time Tonp, alleviate electrical network pressure; By the corresponding technology of secondary ON time and primary current peak value, realize the open-circuit-protection of output LED; In addition, because driving chip, LED there is extremely low operating current, can be by the first resistance directly by line power voltage supply, thereby it is needed for drive the auxiliary winding of chip power supply and erasing time, output voltage detecting to LED to have omitted existing former limit feedback LED drive circuit, transformer only needs former limit winding and secondary winding, simplify the manufacturing process flow of transformer, further reduced cost.
These are only preferred embodiment of the present utility model, be not limited to the utility model, all any modifications of doing within spirit of the present utility model and principle, be equal to and replace and improvement etc., within all should being included in protection range of the present utility model.
Claims (8)
1. a LED lamp drive circuit for the former limit of double winding single-stage feedback, is characterized in that, comprising: alternating current input, the first rectification filtering module, absorption circuit, transformer, the second rectification filtering module, LED lamp incoming end, the first power tube, LED drives chip, the first resistance, the second resistance, the first electric capacity and the second electric capacity, described LED drives chip to have the first to the 5th pin, described the first rectification filtering module respectively with alternating current input, one end of the first resistance, absorption circuit, and transformer is electrically connected, the other end of described the first resistance respectively with one end of the first electric capacity, the first pin, and first power tube be electrically connected, described the first power tube also respectively with absorption circuit, transformer and the 5th pin are electrically connected, described transformer is also electrically connected with described the second rectification filtering module, described the second rectification filtering module is also electrically connected with LED lamp incoming end, one end of described the second resistance and the 4th pin are electrically connected, one end of described the second electric capacity and the 3rd pin are electrically connected, described the first rectification filtering module, the second pin, the other end of the first electric capacity, the other end of the second electric capacity, the other end of the second resistance, transformer and the second rectification filtering module are all electrically connected with ground wire,
Described LED drives chip to comprise: line voltage compensation module, sampling keeps module, constant current control and output open circuit protection module, error amplifier, clamper module, PWM comparator, logical AND driver module, erasing time detecting module, maximum turn-off time module, overvoltage/under-voltage module, saw-toothed wave generator, built-in power module and the second power tube, described error amplifier has the first in-phase input end, the first inverting input and the first output, described PWM comparator has the second in-phase input end, the second inverting input and the second output, described the first pin respectively with overvoltage/under-voltage module, built-in power module is electrically connected, described overvoltage/under-voltage module also respectively with logical AND driver module, built-in power module is electrically connected, described logical AND driver module also respectively with maximum turn-off time module, erasing time detecting module, the second power tube, the second output of PWM comparator and constant current control and output open circuit protection module are electrically connected, described the 3rd pin respectively with clamper module, the second inverting input of the first output of error amplifier and PWM comparator is electrically connected, and the second in-phase input end of described PWM comparator and described saw-toothed wave generator are electrically connected, and described the 4th pin keeps module with sampling respectively, second power tube be electrically connected, described the 5th pin respectively with erasing time detecting module, the second power tube is electrically connected, described sampling keep module also respectively with line voltage compensation module, constant current control and output open circuit protection module are electrically connected, described constant current control and output open circuit protection module also respectively with the first inverting input of error amplifier, erasing time detecting module and the second power tube are electrically connected, and the first in-phase input end of described error amplifier and described built-in power module are electrically connected.
2. the LED lamp drive circuit of the former limit of double winding single-stage according to claim 1 feedback, it is characterized in that, described the first power tube has first grid, the first source electrode and the first drain electrode, described first grid is electrically connected with the other end of the first pin, the first resistance, one end of the first electric capacity respectively, described the first source electrode and described the 5th pin are electrically connected, and described the first drain electrode is electrically connected with absorption circuit, transformer respectively.
3. the LED lamp drive circuit of the former limit of double winding single-stage according to claim 1 feedback, it is characterized in that, described the second power tube has second grid, the second source electrode and the second drain electrode, described second grid and described logical AND driver module are electrically connected, described the second source electrode keeps module to be electrically connected with the 4th pin, sampling respectively, and described the second drain electrode is electrically connected with erasing time detecting module, the 5th pin respectively.
4. the LED lamp drive circuit of the former limit of double winding single-stage according to claim 1 feedback, is characterized in that, described transformer comprises former limit and secondary.
5. the LED lamp drive circuit of the former limit of double winding single-stage according to claim 1 feedback, it is characterized in that, the 3rd electric capacity that described the first rectification filtering module comprises rectifier bridge and is connected in parallel with rectifier bridge, the 4th electric capacity that described the second rectification filtering module comprises the first diode and is connected in series with the first diode, the anode of described the first diode and described transformer are electrically connected, the negative electrode of described the first diode is electrically connected with one end, the LED lamp incoming end of described the 4th electric capacity respectively, and the other end of described the 4th electric capacity is used for connecting ground wire.
6. the LED lamp drive circuit of the former limit of double winding single-stage according to claim 1 feedback, it is characterized in that, described absorption circuit comprises: the 3rd resistance, the 5th electric capacity and the second diode, described the 3rd resistance one end is electrically connected with one end of the first rectification filtering module, the first resistance, one end and the transformer of the 5th electric capacity respectively, the other end of described the 3rd resistance is electrically connected with the other end of the 5th electric capacity, the negative electrode of the second diode respectively, and the anode of described the second diode respectively the first power tube, transformer is electrically connected.
7. the LED lamp drive circuit of the former limit of double winding single-stage according to claim 1 feedback, it is characterized in that, described erasing time detecting module comprises clamp diode, the first voltage comparator and logic lock storing module, described the first voltage comparator has the 3rd in-phase input end, the 3rd negative input and the 3rd output, the anode of described clamp diode respectively with the 5th pin, the first power tube, and the 3rd in-phase input end connect, the negative electrode of described clamp diode respectively with the first pin, the 3rd inverting input is electrically connected, described the 3rd output and described latching logic module are electrically connected, described latching logic module also respectively with described logical AND driver module, constant current control and output open circuit protection module are electrically connected.
8. the LED lamp drive circuit of the former limit of double winding single-stage according to claim 1 feedback, is characterized in that, described constant current control and output open circuit protection module comprise: unity gain buffer, first to fourth switch, the 4th resistance, the 6th electric capacity, the 7th electric capacity, the first inverter, the second inverter, second voltage comparator, current source and three input NOR gate, described second voltage comparator has the 4th in-phase input end, the 4th inverting input and the 4th output, described unity gain buffer has the 5th in-phase input end, the 5th inverting input and the 5th output, described the 5th in-phase input end respectively with the 4th inverting input, sampling keeps module to be electrically connected, and described the 5th reverse input end and the 5th output are electrically connected, described the 5th output also with the first switch electric connection, described the first switch also respectively with erasing time detecting module, one end of the 4th resistance, second switch be electrically connected, the other end of described the 4th resistance respectively with logical AND driver module, one end of the 6th electric capacity is electrically connected, the other end of described the 6th electric capacity and ground wire electric connection, described second switch also respectively with the output of the first inverter, ground wire is electrically connected, the input of described the first inverter and the detecting module electric connection of described erasing time, described the 4th in-phase input end respectively with the 3rd switch, one end of the 7th electric capacity, the 4th switch is electrically connected, the electric connection of the other end of described the 7th electric capacity and ground wire, described the 3rd switch also respectively with current source, the output of the second inverter is electrically connected, described the 4th switch also respectively with the second power tube, the input of the second inverter and ground wire are electrically connected, described the 4th output respectively with logical AND driver module, three input NOR gate be electrically connected, described three input NOR gate also respectively with erasing time detecting module, the second power tube and logical AND driver module are electrically connected.
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Granted publication date: 20140618 |