CN202948966U - High-voltage light-emitting diode (LED) chip with light guide columns - Google Patents

High-voltage light-emitting diode (LED) chip with light guide columns Download PDF

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Publication number
CN202948966U
CN202948966U CN 201220620995 CN201220620995U CN202948966U CN 202948966 U CN202948966 U CN 202948966U CN 201220620995 CN201220620995 CN 201220620995 CN 201220620995 U CN201220620995 U CN 201220620995U CN 202948966 U CN202948966 U CN 202948966U
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China
Prior art keywords
light
chip
led chip
guide columns
crystal grain
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Expired - Fee Related
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CN 201220620995
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Chinese (zh)
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王洪
叶菲菲
黄华茂
吴跃锋
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South China University of Technology SCUT
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South China University of Technology SCUT
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Abstract

The utility model discloses a high-voltage LED chip with light guide columns. The high-voltage LED chip is characterized in that the light guide columns with inclined angles are formed on sides of each crystalline grain unit of a high-voltage chip, and cross sections of the light guide columns are in wavy, triangular or semicircular periodic structures. By means of the light guide columns, incident angles of light beams transmitting from gallium nitride (GaN)-based LED materials to the air can be changed to prevent total reflection, losses caused by repeated reflection of the light beams in a GaN-based LED can be prevented simultaneously, and the side light emitting efficiency of the high-voltage LED chip is improved. Simultaneously, short circuit during connection bridge evaporation can be guaranteed against occurring due to regular trapezoid side angles, the light-emitting area of each crystalline grain can be increased due to the side wall light emitting, and losses caused by back and forth refraction and reflection of lights emitted from sides of the crystalline grains between the crystalline grains, between the crystalline grains and a substrate and in the crystalline grains can be reduced simultaneously.

Description

High-voltage LED chip with light-guiding pillar
Technical field
The utility model relates to the LED chip field, particularly has the high-voltage LED chip of light-guiding pillar.
Background technology
Along with improving and the development of multi-quantum pit structure of growth technology, the internal quantum efficiency of high-brightness LED has had very large improvement.At present, the light extraction efficiency of LED chip has become the principal element of restriction LED luminous efficiency.The existing technological approaches that improves the light extraction efficiency of chip mainly contains chip plastic technology, distribution bragg (DBR) speculum technology, flip chip technology, surface coarsening technology and photonic crystal technology.These technology are all at the luminosity that has improved in varying degrees the GaN based light-emitting diode, but they all concentrate on the light extraction efficiency in the front of improving chip.The character of lumination of light emitting diode is spontaneous radiation, there is no directivity, can be similar to that to regard isotropism as luminous.Therefore, above technology there is no improvement to the lateral emitting light extraction efficiency of LED chip.
The technology of existing raising side light extraction efficiency has hexagon chip and parallelogram chip, by changing the size of polygon interior angle, making can be in the another side outgoing at the light of chip a certain side generation total reflection, reach the purpose that improves light extraction efficiency, but this polygonal chip profile has certain difficulty aspect chip cutting, be unfavorable for scale of mass production.
The utility model content
For the subject matter that LED chip faces, the utility model provides the chip of the high-voltage LED with light-guiding pillar, and this structure fabrication is convenient, can improve the light extraction efficiency of high-voltage LED chip.The utility model adopts following technical scheme:
A kind of high-voltage LED chip with light-guiding pillar, pass through photoetching process, side in every of high pressure chip crystal grain unit forms the light-guiding pillar with angle of inclination, described side comprises epitaxial loayer side and side of substrate, and the shape of cross section of light-guiding pillar is waveform, triangle or semicircular periodic structure.
Further improved, the side of described every crystal grain unit has the angle of inclination at trapezoid base angle, and the base angle of trapezoid is 30 °-150 °.
Further improved, be etched with isolation channel between adjacent two crystal grain unit, the degree of depth of isolation channel extends downward sapphire layer.
Compared with prior art, the beneficial effects of the utility model and advantage: the incidence angle when light-guiding pillar can change light beam and is transmitted to air by GaN based light-emitting diode material is to avoid total reflection, the loss that can avoid simultaneously light beam to cause in the inner repeated reflection of this GaN based light-emitting diode reaches the purpose of the side light extraction efficiency that improves the high-voltage LED chip.Short circuit does not appear in this structure that has simultaneously a side angle in the time of can guaranteeing the evaporation connecting bridge, the sidewall bright dipping can increase the light-emitting area of every crystal grain, can reduce simultaneously the light that the crystal grain side sends between crystal grain and intergranule, crystal grain and substrate and the loss that catadioptric causes occurs back and forth for crystal grain inside, promote thus chip brightness, improved device reliability.
Description of drawings
Figure l is the end view that etches high-voltage LED chip after N-type GaN table top in execution mode.
Fig. 2 is the end view of high-voltage LED chip after the isolation channel etching in execution mode.
Fig. 3 is the vertical view of the single crystal grain of high-voltage LED chip unit after the isolation channel etching in execution mode.
Fig. 4 is the end view of high-voltage LED chip after in execution mode, insulative bridge is made.
Fig. 5 is the end view of high-voltage LED chip after electrode fabrication in execution mode.
Embodiment
Below in conjunction with drawings and Examples, the utility model is described in detail, but enforcement of the present utility model and protection range are not limited to this.
As Fig. 3 and Fig. 5, high-voltage LED chip with light-guiding pillar, comprise epitaxial loayer and substrate, specifically comprise single crystal grain unit 6, the light-guiding pillar 7 of single crystal grain cell edges, ITO transparency conducting layer 8, the SiO of sapphire layer 1, GaN resilient coating 2, N-type GaN3, mqw light emitting layer 4, P type GaN5, high-voltage LED chip 2Insulating barrier 9, P electrode 10, connecting electrode 11, N electrode 12.
As Fig. 3, characteristics of the present utility model are to pass through etching technics, side at every crystal grain list 6 of high pressure chip forms the light-guiding pillar 7 with angle of inclination, and etched surface comprises epitaxial loayer side and side of substrate, and the shape of cross section of light-guiding pillar is waveform, triangle or semicircular periodic structure.The side of described every crystal grain unit 6 has the angle of inclination (as Fig. 5) at trapezoid base angle, and the base angle of trapezoid is 30 °-150 °.Be etched with isolation channel between adjacent two crystal grain unit, the degree of depth of isolation channel extends downward sapphire layer 1(substrate).
Making flow process with high-voltage LED chip of light-guiding pillar:
1, pass through photoetching process, utilize approximately 11000-15000 degree of depth (depending on different epitaxial wafer growth structures, etching depth is different) of inductive couple plasma (ICP) etching, go out N-type GaN3 table top in the surface etch of every LEDs crystal grain, the N-type GaN3 of every LEDs crystal grain is exposed, as Fig. 1;
2, at the SiO of the surface deposition thickness 5000-10000 of epitaxial wafer 2Protective layer, and adopt the higher thick glue of resolution to make the photoresist protective layer of 4 μ m-7 μ m on the SiO2 layer, the isolation channel with preparation high-voltage LED chip prepares light guide column structure in the side of every little crystal grain simultaneously.
Concrete preparation method is as follows.At first prepare isolation channel pattern and light-guiding pillar 7 patterns by photoetching process at the photoresist protective layer, the light-guiding pillar pattern is that the cross section that is distributed in each little crystal grain edge is leg-of-mutton periodic structure.Recycling BOE solution (HF, NH 4The F mixed solution) etching SiO 2Protective layer exposes the GaN of little intergranule, thereby isolation channel pattern and light-guiding pillar design transfer is arrived SiO 2Layer; After requiring etching, the interior etching of groove is clean, without SiO 2Residual, and the light-guiding pillar shape is more complete.Then utilize inductive couple plasma (ICP) etching, isolation channel pattern and light-guiding pillar design transfer are arrived the GaN layer.Wherein, in the ICP etching process (etched surface comprises epitaxial loayer side and side of substrate), by regulating etching gas BCl 3And Cl 2Ratio, proportion is at 1:1 ~ 1:20, forming the trapezoid side angle of every little crystal grain, thereby the light-guiding pillar that preparation has laterally inclined angle.In order to form many mutual disjunct LED crystal grain, isolation channel need to etch into sapphire layer 1, determines that depending on the thickness of GaN epitaxial loayer etching depth is about 4um-7um, as Fig. 2.Vertical view such as Fig. 3 of single crystal grain unit after the isolation channel etching, the cross section at crystal grain edge is that leg-of-mutton periodic structure is light-guiding pillar 7.
3, at surperficial evaporation tin indium oxide (ITO) transparency conducting layer 8 of epitaxial wafer, by photoetching process, adopt method for chemially etching, only keep the ITO on p-type GaN5, in order to improve electric current in the uniformity of P type GaN surface distributed.Afterwards, at epitaxial wafer surface deposition thickness be 2000-7000 SiO 2Insulating barrier 9, by photoetching, wet etching, the electrode junction makes the bridge joint insulating barrier between groove, causes the P of same LEDs crystal grain, N layer to be connected and to cause electric leakage when after preventing, connecting electrode is made, as Fig. 4.
4, pass through photoetching process, make respectively P electrode 10 and N electrode 12 at described P electrode district and N electrode district, while evaporation connecting electrode 11 on the bridge joint insulating barrier, the P electrode 10 of one LEDs crystal grain is connected by connecting electrode with the N electrode 12 of another LED crystal grain, the plurality of LEDs intergranule is connected to form series circuit by connecting electrode, the high-voltage LED chip of complete is as Fig. 5.
The principle that the light-guiding pillar that the utlity model has laterally inclined angle improves high-voltage LED chip light emitting efficient is as follows.When light when having the crystal grain side outgoing of light-guiding pillar, owing on coarse exiting surface, scattering occuring, more light can fall into the transmissive zone of miniature scattering surface, and the bright dipping of crystal grain side is significantly strengthened, thereby improve the luminous efficiency of high-voltage LED chip.Simultaneously, because light-guiding pillar has the trapezoid angle of inclination, on the one hand can be so that the gradient of intergranule connecting electrode be comparatively mild, thus reduce the probability of short circuit; Light can also be reflected towards the chip surface direction on the other hand, reduce thus the light that the crystal grain side sends between crystal grain and intergranule, crystal grain and substrate and the loss that catadioptric causes occurs back and forth for crystal grain inside, thereby improve the luminous efficiency of high-voltage LED chip.

Claims (3)

1. high-voltage LED chip with light-guiding pillar, it is characterized in that passing through photoetching process, side in every of high pressure chip crystal grain unit forms the light-guiding pillar with angle of inclination, and the shape of cross section of light-guiding pillar is waveform, triangle or semicircular periodic structure.
2. the high-voltage LED chip with light-guiding pillar according to claim 1 is characterized in that the side of described every crystal grain unit has the angle of inclination at trapezoid base angle, and the base angle of trapezoid is 30 °-150 °.
3. the high-voltage LED chip with light-guiding pillar according to claim 1 is characterized in that being etched with isolation channel between adjacent two crystal grain unit, and the degree of depth of isolation channel extends downward sapphire layer.
CN 201220620995 2012-11-22 2012-11-22 High-voltage light-emitting diode (LED) chip with light guide columns Expired - Fee Related CN202948966U (en)

Priority Applications (1)

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Application Number Priority Date Filing Date Title
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103022298A (en) * 2012-11-22 2013-04-03 华南理工大学 High voltage LED chip with light guide pillar and preparation method of high voltage LED chip
CN111146316A (en) * 2020-02-21 2020-05-12 湘能华磊光电股份有限公司 Preparation method of RGB LED integrated display array

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103022298A (en) * 2012-11-22 2013-04-03 华南理工大学 High voltage LED chip with light guide pillar and preparation method of high voltage LED chip
CN103022298B (en) * 2012-11-22 2016-01-06 华南理工大学 High voltage LED chip with light-guiding pillar and preparation method thereof
CN111146316A (en) * 2020-02-21 2020-05-12 湘能华磊光电股份有限公司 Preparation method of RGB LED integrated display array
CN111146316B (en) * 2020-02-21 2021-08-27 湘能华磊光电股份有限公司 Preparation method of RGB LED integrated display array

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CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20130522

Termination date: 20151122

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