CN202772875U - Digital intermediate-frequency module based on software radio receiver - Google Patents

Abstract

The utility model discloses a digital intermediate-frequency module based on a software radio receiver. The digital intermediate-frequency module based on the software radio receiver belongs to the field of wireless mobile communication signal processing technology. The digital intermediate-frequency module based on the software radio receiver includes an analog-digital converter and a digital down-conversion circuit. The digital down-conversion circuit includes a mixer circuit and a decimation filtering circuit. The mixer circuit includes a mixer and a numerical control oscillator. The analog-digital converter is connected with the mixer. The mixer is connected with the numerical control oscillator and the decimation filtering circuit. The digital intermediate-frequency module based on the software radio receiver provided by the utility model is high in integration degree and can support four modulation systems, and is low in cost and good in flexibility.

Description

A kind of digital intermediate frequency module based on software radio receiver

Technical field

The utility model belongs to wireless mobile communications signal processing technology field, relates in particular to a kind of digital intermediate frequency module based on software radio receiver.

Background technology

Software radio is a kind of New Communication Technology that proposed in recent years, it has broken through the design limitations of traditional radio station take the hardware of function singleness, poor expandability as core, emphasize that the modularization take opening, the simplest standardized hardware are as communications platform, adopt Digital Signal Processing, realize radio function with scalable, reconfigurable application software as much as possible, so that wireless communication system has good versatility and flexibility, make the interconnected of system and upgrading very convenient.

Software radio is comprised of transmitter and receiver two parts, and they all are comprised of radio frequency (containing antenna) module, ifd module and signal processing unit three parts.The core concept of software radio is that A/D (D/A) is near antenna, radio frequency analog signal directly carries out digitlization as much as possible, it is transformed to the data flow that is suitable for digital signal processor or Computer Processing, then finish various functions by software, it is with good expansibility and applied environment adaptability.

Really, present science and technology does not also reach desirable software radio requirement, and this is because the restriction of sampling level, Digital Signal Processing.At present, signal processing unit has been realized digitized processing, and radio-frequency module and ifd module are still take analog as main.So the problem that software radio at first faces is exactly how the analog signal in the working band to be carried out digitlization, namely how to interested analog signal sampling.Analog has the insoluble problems such as frequency stability is poor, phase noise is large.Along with improving constantly of the chip technology levels such as analog-to-digital conversion (ADC), being digitized into of ifd module is possible, and developing flexible, general digitlization ifd module has become a kind of development trend.

Summary of the invention

Be analog quantity for the ifd module of mentioning the existing radio receiver in the above-mentioned background technology, there are the deficiencies such as frequency stability is poor, phase noise is large in the signal processing, the utility model proposes a kind of digital intermediate frequency module based on software radio receiver.

The technical solution of the utility model is, a kind of digital intermediate frequency module based on software radio receiver, be connected with signal processing unit with radio-frequency module respectively, consist of software radio receiver and transmitter, it is characterized in that this digital intermediate frequency module comprises analog to digital converter and Digital Down Convert circuit; Described Digital Down Convert circuit comprises mixting circuit and filtering extraction circuit; Mixting circuit comprises frequency mixer and digital controlled oscillator;

Described analog to digital converter is connected with frequency mixer; Frequency mixer is connected with the filtering extraction circuit with digital controlled oscillator respectively.

Circuit after described filtering extraction circuit is connected by the integral comb filter of setting quantity and half-band filter composes in parallel.

Described half-band filter is realized by the EP3C40F484C8FPGA chip.

Analog-digital conversion circuit as described, mixting circuit and integral comb filter select the AD6654 chip to realize.

Described half-band filter is realized by the EP3C40F484C8FPGA chip.

The utility model compared with prior art has following advantage:

1. the utility model can be supported multiple Digital Modulation standard, for the more modulation standards such as TD-SCDMA, CDMA2000, WCDMA, GSM provide a general solution;

2. the utility model requires high, as to realize principle complexity problem for the performance index of analog-to-digital conversion, digital controlled oscillator etc., has directly selected high performance asic chip AD6654 to process, and has guaranteed the reliability of system;

3. the function power of this digital ifd module can be developed as required, and the compatible radio frequency processing system that links to each other with the analog intermediate frequency system, can greatly save Financial cost;

4. for reaching specific purposes or realizing specific function, the utility model uses FPGA and carries out rational configuration, improves the flexibility of product;

5. this digital intermediate frequency process module realizes that digitlization with highly integrated, is conducive to develop the software radio receiver that volume is less, power consumption is lower, technology is more advanced, with better function.

Description of drawings

Fig. 1 is digital intermediate frequency module principle figure;

Fig. 2 is digital intermediate frequency module hardware structure chart.

Embodiment

Below in conjunction with accompanying drawing, preferred embodiment is elaborated.Should be emphasized that following explanation only is exemplary, rather than in order to limit scope of the present utility model and application thereof.

The utility model provides a kind of digital intermediate frequency module of supporting multiple Digital Modulation standard, and its function power can be developed as required, and the compatible radio frequency processing system that links to each other with the analog intermediate frequency system, greatly saves Financial cost.By the intermediate frequency process module being carried out digitlization with highly integrated, develop the software radio receiver that volume is less, power consumption is lower, technology is more advanced, with better function.

The utility model is achieved through the following technical solutions: based on the digital intermediate frequency module of software radio receiver, consisted of by analog to digital conversion circuit and Digital Down Convert circuit, the Digital Down Convert circuit comprises mixting circuit and filtering extraction circuit, mixting circuit comprises frequency mixer and digital controlled oscillator (NCO), the input of analog to digital conversion circuit is reference clock and the analog intermediate frequency two paths of signals of radio-frequency module, the output of analog to digital conversion circuit is connected with frequency mixer, the output of frequency mixer is connected with the input of filtering extraction circuit, the filtering extraction circuit output end sends the I/Q two paths of data, and digital controlled oscillator (NCO) is connected with frequency mixer.

The difference input is adopted in the analog intermediate frequency input that analog to digital converter receives, effectively reduce common mode disturbances, judge modulation classification according to reference clock, comprise TD-SCDMA, CDMA2000, WCDMA, GSM, then use different sampling rates, analog signal is transformed to digital signal.

Mixting circuit adopts digital frequency synthesis technology, digital processing is extended to after the quadrature modulation, filter just can be realized with digital method, also can not there be the imbalance of gain in I, Q two paths of data, add the low quadrature error of digital controlled oscillator (NCO), can make systematic error be reduced to the high accuracy scope of the lowest bit (LSB) of data.Digital controlled oscillator is the core of mixting circuit, its target is sine or the cosine wave sample that produces a desirable changeable frequency, and NCO has that frequency resolution height, frequency change speed are fast, the phase place characteristics such as the sine of linear change and generation and cosine signal orthogonal property be good continuously.

Integration pectination (CIC) filter and half-band filter (HBF) adopt the mode of cascade in the filtering extraction circuit, are used for filtering harmonic and out of band signal, prevent spectral aliasing, and data are carried out the reduction of speed rate extract.

The reference clock signal of digital intermediate frequency module is provided by the CDCE62005 chip, number conversion circuit, mixting circuit and integration pectination (CIC) filter select the AD6654 chip to realize, half-band filter (HBF) selects the EP3C40F484C8FPGA chip to realize.

As shown in Figure 1, the digital intermediate frequency module is comprised of analog to digital conversion circuit and Digital Down Convert circuit two parts.Analog to digital conversion circuit is made of analog to digital converter.The Digital Down Convert circuit is by mixting circuit and filtering extraction the electric circuit constitute.Mixting circuit comprises digital controlled oscillator (NCO) and frequency mixer.The filtering extraction circuit adopts respectively the mode of cascade to form by integration pectination (CIC) filter and half-band filter (HBF).Wherein, analog to digital converter links to each other with the radio-frequency module of outside, and analog to digital converter, frequency mixer, integration combed filter device and half-band filter are connected successively, and digital controlled oscillator links to each other with frequency mixer, and half-band filter links to each other with the external signal processing unit.

As shown in Figure 2, analog to digital converter, mixting circuit and integration pectination (CIC) filter realize that by the AD6654 chip half-band filter (HBF) is realized in the EP3C40F484C8FPGA chip.Select the CDCE62005 chip to provide reference clock for the digital intermediate frequency module.Wherein, the CDCE62005 chip links to each other with fpga chip with the AD6654 chip respectively, and reference clock is provided.The AD6654 chip links to each other with fpga chip, realizes the function of digital intermediate frequency module, and analog if signal produces the I/Q two paths of data and sends to signal processing unit after AD6654 chip and fpga chip processing.

In order to export good clock to analog to digital converter (ADC), the clock that the CDCE62005 chip provides to ADC uses LVPECL level difference AC-coupled mode to transmit.

The CDCE62005 chip is different to the clock of clock below different mode that ADC provides, and the sampling rate of WCDMA and TD-SCDMA is 92.16M; The sampling rate of GSM is 91M, and the sampling rate of CDMA2000 is 88.4376M.The CDCE62005 chip uses the LVCMOS level to the clock that fpga chip provides, and respectively corresponding three sampling clocks of three tunnel outputs are arranged, and frequency also is respectively 92.16M, 91M and 88.4376M.

Analog to digital converter is made analog-to-digital conversion to the intermediate-freuqncy signal of input, makes intermediate-freuqncy signal be converted to digital signal x (n) by analog signal x (t).The sampling plan that adopts in the analog to digital converter is bandpass sampling.If the analog if signal of input is x (t)=A (t) cos (ω _c+ φ (t))=A (t) cos (2 π f _cT+ φ (t)), wherein, A (t) is the signal transient amplitude, and φ (t) is the signal transient phase place, f _cBe the carrier frequency of input signal, ω _cAngular frequency and ω for signal _c=2 π fc.Analog if signal obtains digital signal x (n)=A (t) cos (ω after the ADC sampling _cN+ φ (n)).Analog to digital converter is realized by the AD6654 chip.The AD6654 chip is processed the data of self according to the clock frequency that the CDCE62005 chip provides.The AD6654 chip receives the analog if signal that sends over from radio frequency, and difference was inputted after an isolating transformer was passed through in the analog intermediate frequency input.The utility model uses 1: 1 isolating transformer, and the input end signal voltage swing is 1V.The difference input of analog intermediate frequency can effectively reduce common mode disturbances.In the situation of the insertion loss of ignoring transformer, the difference input resistance of ADC6654 chip is 1000 ohm, and the input impedance of input is 50 ohm.In the situation of 70MHz intermediate frequency, the signal to noise ratio of 5MHz signal is about 82 decibels.In order to guarantee 60 decibels signal to noise ratio, in the highest incoming frequency 82.5M, the shake of sampling clock is no more than 4 psecs.

Digital controlled oscillator in the Digital Down Convert circuit, frequency mixer and integration combed filter device are realized by the AD6654 chip.Analog if signal is converted to digital signal x (n) after analog to digital converter is processed.By Principle of Communication knowledge, digital medium-frequency signal will be down-converted to zero frequency signal, at first will carry out digital quadrature mixing in mixting circuit.The function of frequency mixer is the orthogonal sequence signal cos (ω that NCO is produced _cN) and sin (ω _cN) carry out digital mixing with input signal x (n), namely digital signal and orthogonal local oscillation sequence multiply each other in frequency mixer, obtain the two-way mixed frequency signal, $y_I\left(n\right)=\frac{A\left(n\right)}{2}\left\{\cos \right[2{\mathrm{\ω}}_{c}n+\mathrm{\φ}\left(n\right)]+\cos [\mathrm{\φ}\left(n\right)\left]\right\}$ With $y_Q\left(n\right)=\frac{A\left(n\right)}{2}\left\{\sin \right[2{\mathrm{\ω}}_{c}n+\mathrm{\φ}\left(n\right)]-\sin [\mathrm{\φ}\left(n\right)\left]\right\}.$ Have very high sample rate through the signal after the mixing, process so need to extract reduction of speed filtering to signal, obtain I road signal and Q road signal.Integration combed filter device is very useful in the extraction of high-speed sampling rate, and it is simple in structure, and processing speed is fast, does not especially carry out multiplying, high-speed data-flow can be carried out low-pass filtering.Signal after the mixing by integration combed filter device, is used for filtering harmonic and out of band signal, and the signal after the extraction still keeps original essential information.

FPGA receives from the signal of AD6654 chip through Digital Down Convert and CIC filtering, but the sampling rate of this moment is still very large, needs down-sampled.Although half-band filter needs multiplying, only have half of common finite impulse response (FIR) filter operand, it is a kind of efficient digital filter of realizing Digital Down Convert.The clock frequency that fpga chip provides according to the CDCE62005 chip is determined different modulation classifications, carry out down-sampled for corresponding half-band filter the transfer of data among the FIFO, mixed frequency signal can obtain I, Q two paths of signals after the filtering of integration combed filter device and half-band filter With

I, Q two paths of signals are respectively in-phase component and the quadrature component of baseband signal, and they are carrying all Useful Informations, send to signal processing unit by spi bus at last.Fpga chip is realized crystal oscillator chip CDCE62005 chip and AD6654 chip are carried out initial configuration, and by spi bus, realizes the communication to CDCE62005 chip, AD6654 chip and Digital Signal Processing.

The above; it only is the better embodiment of the utility model; but protection range of the present utility model is not limited to this; anyly be familiar with those skilled in the art in the technical scope that the utility model discloses; the variation that can expect easily or replacement all should be encompassed within the protection range of the present utility model.Therefore, protection range of the present utility model should be as the criterion with the protection range of claim.

Claims (4)

1. the digital intermediate frequency module based on software radio receiver is connected with signal processing unit with radio-frequency module respectively, consists of software radio receiver and transmitter, it is characterized in that this digital intermediate frequency module comprises analog to digital converter and Digital Down Convert circuit; Described Digital Down Convert circuit comprises mixting circuit and filtering extraction circuit; Mixting circuit comprises frequency mixer and digital controlled oscillator;

Described analog to digital converter is connected with frequency mixer; Frequency mixer is connected with the filtering extraction circuit with digital controlled oscillator respectively.

2. a kind of digital intermediate frequency module based on software radio receiver according to claim 1 is characterized in that the circuit after described filtering extraction circuit is by the integral comb filter of setting quantity and half-band filter series connection composes in parallel.

3. a kind of digital intermediate frequency module based on software radio receiver according to claim 2 is characterized in that described half-band filter realized by the EP3C40F484C8 fpga chip.

4. a kind of digital intermediate frequency module based on software radio receiver according to claim 1 is characterized in that analog-digital conversion circuit as described, mixting circuit and integral comb filter select the AD6654 chip to realize.

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