CN202735479U - Extensible boundary scan test system - Google Patents
Extensible boundary scan test system Download PDFInfo
- Publication number
- CN202735479U CN202735479U CN201220459333.7U CN201220459333U CN202735479U CN 202735479 U CN202735479 U CN 202735479U CN 201220459333 U CN201220459333 U CN 201220459333U CN 202735479 U CN202735479 U CN 202735479U
- Authority
- CN
- China
- Prior art keywords
- test
- jtag
- boundary scan
- controller
- interface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Landscapes
- Tests Of Electronic Circuits (AREA)
Abstract
The utility model belongs to the technical field of boundary scan test technology for electronic equipment, and specifically relates to an extensible boundary scan test system. The test system comprise a power supply, a test computer used to send out test instructions and receive test results, a JTAG controller used to receive the test instructions and generate JTAG test vectors, and a boundary scan extended module used to expand a coverage area of the scan test of a to-be-tested object. The JTAG controller controls the to-be-tested object and boundary scan devices in the boundary scan extended module simultaneously through each JTAG interface. The boundary scan extended module sends out test signals and sends the acquired test results to the test computer through the JTAG controller. The test system is suitable to be used in tests of circuit boards and cables, and can effectively perform test coverage on peripheral circuits which a conventional test cannot cover. An adapter in the boundary scan extended module makes the test system suitable to be used in digital circuits with various interfaces, and not only test coverage is improved, but also test cost is reduced.
Description
Technical field
The utility model belongs to the Boundary-scan test technology field of electronic equipment, is specifically related to a kind of expandable type boundary scan and test system.
Background technology
Along with development and the widespread use of encapsulation technology, little package technique and bare chip technology, Circuits System is fast-developing towards high density, high-speed, highly reliable and microminiaturized direction.Use in a large number highly dense PCB(Printed Circuit Board in the military electronics equipment, PCB), MCM(Multi-Chip Module, MCM), Systemon-board SoB(System on Board, SoB), SOC (system on a chip) SoC(System on Chip, SoC) and the high-density systems integrated package of the new technology such as bare chip and new technology, thus significantly improved the performance of military electronics equipment.These military electronics equipments are when function, technical indicator and reliability are largely improved, the difficulty of test and maintenance also increases greatly, conventional physical probe means have been difficult to finish the test of these complication systems, therefore the test problem of high density complex electronic equipment in the urgent need to address improves with the measurability of improving Circuits System with maintainable.
Boundary-scan test technology is with its distinctive " virtual probe " function, for a test difficult problem that solves the high-density systems integrated package provides strong means.Boundary-scan test technology is with the promulgation of IEEE1149.X series standard and be applied as sign, is a kind of being widely applied and continuous fast-developing main flow design for Measurability technology.The IEEE1149.X series standard is a kind of electronic system design for Measurability standard that the nineties formed to the beginning of this century in last century in the world; this series standard standard boundary scan test infrastructure; contained digital circuit boundary scan testing (IEEE1149.1); Digital Analog Hybrid Circuits boundary scan testing (IEEE1149.4); the contents such as module testing and Maintenance bus (IEEE1149.5) and high-speed digital circuit boundary scan testing (IEEE1149.6); the application of this series standard is the mainstream technology that improves the Circuits System measurability; IEEE1149.1 standard wherein; also claim JTAG(Joint Test Action Group; JTAG) standard; the JTAG standard provides extra measurability cost low because it is required; characteristics such as convenience and high-efficiency and successfully using have improved measurability and the maintainability of military electronics equipment system integration assembly.
Most of extensive device such as FPGA, DSP and microprocessor etc. are all supported boundary scan interface at present, can finish to a certain extent the design for Measurability of complicated circuit system, but support that at home the general practical boundary scan testing platform of IEEE1149.X series standard is less, and the test coverage that opposite side is swept the device periphery circuit is not high, test all-purpose is not strong, needs improvement badly.
The utility model content
The purpose of this utility model provides a kind of expandable type boundary scan and test system, this test macro not only goes for the test of multiple interfaces digital circuit board, and this test macro also can carry out effective Test coverage to peripheral circuit and wiring that single-board testing does not cover, thereby enlarged the coverage of digital circuit board coboundary sweep test, reduced testing cost.
For achieving the above object, the utility model has adopted following technical scheme: a kind of expandable type boundary scan and test system, and it comprises following ingredient:
Test computer is used for sending test instruction by Ethernet interface and ethernet controller to jtag controller successively, and is received from the test result that the jtag controller place sends by ethernet controller and Ethernet interface successively;
Jtag controller, be used for receiving the test instruction that test computer sends, and it is vectorial to produce the jtag test that meets the JTAG standard, described jtag controller links to each other with boundary scanning device two-way communication on the measured piece by jtag interface, and described jtag controller also links to each other with interface connector on the measured piece by the boundary scan expansion module;
The boundary scan expansion module, be used for the jtag test vector that sends by jtag interface reception jtag controller and produce test signal, the boundary scan expansion module sends the test signal that is used for the interface connector place device under test on the Test coverage measured piece and receives test result measured piece, and described test result is sent to jtag controller by jtag interface;
Power supply is used for providing electricity consumption to ethernet controller, jtag controller, boundary scan expansion module.
The utility model can also be able to further realization in the following manner simultaneously:
Preferably, described jtag controller comprises following ingredient:
Boundary scan controller, be used for receiving the test instruction that test computer sends by Ethernet interface and ethernet controller successively, and producing the jtag test vector that meets the JTAG standard, described boundary scan controller sends test result by ethernet controller and Ethernet interface to test computer successively; Described boundary scan controller also is connected by standard JTAG signal with the JTAG router;
The JTAG router, be used for by the multichannel jtag interface corresponding continuous with the jtag interface on the measured piece, described JTAG router is controlled described multichannel jtag interface and is sent simultaneously jtag test vector and collecting test result to measured piece and boundary scan expansion module, then the test result that collects is sent to boundary scan controller; Described JTAG router adopts standard JTAG signal to be connected with the boundary scan expansion module;
Power supply is with boundary scan controller and JTAG router and is electrically connected.
Preferably, described boundary scan expansion module comprises following ingredient:
Boundary scanning device is connected with the JTAG router communication by jtag interface, receives the jtag test vector from boundary scan controller, and produces test signal; Boundary scanning device sends test massage to measured piece by adapter, gathers simultaneously the test result of the next measured piece of adapter switching, by JTAG router and boundary scan controller test result is back to test computer successively again;
Adapter is used for making voltage signal between power supply and the measured piece to be complementary and/or the level signal between the interface connector of boundary scanning device and measured piece is complementary;
Power supply is with boundary scanning device and adapter and is electrically connected.
Further, described adapter is the cutting shape, and the two ends of adapter are provided with voltage conversion unit, and the middle part of adapter is provided with the level conversion parts.
As further technical scheme of the present utility model, described Ethernet interface, ethernet controller, boundary scan controller, JTAG router, boundary scanning device, adapter, power supply and multichannel jtag interface are all integrated and are installed on the same test base plate.
Described boundary scanning device comprises that the model of altera corp is the FPGA of EPF10K100 EBC356-3, and described FPGA is placed in the test base plate, links to each other with adapter by interface connector.
The beneficial effects of the utility model:
1), the jtag controller in the utility model comprises boundary scan controller and JTAG router, what described JTAG router adopted is that the single-point that the professional system-level interface chip of JTAG provides is linked into the multi-scanning chain structure, be used for converting the single channel jtag interface of boundary scan controller to multichannel, and can be controlled simultaneously by boundary scan controller.Also be that JTAG router in the utility model can simultaneously link to each other to form a plurality of branches link with a plurality of jtag interfaces, also have and support the diagnosis capability of isolating, thereby can select different branch's links to test.This test structure has not only increased the dirigibility of boundary scan testing, and so that boundary scan controller can be controlled many JTAG chains simultaneously, has enlarged test coverage, realizes system-level boundary scan testing.
2), the boundary scan expansion module in the utility model comprises boundary scanning device and adapter, described boundary scanning device is wide voltage interface device, is applicable to the various level such as LVTTL, TTL; The major function of described adapter is that the unit is swept on the limit that the IO with measured piece is forwarded to the boundary scanning device on the test base plate, thereby so that test computer can directly be controlled the jtag controller on the test base plate, sends test instruction, and receives test result.For the measured piece of distinct interface, need the different adapter of design.The design of adapter comprises the switching of measured piece interface connector on the one hand, be the mapping of annexation on the other hand, the design of adapter can be adopted the mode of printed board, also can adopt the mode of cable to connect, like this so that the difficulty of secondary development design adapter will be much smaller than the design of test base plate.
3), the utility model utilizes the interconnecting test in the boundary scan testing, interface connector in the measured piece is introduced the boundary scanning device of testing in the base plate by adapter, thereby increased the coverage of boundary scanning device, realize the expansion of boundary scan testing coverage rate, realized that also the peripheral circuit that the single-board testing in the boundary scan testing is not covered carries out effective Test coverage simultaneously.This scan test system both can detect the Wiring faults between each integrated circuit of measured piece itself, can detect again the fault such as short circuit (bridge joint), open circuit, fixed logic of the connection of interface connector of measured piece and interface circuit.
Description of drawings
Fig. 1 is structural representation of the present utility model.
Fig. 2 is adapter theory diagram of the present utility model.
Fig. 3 is the working state figure of boundary scan testing of the present utility model.
Fig. 4 is expanded circuit board test schematic diagram of the present utility model.
Fig. 5 is expansion cable test schematic diagram of the present utility model.
The implication of label symbol is as follows among the figure:
10-test computer, 20-Ethernet interface, 30-ethernet controller
40-jtag controller, 41-boundary scan controller, 42-JTAG router
50-boundary scan expansion module, 51-boundary scanning device, 52-adapter
60-power supply, 7 0-jtag interface 80-test base plate 90-measured piece
9OA-circuit-under-test plate 90B-tested cable 91-interface connector
Embodiment
As shown in Figure 1, a kind of expandable type boundary scan and test system, it comprises following ingredient:
Boundary scan expansion module 50, be used for to receive the jtag test vector that jtag controller 40 sends and produce test signal, 50 pairs of measured pieces of boundary scan expansion module send test massage and receive test result, and the test result that collects is sent to jtag controller 40;
When measured piece was carried out sweep test, power supply 60 provided electricity consumption by boundary scan expansion module 50 to measured piece.
Preferably, as shown in Figure 1, described jtag controller 40 comprises following ingredient:
Boundary scan controller 41, be used for receiving the test instruction that test computer 10 sends by Ethernet interface 20 and ethernet controller 30 successively, and producing the jtag test vector that meets the JTAG standard, described boundary scan controller 41 sends test result by ethernet controller 30 and Ethernet interface 20 to test computer 10 successively; Described boundary scan controller 41 also is connected with 2 two-way communications of JTAG router four;
JTAG router four 2, be used for by multichannel jtag interface 70 corresponding continuous with the jtag interface on the measured piece 90, the described multichannel jtag interface 70 of described JTAG router four 2 controls sends simultaneously the jtag test vector and gathers the test result of measured piece to measured piece and boundary scan expansion module 50, then the test result that collects is sent to boundary scan controller 41; Described JTAG router four 2 adopts standard JTAG signal to be connected with boundary scan expansion module 50;
Boundary scan controller 41 is the core of scan test system, and its generation meets the jtag test vector of IEEE1149.1 standard, to realize the boundary scan testing operation.Ethernet interface 20 among Fig. 1 also is the connection that the RJ45 interface can be realized networked physics layer, thereby makes scan test system have the remote testing function.
Preferably, as shown in Figure 1, described boundary scan expansion module 50 comprises following ingredient:
Further, as shown in Figure 1, boundary scanning device 51 on the test base plate 80 comprises that the FLEX10K serial model No. of altera corp is the FPGA of EPF10K100 EBC356-3, input and output pin compatibility 2.5V, the 3.3V of this device, 5V multiple voltage standard provide larger dirigibility for the design of adapter 52.Shown in Fig. 3,4,5, the FPGA on the described boundary scanning device 51 links to each other with adapter 52 by interface connector.During test, JTAG chain with boundary scanning device 51 on test base plate 80 directly accesses JTAG router four 2, all the other jtag interface access measured pieces, like this boundary scan controller 41 can control simultaneously test on the base plate 80 boundary scanning device 51 and the boundary scanning device on the measured piece, so that the two forms path, to finish the interconnecting test to the interface circuit at the interface connector place on the measured piece 90.
When being installed in adapter 52 on the test base plate 80, can slot be set at test base plate 80, and adapter 52 is installed in the slot gets final product.
Further, as shown in Figure 1, 2, described adapter 52 is the cutting shape, and the two ends of adapter 52 are provided with voltage conversion unit 521, and the middle part of adapter 52 is provided with level conversion parts 522.
Figure 2 shows that the schematic diagram of adapter 52, test base plate 80 provides two kinds of voltage types for adapter 52 altogether: direct current 5V and 3.3V, if the power demands of special voltage is arranged on the measured piece, then needing increases voltage conversion unit 521 so that measured piece 90 is powered at adapter 52.Except giving measured piece 90 power supplies, adapter 52 will shine upon accordingly to the IO pin in the measured piece 90 and the annexation of test base plate 80, the main principle of mapping is that the signal of same level type just can directly connect, if the signal of special level type is arranged, then need in adapter 52, to increase level conversion parts 522 to finish the Test coverage to this signal.
As further technical scheme of the present utility model, as shown in Figure 1, described Ethernet interface 20, ethernet controller 30, boundary scan controller 41, JTAG router four 2, boundary scanning device 51, adapter 52, power supply 60 and multichannel jtag interface 70 are all integrated and are installed on the same test base plate 80.
Be described further below in conjunction with Fig. 3～5 pair course of work of the present utility model.
Embodiment 1
Figure 3 shows that the schematic diagram of the measured piece of the present embodiment, comprise 2 FPGA and 2 dsp chips of all supporting international standard IEEE1149.1 in this measured piece 90, described 2 FPGA and 2 dsp chips are the boundary scanning device on the measured piece, also comprise 2 RAM, a NOR type FLASH and some interface circuits on the measured piece 90.Interface circuit 1 is to convert Transistor-Transistor Logic level to the RS422 level to send by external interface, interface circuit 2 is that the signal with external RS422 level converts TTL to and enters FPGA and process, interface circuit 3 is impact dampers of two-way Transistor-Transistor Logic level, and interface circuit 4 is impact dampers of two-way LVTTL.Described interface circuit 1, interface circuit 2, interface circuit 3, interface circuit 4 are the device under test at the interface connector place on the measured piece 90.
If not by this test macro, only measured piece 90 itself is done boundary scan testing, then the interface circuit on this measured piece 90 can't tested and covering.If carry out sweep test by this test macro, then measured piece 90 can all be scanned test and cover, thereby test specification is had a distinct increment.
The design of adapter 52 in the present embodiment, the interface circuit 1 of measured piece 90,2 RS422 level need to be changed into Transistor-Transistor Logic level and be connected to FPGA in the boundary scanning device 51, interface circuit 3,4 level meet the interface voltage scope of FPGA, so interface circuit 3,4 directly is connected to the IO pin of FPGA in the boundary scanning device 51 in adapter.
JTAG0～JTAG2 among Fig. 3 all accesses the JTAG router four 2 on the test base plate 80, send jtag test vector and the collecting test result who meets the JTAG standard by the boundary scan controller 41 on the test computer 10 control test base plates 80, send at last test computer 10 back to and analyze.
Embodiment 2
As shown in Figure 4, measured piece is circuit-under-test plate 90A, there is not jtag interface on the circuit-under-test plate 90A, when circuit-under-test plate 90A is carried out sweep test, with the JTAG router four 2 on the access of the JTAG0 interface on the boundary scanning device 51 test base plate 80, send jtag test vector and the collecting test result who meets the JTAG standard by the boundary scan controller 41 on the test computer 10 control test base plates 80, to realize the whole coverings to the IC1～IC5 on the circuit-under-test plate 90A.
Embodiment 3
As shown in Figure 5, measured piece is tested cable 90B, tested cable 90B also is that cable connector links to each other with adapter 52 by its interface connector, adapter 52 accesses respectively FPGA in the boundary scanning device 51 with tested cable 90B two ends, can record like this short circuit between tested all signals of cable 90B, open circuit and empty short, empty disconnected fault.
In sum, the utility model provides a kind of expandable type boundary scan and test system for the circuit test person.This system not only is applicable to the test of circuit board, also is applicable to wireline test.The peripheral circuit that conventionally test is not covered can carry out effective Test coverage, uses the adapter of simplicity of design so that this test macro is applicable to the digital circuit of various interface, has both improved test coverage, has reduced again testing cost.
Claims (6)
1. expandable type boundary scan and test system is characterized in that comprising following ingredient:
Test computer (10), be used for sending test instruction by Ethernet interface (20) and ethernet controller (30) to jtag controller (40) successively, and be received from the test result that jtag controller (40) is located to send by ethernet controller (30) and Ethernet interface (20) successively;
Jtag controller (40), be used for receiving the test instruction that test computer (10) sends, and it is vectorial to produce the jtag test that meets the JTAG standard, described jtag controller (40) links to each other with boundary scanning device two-way communication on the measured piece by jtag interface (70), and described jtag controller (40) also passes through boundary scan expansion module (50) and links to each other with interface connector on the measured piece;
Boundary scan expansion module (50), be used for the jtag test vector that sends by jtag interface reception jtag controller (40) and produce test signal, boundary scan expansion module (50) sends the test signal that is used for the interface connector place device under test on the Test coverage measured piece and receives test result measured piece, and described test result is sent to jtag controller (40) by jtag interface;
Power supply (60) is used for providing electricity consumption to ethernet controller (30), jtag controller (40), boundary scan expansion module (50).
2. expandable type boundary scan and test system according to claim 1 is characterized in that described jtag controller (40) comprises following ingredient:
Boundary scan controller (41), be used for receiving the test instruction that test computer (10) sends by Ethernet interface (20) and ethernet controller (30) successively, and producing the jtag test vector that meets the JTAG standard, described boundary scan controller (41) sends test result by ethernet controller (30) and Ethernet interface (20) to test computer (10) successively; Described boundary scan controller (41) also is connected by standard JTAG signal with JTAG router (42);
JTAG router (42), be used for by multichannel jtag interface (70) corresponding continuous with the jtag interface on the measured piece, described JTAG router (42) the described multichannel jtag interface of control (70) sends jtag test vector and collecting test result simultaneously to measured piece and boundary scan expansion module (50), then the test result that collects is sent to boundary scan controller (41); Described JTAG router (42) adopts standard JTAG signal to be connected with boundary scan expansion module (50);
Power supply (60) is with boundary scan controller (41) and JTAG router (42) and is electrically connected.
3. expandable type boundary scan and test system according to claim 2 is characterized in that described boundary scan expansion module (50) comprises following ingredient:
Boundary scanning device (51) by jtag interface and JTAG router (42) communication connection, receives the jtag test vector from boundary scan controller (41), and produces test signal; Boundary scanning device (51) sends test massage to measured piece (90) by adapter (52), gather simultaneously the test result of the next measured piece (90) of adapter (52) switching, by JTAG router (42) and boundary scan controller (41) test result is back to test computer (10) successively again;
Adapter (52) is used for making voltage signal between power supply (60) and the measured piece to be complementary and/or the level signal between the interface connector of boundary scanning device (51) and measured piece is complementary;
Power supply (60) is with boundary scanning device (51) and adapter (52) and is electrically connected.
4. expandable type boundary scan and test system according to claim 3, it is characterized in that: described adapter (52) is the cutting shape, the two ends of adapter (52) are provided with voltage conversion unit (521), and the middle part of adapter (52) is provided with level conversion parts (522).
5. according to claim 3 or 4 described expandable type boundary scan and test systems, it is characterized in that: described Ethernet interface (20), ethernet controller (30), boundary scan controller (41), JTAG router (42), boundary scanning device (51), adapter (52), power supply (60) and multichannel jtag interface (70) are all integrated and are installed on the same test base plate (80).
6. expandable type boundary scan and test system according to claim 5, it is characterized in that: described boundary scanning device (51) comprises that the model of altera corp is the FPGA of EPF10K100EBC356-3, described FPGA is placed in the test base plate (80), links to each other with adapter (52) by interface connector.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201220459333.7U CN202735479U (en) | 2012-09-11 | 2012-09-11 | Extensible boundary scan test system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201220459333.7U CN202735479U (en) | 2012-09-11 | 2012-09-11 | Extensible boundary scan test system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202735479U true CN202735479U (en) | 2013-02-13 |
Family
ID=47661164
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201220459333.7U Expired - Lifetime CN202735479U (en) | 2012-09-11 | 2012-09-11 | Extensible boundary scan test system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN202735479U (en) |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104914346A (en) * | 2015-05-07 | 2015-09-16 | 中国电子科技集团公司第三十八研究所 | Non-principle test device for general digital plug-ins and test method thereof |
| CN105207848A (en) * | 2015-09-25 | 2015-12-30 | 浪潮(北京)电子信息产业有限公司 | SerDes bit error rate detecting method and system based on embedded chip |
| CN105486999A (en) * | 2015-11-27 | 2016-04-13 | 中国电子科技集团公司第三十八研究所 | Boundary scanning digital circuit test system based on PXI bus and test method thereof |
| CN108614178A (en) * | 2016-12-09 | 2018-10-02 | 英业达科技有限公司 | Conduction detecting system suitable for RJ45 connectors |
| CN109557458A (en) * | 2018-12-26 | 2019-04-02 | 中国电子科技集团公司第四十研究所 | One kind being suitable for electronic equipment digital-to-analog circuit embedded test system |
| CN109655736A (en) * | 2018-12-21 | 2019-04-19 | 中国航空工业集团公司洛阳电光设备研究所 | A kind of quick pinpoint method of chip solder failure |
| CN109901002A (en) * | 2017-12-08 | 2019-06-18 | 英业达科技有限公司 | The pin connecting test system and method for connector |
| CN111579974A (en) * | 2020-06-09 | 2020-08-25 | 中国电子科技集团公司第十四研究所 | Tested module, embedded system and test method for realizing boundary scan test |
| CN111856251A (en) * | 2020-08-03 | 2020-10-30 | 泰州市博泰电子有限公司 | Mobile communication circuit board test system |
| CN113676946A (en) * | 2021-10-21 | 2021-11-19 | 湖南欧智通科技有限公司 | Extensible multiplexing WIFI module automatic test system |
-
2012
- 2012-09-11 CN CN201220459333.7U patent/CN202735479U/en not_active Expired - Lifetime
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104914346A (en) * | 2015-05-07 | 2015-09-16 | 中国电子科技集团公司第三十八研究所 | Non-principle test device for general digital plug-ins and test method thereof |
| CN104914346B (en) * | 2015-05-07 | 2017-11-17 | 中国电子科技集团公司第三十八研究所 | The non-principle system safety testing device and its method of testing of a kind of general digital plug-in unit |
| CN105207848A (en) * | 2015-09-25 | 2015-12-30 | 浪潮(北京)电子信息产业有限公司 | SerDes bit error rate detecting method and system based on embedded chip |
| CN105486999A (en) * | 2015-11-27 | 2016-04-13 | 中国电子科技集团公司第三十八研究所 | Boundary scanning digital circuit test system based on PXI bus and test method thereof |
| CN108614178A (en) * | 2016-12-09 | 2018-10-02 | 英业达科技有限公司 | Conduction detecting system suitable for RJ45 connectors |
| CN109901002A (en) * | 2017-12-08 | 2019-06-18 | 英业达科技有限公司 | The pin connecting test system and method for connector |
| CN109655736A (en) * | 2018-12-21 | 2019-04-19 | 中国航空工业集团公司洛阳电光设备研究所 | A kind of quick pinpoint method of chip solder failure |
| CN109557458A (en) * | 2018-12-26 | 2019-04-02 | 中国电子科技集团公司第四十研究所 | One kind being suitable for electronic equipment digital-to-analog circuit embedded test system |
| CN111579974A (en) * | 2020-06-09 | 2020-08-25 | 中国电子科技集团公司第十四研究所 | Tested module, embedded system and test method for realizing boundary scan test |
| CN111579974B (en) * | 2020-06-09 | 2021-09-03 | 中国电子科技集团公司第十四研究所 | Embedded system for realizing boundary scan test and test method |
| CN111856251A (en) * | 2020-08-03 | 2020-10-30 | 泰州市博泰电子有限公司 | Mobile communication circuit board test system |
| CN113676946A (en) * | 2021-10-21 | 2021-11-19 | 湖南欧智通科技有限公司 | Extensible multiplexing WIFI module automatic test system |
| CN113676946B (en) * | 2021-10-21 | 2022-02-11 | 湖南欧智通科技有限公司 | Extensible multiplexing WIFI module automatic test system |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN202735479U (en) | Extensible boundary scan test system | |
| CN201757767U (en) | General comprehensive automatic test system of airplane electronic part | |
| CN209299281U (en) | A kind of multi-functional cable net automatic testing equipment | |
| CN106597142B (en) | A kind of automatic testing equipment of SVG power module | |
| CN109901002A (en) | The pin connecting test system and method for connector | |
| CN100487473C (en) | Border scanning system and method | |
| CN109582004B (en) | Intelligent detection platform | |
| CN105203870A (en) | Intelligent transformer substation secondary equipment integrated test system based on power line communication | |
| CN102590733B (en) | Circuitry built-in test device based on boundary scanning mechanism | |
| CN103197176A (en) | High voltage direct current transmission valve control equipment testing system and method | |
| CN201637797U (en) | Testing machine | |
| CN104316814B (en) | A kind of aircraft cable inserting state automated detection system | |
| CN110161331A (en) | A kind of detection platform and control method merging complete set of equipments for one or two times | |
| CN109100579A (en) | A kind of high-speed data acquistion system and method for three-phase unbalance monitoring device | |
| CN203422426U (en) | Universal comprehensive automatic test system of airborne computer of civilian airliner | |
| CN110196381A (en) | A kind of cable general purpose automatic test system based on cpci bus | |
| CN209496282U (en) | The device of integration test unmanned plane undercarriage control controller | |
| CN104198852A (en) | Comprehensive recorder testing system | |
| CN209215442U (en) | Interconnecting device and adapting system | |
| CN108919790A (en) | A kind of portable united test test device of marine high-precision | |
| CN101763758B (en) | Relay protection wiring comprehensive operation training system | |
| CN203732662U (en) | On-vehicle ATP speed board test device | |
| CN109765480A (en) | A kind of test device and test equipment | |
| CN110780183B (en) | Interface circuit for JTAG boundary scan test | |
| CN102759674B (en) | Universal adapter for testing optocouplers |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CX01 | Expiry of patent term |
Granted publication date: 20130213 |
|
| CX01 | Expiry of patent term |