CN202721122U - 一种可调显色指数的led双晶贴片 - Google Patents

一种可调显色指数的led双晶贴片 Download PDF

Info

Publication number
CN202721122U
CN202721122U CN2012203098239U CN201220309823U CN202721122U CN 202721122 U CN202721122 U CN 202721122U CN 2012203098239 U CN2012203098239 U CN 2012203098239U CN 201220309823 U CN201220309823 U CN 201220309823U CN 202721122 U CN202721122 U CN 202721122U
Authority
CN
China
Prior art keywords
led chip
led
silver coating
color rendering
rendering index
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2012203098239U
Other languages
English (en)
Inventor
郑剑飞
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xiamen Dacol Photoelectronics Technology Co Ltd
Original Assignee
Xiamen Dacol Photoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xiamen Dacol Photoelectronics Technology Co Ltd filed Critical Xiamen Dacol Photoelectronics Technology Co Ltd
Priority to CN2012203098239U priority Critical patent/CN202721122U/zh
Application granted granted Critical
Publication of CN202721122U publication Critical patent/CN202721122U/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48257Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item

Landscapes

  • Led Device Packages (AREA)

Abstract

本实用新型涉及LED双晶贴片。本实用新型的一种可调显色指数的LED双晶贴片,包括第一LED芯片、第二LED芯片、承载上述LED芯片的支架、以及包覆上述LED芯片和部分支架的封装体。所述支架上设有放置LED芯片的杯碗、将LED芯片的正负极通过金线引出的正导电脚和负导电脚。所述杯碗内所述杯碗内设有金属热沉、镀银层,所述金属热沉位于镀银层之下并与其在结构上相配合,所述第一LED芯片、第二LED芯片位于镀银层之上并与其在结构上相配合,所述镀银层分别与第一LED芯片、第二LED芯片的正负极连接。所述第一LED芯片和第二LED芯片在支架上的放置呈对称结构,所述第一LED芯片是蓝光LED芯片,第二LED芯片是红光LED芯片,其表面涂覆黄色荧光粉或绿色荧光粉。

Description

一种可调显色指数的LED双晶贴片
技术领域
本实用新型涉及LED双晶贴片,具体涉及一种可调显色指数的LED双晶贴片。
背景技术
目前,市场上LED双晶结构设计的产品较多,由双蓝光芯片的较多,为了达到高显色指数大部分是用蓝光芯片搭配黄色荧光粉、绿色荧光粉、红色荧光粉来制备高显色性LED贴片灯,但是由于目前红粉的转换效率底,导致光通量低下。较难满足市场需求。市场上也有用RGB三晶结来调设高显色性LED贴片灯,但是其驱动电路复杂,需要通过调整三颗芯片的驱动电流来控制显色指数,成本较高。
可调显色指数的LED双晶光源同其他所有封装方式的LED光源一样,都需要解决光效、可靠性和成本三者的问题:光效是光通量与其消耗特定电能功率的比值;可靠性往往由光源散热性能决定;而成本主要体现在原材料选择方面,此三者发生相互制衡。在不同的需求下可能需要突出某方面的优化效果。比如,在成本和可靠性保持的情况下,实现高光通量,高显色性,这样的议题在大量LED光源生产中显得尤其重要。作为商品,实现其成本下的性能控制,是一种必然的诉求。所以,如何在维持较好的成本和可靠性的同时,提高贴片LED光源的光效和显色性是这类贴片LED封装结构设计的一个必然需求。
实用新型内容
本实用新型所要解决的技术方案是,提供一种可调显色指数的LED双晶贴片,通过使用红光LED芯片、蓝光LED芯片、以及与黄色荧光粉或绿色荧光粉的结合,从而提高显色性;并通过调整红光LED芯片的驱动电流即可调整该LED双晶贴片光源的显色指数,有效地简化了电路的设计,进而达到降低成本的目的。
为了解决上述技术问题,本实用新型的一种可调显色指数的LED双晶贴片,包括第一LED芯片、第二LED芯片、承载上述LED芯片的支架、以及包覆上述LED芯片和部分支架的封装体。所述支架上设有放置LED芯片的杯碗、将LED芯片的正负极通过金线引出的正导电脚和负导电脚。所述杯碗内设有金属热沉、镀银层,所述金属热沉位于镀银层之下并与其在结构上相配合,所述第一LED芯片、第二LED芯片位于镀银层之上并与其在结构上相配合,所述镀银层分别与第一LED芯片、第二LED芯片的正负极连接。
其中,第一LED芯片和第二LED芯片在支架上的放置呈对称结构。第一LED芯片和第二LED芯片的内侧相距范围为0.50-0.70mm,其分别距离金属热沉边缘的距离范围为0.05-0.10mm。第一LED芯片是蓝光LED芯片,第二LED芯片是红光LED芯片,该两颗LED芯片的固晶位置在同一平面上,并在其表面涂覆黄色荧光粉或绿色荧光粉,组成三种或四种连续的光谱,显色指数高达95。蓝光LED芯片在额定电流驱动的情况下,通过调整红光LED芯片的驱动电流,可以使LED贴片的显色指数变化,当所组成的光谱比例为蓝:绿:红为1:3:6时显色效果最佳,从而实现高显色性的LED封装工艺。所述蓝光LED芯片驱动电流为额定电流,红光LED芯片的驱动电流可以从零到额定电流。
进一步的,镀银层配合于金属热沉的表面,与第一LED芯片、第二LED芯片的正负电极连接,并具有与上述LED芯片的底部相结合的固定部分。镀银层是采用化学电镀法将其制成镜面光亮状的镜面亮银,从而使LED芯片的光线充分反射,提高了整个封装结构的光效。
进一步的,金属热沉是使用C194铜材料制成,位于所述固晶位置的金属和焊线的位置,具有与第一LED芯片、第二LED芯片底部对应的镀银层相配合的下底面。
本实用新型采用上述结构,具有如下优点:
1. 第一LED芯片、第二LED芯片分别由蓝光和红光LED芯片组成,并搭配黄色荧光粉或绿色荧光粉可组成四个连续光谱,其显色性可以达到95;
2.镀银层的镜面光银将源自两颗LED芯片的光线充分反射,提高了整个封装结构的光效,实现了高光效、高可靠性的LED封装工艺;
3.将蓝光LED芯片用额定电流驱动,通过调整红光LED芯片的驱动电流以控制LED芯片的显色指数和色温,该方式有效的降低了电路设计成本。
附图说明
图1是本实用新型的实施例的俯视示意图。
具体实施方式
现结合附图和具体实施方式对本实用新型进一步说明。
作为本实用新型的一个优选的实施例,如图1所示,本实用新型的一种可调显色指数的LED双晶贴片,包括第一LED芯片1、第二LED芯片2、承载上述LED芯片的支架4、以及包覆上述LED芯片和部分支架的封装体。所述支架4上设有放置LED芯片的杯碗3、将LED芯片的正负极通过金线5引出的正导电脚和负导电脚、以及隔层6。所述杯碗3内设有金属热沉、镀银层,所述金属热沉位于镀银层之下并与其在结构上相配合,所述第一LED芯片1、第二LED芯片2位于镀银层之上并与其在结构上相配合,所述镀银层分别与第一LED芯片1、第二LED芯片2的正负极连接。
第一LED芯片1和第二LED芯片2在支架4上的放置位于同一平面上,且呈对称结构。第一LED芯片和第二LED芯片的内侧相距d的范围为0.50-0.70mm,其分别距离金属热沉边缘的距离范围为0.05-0.10mm。第一LED芯片1是蓝光LED芯片,第二LED芯片2是红光LED芯片,在其表面涂覆黄色荧光粉或绿色荧光粉,组成三种或四种连续的光谱,显色指数高达95。蓝光LED芯片在额定电流驱动的情况下,通过调整红光LED芯片的驱动电流,可以使LED贴片的显色指数变化,当所组成的光谱比例为蓝:绿:红为1:3:6时显色效果最佳,从而实现高显色性的LED封装工艺。所述蓝光LED芯片驱动电流为额定电流,红光LED芯片的驱动电流可以从零到额定电流。
镀银层配合于金属热沉的表面,与第一LED芯片1、第二LED芯片2的正负电极连接,并具有与上述LED芯片的底部相结合的固定部分。镀银层是采用化学电镀法将其制成镜面光亮状的镜面亮银,从而使LED芯片的光线充分反射,提高了整个封装结构的光效。
金属热沉是使用C194铜材料制成,位于所述固晶位置的金属和焊线的位置,具有与第一LED芯片1、第二LED芯片2底部对应的镀银层相配合的下底面。
尽管结合优选实施方案具体展示和介绍了本实用新型,但所属领域的技术人员应该明白,在不脱离所附权利要求书所限定的本实用新型的精神和范围内,在形式上和细节上可以对本实用新型做出各种变化,均为本实用新型的保护范围。 

Claims (4)

1.一种可调显色指数的LED双晶贴片,其特征在于:包括第一LED芯片、第二LED芯片、承载上述LED芯片的支架、以及包覆上述LED芯片和部分支架的封装体;
所述支架上设有放置LED芯片的杯碗、将LED芯片的正负极通过金线引出的正导电脚和负导电脚;
所述杯碗内设有金属热沉、镀银层,所述金属热沉位于镀银层之下并与其在结构上相配合,所述第一LED芯片、第二LED芯片位于镀银层之上并与其在结构上相配合,所述镀银层分别与第一LED芯片、第二LED芯片的正负极连接;
所述第一LED芯片和第二LED芯片在支架上的放置呈对称结构,所述第一LED芯片是蓝光LED芯片,第二LED芯片是红光LED芯片,其表面涂覆黄色荧光粉或绿色荧光粉。
2.根据权利要求1所述的可调显色指数的LED双晶贴片,其特征在于:所述第一LED芯片和第二LED芯片的内侧相距范围为0.50-0.70mm。
3.根据权利要求1所述的可调显色指数的LED双晶贴片,其特征在于:所述镀银层是采用化学电镀法将其制成镜面光亮状的镜面亮银。
4.根据权利要求1所述的可调显色指数的LED双晶贴片,其特征在于:所述金属热沉是使用C194铜材料制成。
CN2012203098239U 2012-06-29 2012-06-29 一种可调显色指数的led双晶贴片 Expired - Fee Related CN202721122U (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2012203098239U CN202721122U (zh) 2012-06-29 2012-06-29 一种可调显色指数的led双晶贴片

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2012203098239U CN202721122U (zh) 2012-06-29 2012-06-29 一种可调显色指数的led双晶贴片

Publications (1)

Publication Number Publication Date
CN202721122U true CN202721122U (zh) 2013-02-06

Family

ID=47622932

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2012203098239U Expired - Fee Related CN202721122U (zh) 2012-06-29 2012-06-29 一种可调显色指数的led双晶贴片

Country Status (1)

Country Link
CN (1) CN202721122U (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103928449A (zh) * 2014-03-28 2014-07-16 山东明华光电科技有限公司 蓝白双晶大功率led
CN109119517A (zh) * 2018-09-12 2019-01-01 宁波升谱光电股份有限公司 一种贴片式led及其制备方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103928449A (zh) * 2014-03-28 2014-07-16 山东明华光电科技有限公司 蓝白双晶大功率led
CN109119517A (zh) * 2018-09-12 2019-01-01 宁波升谱光电股份有限公司 一种贴片式led及其制备方法

Similar Documents

Publication Publication Date Title
WO2010066128A1 (zh) Led小功率发光芯片的封装模块
CN106328638A (zh) 一种cob光源
CN105489738B (zh) 色温显指可调的白光led器件、其制备方法及调控方法
CN104282676A (zh) 一体式led灯板封装结构及封装工艺
CN204118067U (zh) 直接封装于散热器的led芯片封装架构
CN203631549U (zh) 一种色温可调节的功率型cob集成封装结构
CN203260639U (zh) 高光效散热好的cob光源
CN103337582B (zh) Led光源及其制造方法
CN202721122U (zh) 一种可调显色指数的led双晶贴片
CN202205744U (zh) 提高多led芯片白光光源显色指数和光通量的封装结构
CN202855798U (zh) 一种可调光cob封装结构
CN204045626U (zh) 多族阵列的发光二极管板上芯片封装结构
CN207097867U (zh) 一种无荧光粉型黄白光led路灯
CN202598261U (zh) 一种高亮度高显色指数的暖白光led灯及led模组
CN106960840A (zh) 一种可调色温的led光源
CN201966209U (zh) 混光式多晶封装结构
CN206490059U (zh) 一种可调色温倒装cob封装结构
CN201946591U (zh) 一种双晶led封装结构
CN204271135U (zh) 光电转换效率高的光源模组
CN203322806U (zh) 一种线性发光的led光源模组
CN203553164U (zh) 高显色led灯丝
CN206992108U (zh) 一种可调色温的led光源
CN202549924U (zh) 新型led器件
CN208189630U (zh) 一种led灯集成封装结构
CN204927326U (zh) 一种采用倒装芯片的高光效高显指led灯管

Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
PE01 Entry into force of the registration of the contract for pledge of patent right

Denomination of utility model: LED (light emitting diode) double crystal patch with adjustable color rendering index

Effective date of registration: 20150923

Granted publication date: 20130206

Pledgee: China Co truction Bank Corp Xiamen branch

Pledgor: Xiamen Colorful Optoelectronics Technology Co.,Ltd.

Registration number: 2015350000074

PLDC Enforcement, change and cancellation of contracts on pledge of patent right or utility model
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20130206

Termination date: 20190629