CN202494778U - Ionosonde pulse compressed coding and decoding device - Google Patents

Abstract

The utility model provides an ionosonde pulse compressed coding and decoding device which comprises a direct digital frequency synthesizer, a digital correlator, a program-controlled channel switch, signal storing devices and a digital adder. The direct digital frequency synthesizer outputs high-frequency pulse signals which are modulated by a binary phase; the digital correlator receives quadrature modulated encoded baseband signals, extracts effective echo signals in two-way encoded baseband signals, buffers the echo signals by using a data buffering area of an FIFO mode, carries out correlation calculation on the echo signals and a local decoding template, and outputs decoded echo signals; the program-controlled channel switch receives decoded echo signals outputted by the digital correlator and transmits the decoded echo signals to the signal storing devices; the signal storing devices store the decoded echo signals; and the digital adder reads out and superposes the echo signals stored in the signal storing devices to acquire sharp pulse signals which are used as ionospheric echo signals and transmitted to the following equipment. Based on high-speed large-scale digital logic circuits and DDS technology, the ionosonde pulse compressed coding and decoding device provided by the utility model realizes radio frequency pulse code modulation and decoding on the basis of four-dimensional sequence in the ionosonde.

Description

A kind of ionosonde pulse compression encoding/decoding device

Technical field

The utility model relates to a kind of device that the paired pulses radiofrequency signal is carried out coded modulation and decoding that is used for, especially a kind of ionosonde pulse compression encoding/decoding device.

Background technology

Ionosonde is convenient to build up the ionosphere integrated information that the multiple spot detection network obtains global range as the ionospheric main conventional equipment of the vertical observation in ground, can follow the tracks of ionosphere for a long time and change.Be ionospheric observation, research provides important measurement data always.

The ultimate principle of ionospheric vertical sounding appearance is exactly to ionosphere emission different frequency (1～30MHz) high frequency detectable signal; Based on the vertical reflection phenomenon of ionosphere to radiowave; Receive the echoed signal of returning because of reflection on ground, obtain ionospheric characteristic parameter thereby echoed signal analyzed and calculate.Principle according to ionospheric vertical sounding; The instrument of realizing a whole set of function of electric wave modulation, coding, emission, reception and analytical calculation is called as ionosonde; Because modern ionosonde has adopted a large amount of digital circuits and Digital Signal Processing, often be called as ionosphere numeral altimeter again.

In order to improve intensity and the signal to noise ratio (S/N ratio) that receives echo; Early stage altimeter has adopted the pulse peak power emission high-frequency impulse of multikilowatt; Existing ionosonde improves the peak power of burst pulse through the compression of broad pulse, thereby existing pulse peak power is reduced to the hectowatt rank through using the pulse compression technique in the pulsed radar; Reduced the power designs of altimeter system power transmitter, the interference of when also having reduced altimeter work short-wave band having been broadcasted.

Used Barker code (one dimension simple sequence) to come in the existing ionosonde system to the high-frequency impulse emission and decoding compressed of encoding.Coding method is that the wide pulse signal of different carrier frequencies is carried out the binary phase modulation by Barker code; Radio-frequency pulse after will modulating then is transmitted into ionosphere, to the echo that receives through with local oscillator mixing and quadrature demodulation after obtain the baseband signal of amplitude with phase change, use analog to digital conversion that baseband signal is transformed to digital signal; This digital signal is carried out computing cross-correlation with Barker code (identical with the used Barker code of coding); After obtaining decoding, the narrow pulse signal after promptly compressing is if use 13 the longest Barker codes; Burst pulse time width after the compression is 1/13 of a broad pulse; The burst pulse peak-to-peak amplitude improves 13 times, and signal to noise ratio (S/N ratio) can improve about 3.6 times, has solved the contradiction between measuring distance and the range resolution simultaneously.But still there is following defective in prior art:

1) select for use the one dimension simple sequence to carry out the binary encoding and decoding, have only Barker code can obtain best main peak secondary lobe ratio behind the correlation demodulation, the longest known Barker code has only 13 at present, wants to use longer sign indicating number to obtain bigger long-pending can't the realization of time wide bandwidth.

2) as long as adopt the encoding and decoding of one dimension simple sequence; Secondary lobe behind the correlation demodulation just can not be zero; Echo after relevant decoding except obtaining at the true altitude place the correct main peak echoed signal, also can be at some other highly obtain the false echo signal that causes because of secondary lobe.

3) relevant decoding can suppress high frequency noise, but if exist low frequency, the gradual undesired signal of direct current or system to have dc error signal in the echo baseband signal, can cause that all baseline is non-vanishing in the echo baseband signal, and the baseline wander phenomenon.And the relevant decoding of one dimension simple sequence can strengthen the side-play amount of this baseline, thereby causes true echoed signal to be submerged under the baseline, can't discern.

4) existing ionosonde also receives the coded pulse of one dimension simple sequence through repeat its transmission, and stack decoding back echo improves signal to noise ratio (S/N ratio), but still can not fundamentally overcome the above problems.

5) also there is the two-dimensional sequence of employing to realize coding and decoding; But only used software approach to handle the coding and decoding process of pulse; Adopt software processes pulse encoding and decoding will cause processing speed slow, real-time is poor, and extend measuring period; System's pulse repetition rate is difficult to improve, and is difficult to satisfy the needs of ionosphere quick detection.

The utility model content

The purpose of the utility model is: a kind of ionosonde pulse compression encoding/decoding device is provided, uses digital codec hardware circuit, guaranteed the stability and the reliability of coding-decoding circuit work, also make machine system more simplify and miniaturization.

The utility model is to solve the problems of the technologies described above the technical scheme of being taked to be: a kind of ionosonde pulse compression encoding/decoding device is characterized in that: it comprises Direct Digital Frequency Synthesizers, digital correlator, program control channel switch, signal storage, totalizer and digitial controller;

Direct Digital Frequency Synthesizers is used to export by the high-frequency pulse signal after the binary phase modulation, is connected with digitial controller with control bus and controlled by digitial controller through data bus;

Digital correlator receives the two-way coded baseband signal after quadrature demodulation; Extract the effective echoed signal in the two-way coded baseband signal; Utilize the data buffer buffering echoed signal of FIFO mode; Echoed signal and local decode template are carried out related operation, the echoed signal behind the output decoder, digital correlator is connected by digitial controller with digitial controller provides the local decode template;

The input end of program control channel switch connects digital correlator, receive digital correlator output through decoded echoed signal and pass to signal storage, program control channel switch is connected by digitial controller with digitial controller to be controlled;

Signal storage is used to deposit through decoded echoed signal, and signal storage is connected with digitial controller by its read-write sequence of digitial controller control;

The input end of digital adder is connected with the output terminal of signal storage; The echoed signal that is used for leaving in signal storage is read; And superpose; Obtain not having the spike pulse signal of secondary lobe and baseline influence, and this signal is passed to the follow-up signal treatment facility as the Ionospheric Echo signal analyze; Digital adder is connected with digitial controller by its work schedule of digitial controller control.

Press such scheme, described Direct Digital Frequency Synthesizers is DDS integrated circuit or PLD with DDS function.

Press such scheme, described signal storage is 4.

The principle of work of the utility model is: based on the binary coding principle of complementary series or complementary series idol, and it is extended for positive and negative two group codings, introduces four-dimensional sequential coding, utilize four-dimensional sequence to carry out encoding and decoding.Four-dimensional sequence has the optimal compression effect of complementary series or complementary series idol, and the secondary lobe after its auto-correlation stack can be reduced to zero, can reach best main peak secondary lobe ratio in theory; Four-dimensional sequence is owing to comprise the true form and the radix-minus-one complement thereof of complementary series or complementary series idol simultaneously; Can offset dc error after its relevant stack; Prevent that promptly the direct current low-frequency component in the echo from influencing echo identification, the direct current offset error that yet makes hardware circuit cause can not have a negative impact to measurement result.Solved the non-vanishing problem of slowly drifting about of baseline with baseline.

The four-dimensional sequence that the utility model uses; Can from known a large amount of complementary seriess and complementary series idol, expand and obtain; Existing abundant complementary series and complementary series idol can be made full use of,, code length and pulse frequency spectrum characteristic can be more freely selected through selecting the sequence of different length and different sign indicating number types; Thereby satisfy when actual detection, different detections require the requirement of paired pulses length and pulse frequency spectrum characteristic; After the four-dimensional sequence stack, equivalence has increased code length for one-dimensional sequence, can obtain more backward energy, thereby further improve signal to noise ratio (S/N ratio), has also reserved leeway for further reducing emissive power.

The utility model device uses DLC(digital logic circuit) to connect and controls coding and the modulation that the Direct Digital Frequency Synthesizers part is realized radio-frequency pulse; Use DLC(digital logic circuit) to realize digital correlator; Accomplish the related operation of solid size in the four-dimensional sequence; Realize baseband signal decoding; And from four-dimensional sequence, select solid size to participate in related operation successively according to launching code, digital correlator connects program control channel switch, is delivered to four parts of number storage respectively through the program control channel switch back four kinds of signals of will decoding; Program control passage realizes that four of four passages of four kinds of decoded signals select a function, are stored in four kinds of echoed signals respectively four parts of number storage successively; Number storage is realized the storage to historical echo data, according to the requirement of four-dimensional sequence, is divided into four parts, and each part is deposited a kind of echo of coding separately; Number storage connects totalizer, utilizes totalizer to superpose when pre-echo and the historical echo of first three time, through the decoding of the four-dimensional sequence of stack completion, exports desirable compression narrow pulse signal.

The beneficial effect of the utility model is:

1, the utility model device is based on high speed large scale digital logical circuit and a whole set of digital logic system of DDS (Direct Digital Synthesizer) technology, has realized that the rf pulse code based on four-dimensional sequence is modulated and decoding function in the ionosonde.Whole pulse code modulation (PCM) and decode procedure digital logic circuit hardware realizes, promptly can guarantee sequential control accurately, improve arithmetic speed, again can simplied system structure; Reduce cost, reduce volume, improve stability; Satisfy some special applications to volume, quality, the requirement of power consumption.

2, entire work process need not software and participates in, and has solved software algorithm and has participated in the detection time-delay that coded modulation causes with decoding, has guaranteed the real-time of pulse decoding device, can satisfy the demand of modern altimeter fast encrypt detection.

Description of drawings

Below in conjunction with accompanying drawing and instance the utility model is further specified.

Fig. 1 is the encoding and decoding structural drawing of the utility model.

Fig. 2 is the Direct Digital Frequency Synthesizers pin figure of the utility model one embodiment.

Fig. 3 is the theory diagram of digital correlator.

Fig. 4 is the circuit diagram of program control channel switch, signal storage, digital adder.

Fig. 5 is the decoding compressed simulated effect figure that utilizes this device to use 10 complementary seriess and radix-minus-one complement thereof to obtain as instance.

Among the figure, 1. Direct Digital Frequency Synthesizers, 2. digital correlator, 3. program control channel switch, 4. signal storage, 5. totalizer, 6. digitial controller.

Embodiment

Fig. 1 is the coding and decoding structural drawing of the utility model, comprises Direct Digital Frequency Synthesizers 1, digital correlator 2, program control channel switch 3, signal storage 4, totalizer 5 and digitial controller 6.

Direct Digital Frequency Synthesizers 1 is used to export by the high-frequency pulse signal after the binary phase modulation, is connected with digitial controller with control bus and controlled by digitial controller through data bus.Direct Digital Frequency Synthesizers 1 is used for the high-frequency pulse signal after output is modulated by binary phase (0 degree, 180 degree), and Direct Digital Frequency Synthesizers had both been controlled the carrier frequency of high-frequency impulse, also realized the phase modulation (PM) of high-frequency impulse.Direct Digital Frequency Synthesizers 1 is connected digitial controller 6 through data bus with control bus; Digitial controller 6 output frequency control words, phase control words and amplitude control word; Realize the frequency setting of the high-frequency impulse of 1-30MHz carrier wave; Phase encoding modulation and pulse amplitude modulation have guaranteed the dirigibility of output high-frequency impulse coding phase modulation and frequency setting.The signal of Direct Digital Frequency Synthesizers 1 output outputs to emitting antenna through high-frequency power amplifying circuit.Direct Digital Frequency Synthesizers can be special-purpose DDS integrated circuit; The circuit with DDS function that also can be to use scale programmable logic device to realize, special-purpose DDS integrated circuit can be inner integrated analog-to-digital, also can be digital signal output; External modulus conversion chip; Special-purpose DDS integrated circuit can be supported amplitude modulation(PAM) (adopting switch modulation here, be the full width of cloth during pulsed operation, is zero when not working); Also can not support amplitude modulation(PAM), use the on off state of external high frequency electronic switch to realize the switch amplitude modulation(PAM).

Fig. 2 is an instance of Direct Digital Frequency Synthesizers 1, and the integrated circuit AD9959 that this instance has adopted Analog Devices company to produce accomplishes carrier wave and produces, 180 degree phase shift modulation and pulse height and the control of pulse persistance duration.The control signal of AD9959 is respectively the 3rd pin among Fig. 2, the 46th pin, the 47th pin, the 48th pin; The 50th pin, the 54th pin, these pins all are connected on the digitial controller 6; Realize the paired pulses carrier frequency by digitial controller 6, phase encoding modulation, the control of pulse persistance duration.RF pulse signal after the modulation is exported from the 30th pin.Because DDS is produced by numerous companies as general-purpose device, has multiple model, the DDS integrated circuit that also can use other model or other company to produce is here realized the function that AD9959 accomplished.

The two-way coded baseband signal that digital correlator 2 receives after quadrature demodulation; Extract the effective echoed signal in the two-way coded baseband signal; Utilize the data buffer buffering echoed signal of FIFO mode; Echoed signal and local decode template are carried out related operation, the echoed signal behind the output decoder, digital correlator 2 is connected by digitial controller 6 with digitial controller 6 provides the local decode template.Digital correlator 2 is used to receive the two-way coded baseband signal after quadrature demodulation; Baseband signal after the demodulation and carrier frequency are irrelevant, and effective echo signal amplitude wherein changes with phase encoding, and getting into digital correlator 2 signal before has been digital signal through analog to digital conversion; The sampling rate of digital signal is 1MHz-100kHz; The function of digital correlator 2 is to utilize the data buffer buffering echoed signal of FIFO mode, and echoed signal and local decode template (from four-dimensional sequence, selecting successively to use) are carried out computing cross-correlation, realizes decoding and matched filtering; Reach Time Compression and signal to noise ratio (S/N ratio) and promote, relevant mathematical formulae is described below.

If the local decode sequence is S (0), S (1) ..., S (N-1), code length are the N position.

For the ease of processing, the integral multiple in the sampling period when symbols encoded width Tc must be analog to digital conversion, as 4 times, 8 times, 16 times or the like.Here be made as M doubly, this will cause, and the code element of N position is actual to be expanded to the MN position after the sampling, and promptly each code element in the sequence increases to M from 1, and the local decode sequence length that therefore is actually used in decoding also increases to the MN position, and local sequence becomes:

S(0)，S(0)，...，S(0)，S(1)，S(1)，...，S(1)，...，S(N-1)，S(N-1)，...，S(N-1)。

The emission pulsatile once, according to the definite time span that receives signal of height window, the echoed signal that obtains is E (0), E (1) ..., E (X), total number of establishing echoed signal is X.

The computing formula of related operation is following:

$Y\left(j\right)=\underset{i=0}{\overset{M\·N-1}{\mathrm{\Σ}}}E(j-i)\×S(M\·N-1-i),j=M\·N-1,M\·N,...,X-1$

E is the echo digital signal, and S is local sequence, and Y is the output digital signal after relevant.J begins counting from (MN-1), and output signal Y is with respect to input signal E, and the individual point of (MN-1) of Y front is dropped.

Digital correlator 2 is connected with digitial controller 6, receives digitial controller 6 controls.Digital correlator 2 receives the correlated series S that uses, and is provided by digitial controller 6, must be identical with the sequence of emission usefulness, and from four-dimensional sequence, use 4 solid sizes successively.To guarantee that continuous two sequences constitute complementary series or constitute the complementary series idol, continuous four sequences constitute reciprocal complementary series or reciprocal complementary series idol.

What need specify here is if receiver system uses quadrature demodulation technology; The digital correlator 2 that connects a receiving antenna will receive I; The Q two paths of signals; And the both two paths of signals that receive of every increase No. one antenna, as if using the multichannel antenna, then need a plurality of digital correlators with identical function. moreA plurality of digital correlator concurrent workings, process multi-channel echoed signal simultaneously.

Fig. 3 is the circuit structure diagram that is used to realize digital correlator 2, and digital correlator 2 connects digitial controller 6, and it presses scheduled timing work by digitial controller 6 controls.Digital correlator 2 connects program control channel switch 3, with utilizing the signal behind the simple sequence related operation to output in the signal storage 4 through program control channel switch 3.The internal circuit configuration of digital correlator 2 is as shown in Figure 3; After digital baseband signal gets into digital correlator 2; At first write dual port data memory, write the address and produced by address location, the address adds 1 at every turn; Get back to 0 after overflowing, the address equates with the digital baseband signal switching rate also synchronously from the speedup rate; Related operation is accomplished by reading address-generation unit, coded sequence storer and data operation center jointly; Reading address-generation unit produces the address and reads current echo data from the current location of dual-ported memory; Trigger sequential then, (MN-1) individual historical data before reading successively, and read the coded sequence storer in real time successively; Obtain known four-dimensional block, step-by-step is read.Because the sequence of using has adopted binary coding; Read the data of sequence template and have only two kinds of situation :+1 ,-1, if+echo data of 1 correspondence adds the data operation unit; If-1 echo data with correspondence subtracts into the data operation unit, the output after the stack is relevant output.And then will read the address and add 1, to handle next data, after overflowing, the address gets back to 0.The use of dual port data memory has been satisfied and has been write the asynchronous of data and sense data, during real work, whenever carries out data write operation one time, carry out MN time data read operation, writes the about MN of clock doubly so the data readout clock is greater than data.

The input end of program control channel switch 3 connects digital correlator, receive digital correlator 2 outputs through decoded echoed signal and pass to signal storage 4, program control channel switch 3 is connected by digitial controller with digitial controller 6 to be controlled; Digitial controller 6 is connected to the different piece of signal storage 4 according to the different solid sizes of from four-dimensional sequence, selecting with the output of digital correlator 2, thereby realizes that different solid size echoes in the four-dimensional sequence store the different address spaces of signal storage 4 into.

Signal storage 4 is used to deposit through decoded echoed signal, and signal storage 4 is connected with digitial controller 6 by its read-write sequence of digitial controller control.Owing to used four-dimensional sequence; Storer is divided into 4 parts; Deposit respectively and use the different solid sizes of four-dimensional sequence to carry out decoded echoed signal, so signal storage 4 is divided into the echoed signal that 4 parts are deposited different coding respectively, and can only deposit 4 subpulse echo datas; Surpass 4 times pulse echo, will cover the echoed signal that deposited in originally by the principle of FIFO.If the sequence of using surpasses 4, then storer also will be divided into a plurality of parts according to the number of sequence, guarantees that the echoed signal number of times that storer is deposited equates with the sequence number.4 parts of signal storage 4 connect 4 tunnel outputs of program control channel switch 3, and 4 outputs of signal storage 4 are connected to digital adder 5.

The input end of digital adder is connected with the output terminal of signal storage; The echoed signal that is used for leaving in signal storage is read; And superpose; Obtain not having the spike pulse signal of secondary lobe and baseline influence, and this signal is passed to the follow-up signal treatment facility as the Ionospheric Echo signal analyze; Digital adder is connected with digitial controller by its work schedule of digitial controller control, with guarantee Direct Digital Frequency Synthesizers 1, digital correlation arithmetical unit 2, program control channel switch 3, signal storage 4, digital adder 5 total systems can synchronous working.

Fig. 4 is the realization circuit diagram of program control channel switch 3, signal storage 4, digital adder 5.Input signal among Fig. 4 is data bus dbus IN, address bus ABUS, and coding selection wire S1, S0, gating signal STB, the output signal is data bus dbus OUT, gating signal STB.Data input bus (DIB) connects digital correlator 2 among Fig. 4, receives through the decoded echoed signal of related operation, and the address input bus connects digitial controller 6; Utilize the address counter of digitial controller 6 inside; Since 0 address, add 1 successively, deposit echoed signal in storer according to counting of echo samples; Promptly first sampled signal to each pulse echo deposits 0 address location in, and second sampled signal deposits 1 address location in.After once sampling finished, address counter was by zero clearing, and next time, sampling was still deposited since 0 address location.Which coding what multidimensional sequence selection line S1, S0 were used to distinguish current use is, if we are defined as A sign indicating number, B sign indicating number, C sign indicating number, D sign indicating number with 4 different coding in the four-dimensional sequence, 4 parts of number storage are called A storer, B storer, C storer; The D storer then when S1, S0=00, uses the work of A sign indicating number; When S1, S0=01, use the work of B sign indicating number, when S1, S0=10; Use the work of C sign indicating number, when S1, S0=11, use the work of D sign indicating number.When using the work of A sign indicating number; 2/4 code translator output signal is opened triple gate a; The data bus of A storer is connected on the data bus of input signal; The signal of 2/4 code translator output is simultaneously write the WR signal with what gating signal was linked into the A storer, and supplied with digital signal is deposited in the A storer, and current data also is input to and participates in the stack computing in the totalizer simultaneously.Other output invalidating signal of 2/4 code translator; Triple gate b, c, d do not open; What gating signal was linked into storer B, C, D reads the RD signal; What storer B, C, D data bus occurred is the data that left in the past in the storer, and these data insert totalizer simultaneously, realizes the stack of 4 echoed signals.Storer A, B, C, D shared address bus all superpose to same address location at every turn, guarantee that the echo of stack all is the echoed signal of returning from sustained height.When using other sign indicating number work, principle of work is similar, guarantees all the time only to store current echoed signal to current storage, reads other storer simultaneously, realizes the stack of 4 road signals.Use this circuit; Relevant and stack computing all realizes with hardware; Obtaining in real time of data can guarantee, but do not fill when full when storer, and the echoed signal of the emission of pulse 3 times is unavailable; Need the echoed signal of pulse 3 times be abandoned during real work, the echo later from the 4th just can be regarded as normal echoed signal.Adder output connects a bus latch, utilizes will the superpose result of computing of gating signal after the time-delay to deposit latch in, is used to output to aftertreatment device.

Circuit among Fig. 3 and Fig. 4 is except signal storage (A storer, B storer; The C storer, the D storer), promptly digital correlator 2; Program control channel switch 3, digital adder 5 all uses the FPGA integrated circuit to realize with digital control 6; This instance is implemented in it in a slice FPGA integrated circuit, and the FPGA integrated circuit has been selected the EP4CE115 of ALTERA company for use.Its digital correlator 2, program control channel switch 3, the inside that the annexation between the digital adder 5 and digital control 6 also is embodied as the EP4CE115 integrated circuit connects.This instance has selected for use the SRAM CY7C1059DV33 of CYPRESS company to serve as signal storage 4, has used 4 CY7C1059DV33 to serve as storer A respectively, B, C and D.The configurable pin of FPGA integrated circuit EP4CE115 is connected to the address wire of CY7C1059DV33 and 4 CY7C1059DV33 shared address buses with the address bus of output; The configurable pin of EP4CE115 is connected to the data bus of CY7C1059DV33 and 4 CY7C1059DV33 common data bus with the data bus of output.8 read-write control signal lines among Fig. 4 are connected respectively to four signal storage A by the configurable pin output of EP4CE115, B, C, the read-write control pin of D.The utility model also can select for use the FPGA integrated circuit of other model or other company to replace EP4CE115; The functional circuit of being accomplished by FPGA also can use on a small scale digital discrete device to realize; Also can use other scale programmable logic device to realize, also can customize the special digital device and realize.The memory integrated circuit that signal storage 4 also can select other models or other company to have similar functions.

Fig. 5 is that the 4 dimension sequences that constitute with one group of 10 complementary series and radix-minus-one complement sequence thereof are example, obtains compression pulse signal effect analogous diagram after the computing of being correlated with and superposeing.Horizontal ordinate is represented sampling instant among Fig. 5, and unit is analog-to-digital sampling period (second).Ordinate is a sample magnitude; Unit is digital signal 1 corresponding voltage (volt), and the input signal amplitude of emulation here is 1, and signal sampling period is 1/8 of a code-element period during emulation; And all added amplitude in 4 road signals and be 1 direct current biasing, be used to simulate the non-vanishing baseline case of biasing.

Wherein the A sign indicating number is: 1 ,-1 ,-1,1 ,-1,1 ,-1 ,-1 ,-1,1;

Wherein the B sign indicating number is: 1 ,-1 ,-1 ,-1 ,-1 ,-1 ,-1,1,1 ,-1;

Wherein the C sign indicating number is :-1,1,1 ,-1,1 ,-1,1,1,1 ,-1;

Wherein the D sign indicating number is :-1,1,1,1,1,1,1 ,-1 ,-1,1;

L1 is the waveform that A coded signal auto-correlation computation is obtained among Fig. 5, and L2 is the waveform that B coded signal auto-correlation computation is obtained, and L3 is the waveform that C coded signal auto-correlation computation is obtained, and L4 is the waveform that D coded signal auto-correlation computation is obtained.L5 is with L1, L2, L3, the waveform that obtains after the L4 stack.

As can be seen from Figure 5 four-dimensional sequence can access best compression effectiveness, no secondary lobe, sharp-pointed main peak after relevant and stack.Amplitude be 1 direct current signal the baseline after relevant produces skew to solid size, but the L5 baseline height after the stack is zero, direct current biasing is to the not influence of decoded signal.Peak height after stacked compression is 4 times of unique sequence, has improved the energy of effective echo.In the sampling period is under the condition of symbol width 1/8; Amplitude is that to obtain amplitude be 320 peak value for effective echo of 1; And to white noise stack multiple has only

doubly, therefore can make signal to noise ratio (S/N ratio) improve 25dB.

Claims (3)

1. ionosonde pulse compression encoding/decoding device, it is characterized in that: it comprises Direct Digital Frequency Synthesizers, digital correlator, program control channel switch, signal storage, totalizer and digitial controller;

Direct Digital Frequency Synthesizers is used to export by the high-frequency pulse signal after the binary phase modulation, is connected with digitial controller with control bus and controlled by digitial controller through data bus;

Digital correlator receives the two-way coded baseband signal after quadrature demodulation; Extract the effective echoed signal in the two-way coded baseband signal; Utilize the data buffer buffering echoed signal of FIFO mode; Echoed signal and local decode template are carried out related operation, the echoed signal behind the output decoder, digital correlator is connected by digitial controller with digitial controller provides the local decode template;

The input end of program control channel switch connects digital correlator, receive digital correlator output through decoded echoed signal and pass to signal storage, program control channel switch is connected by digitial controller with digitial controller to be controlled;

Signal storage is used to deposit through decoded echoed signal, and signal storage is connected with digitial controller by its read-write sequence of digitial controller control;

The input end of digital adder is connected with the output terminal of signal storage; The echoed signal that is used for leaving in signal storage is read; And superpose; Obtain not having the spike pulse signal of secondary lobe and baseline influence, and this signal is passed to the follow-up signal treatment facility as the Ionospheric Echo signal analyze; Digital adder is connected with digitial controller by its work schedule of digitial controller control.

2. ionosonde pulse compression encoding/decoding device according to claim 1 is characterized in that: described Direct Digital Frequency Synthesizers is DDS integrated circuit or PLD with DDS function.

3. ionosonde pulse compression encoding/decoding device according to claim 1 is characterized in that: described signal storage is 4.

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