CN106125054A - Digital phase control array antenna intermediate-freuqncy signal simulation source generating device - Google Patents

Digital phase control array antenna intermediate-freuqncy signal simulation source generating device Download PDF

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CN106125054A
CN106125054A CN201610431991.8A CN201610431991A CN106125054A CN 106125054 A CN106125054 A CN 106125054A CN 201610431991 A CN201610431991 A CN 201610431991A CN 106125054 A CN106125054 A CN 106125054A
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data
signal
array antenna
freuqncy signal
digital phase
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唐洪军
陈能
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CETC 10 Research Institute
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
    • G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
    • G01S7/40—Means for monitoring or calibrating
    • G01S7/4052—Means for monitoring or calibrating by simulation of echoes
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
    • G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
    • G01S7/40—Means for monitoring or calibrating
    • G01S7/4052—Means for monitoring or calibrating by simulation of echoes
    • G01S7/406—Means for monitoring or calibrating by simulation of echoes using internally generated reference signals, e.g. via delay line, via RF or IF signal injection or via integrated reference reflector or transponder
    • G01S7/4065—Means for monitoring or calibrating by simulation of echoes using internally generated reference signals, e.g. via delay line, via RF or IF signal injection or via integrated reference reflector or transponder involving a delay line
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
    • G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
    • G01S7/40—Means for monitoring or calibrating
    • G01S7/4052—Means for monitoring or calibrating by simulation of echoes
    • G01S7/406—Means for monitoring or calibrating by simulation of echoes using internally generated reference signals, e.g. via delay line, via RF or IF signal injection or via integrated reference reflector or transponder
    • G01S7/4073—Means for monitoring or calibrating by simulation of echoes using internally generated reference signals, e.g. via delay line, via RF or IF signal injection or via integrated reference reflector or transponder involving an IF signal injection

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Radar Systems Or Details Thereof (AREA)

Abstract

A kind of digital phase control array antenna intermediate-freuqncy signal simulation source generating device disclosed by the invention, it is desirable to provide a kind of use simply simulates source flexibly.The technical scheme is that: (2 (1, read M the data that can simultaneously be accessed for same data segment from tables of data to logic control element；(5 produce a binary coding according to the direction of arrival of information source to parameter set unit, and it is poor with the relative time delay of adjacent array element and initial address from the analogue signal of space different directions to pass to logic control element calculating, peek from tables of data, the data again memory element different from tables of data taken are added, after being added summation, data and M road if sampling sequence export to multichannel DAC output unit (3, obtain the dis-crete sample values of the intermediate-freuqncy signal of each array element of digital phase control array antenna, continuous print time domain continuous wave signal is obtained by digital analog converter DAC, and as the final output in simulation source.

Description

Digital phase control array antenna intermediate-freuqncy signal simulation source generating device
Technical field
The present invention relates to the simulation source in signal processing field, the especially frequency conversion of the Digital Phased Array antenna system intermediate frequency and base band Process the simulation source of part.
Technical background
The complexity day by day of modern radar system so that during design and debugging radar system, inevitably need Want the echo-signal of radar.Current radar signal imitation technology is the most full-fledged, becomes an important branch of Radar Technology, The development of radar signal simulator more becomes the popular direction of domestic and international research field.The Digital Phased Array antenna system communication, Radar is extensively applied.Radar signal simulator is the product that analogue technique combines with Radar Technology.It is by the side of simulation Method produces radar echo signal, in order to adjust radar system rear class under conditions of actual radar system front end does not possesses Examination.Growing along with modern radar technology, to simulator, (requirement of signal source is more and more higher, it is desirable to the frequency of signal source Rate should be more and more accurately with stable, and the quality of whole system performance depends greatly on the performance of signal source.Therefore, right The research of the frequency synthesizer improving signal source performance the most increasingly receives publicity so that it is there occurs twice in short decades Technical huge leap forward.Prior art radar IF Simulator can generally use,
1, Direct frequency synthesizer.(DS is frequency combining method the earliest to Direct frequency synthesizer.It is harmonic oscillator, wave filter, The combination of doubler, frequency divider and frequency mixer, is synthesized certain specific frequency by one or more reference frequencies.Directly frequency It is fast that synthesis has frequency transformation, and frequency resolution is high, low phase noise and operating frequency advantages of higher.But it is hard that it is used Part equipment is more much more than other method, and structure is complicated, bulky.And its outfan there will be wanted parasitic frequency, This just requires to use high performance wave filter so that cost intensive, and this shortcoming counteracts it significantly in multi-functional, speed and spirit The advantage of the aspects such as activity.
2, Phase locking frequency synthesis.((IS completes frequency and closes Phase locking frequency synthesis for PLL or the most indirect frequency synthesis The first time leap of one-tenth technology.IS is built upon, on the degenerative theoretical basis of phase place, mainly utilizing the synchronization of phase-locked loop Retention performance, introduces the most again and becomes mode division frequency (also referred to as swallowing pulse technique, fractional frequency division and the multi-ring new technique such as phase-locked, property Can be the most perfect, it is current most widely used a kind of frequency synthesis technique.But its frequency resolution and frequency switching time The most conflicting, it is difficult to take into account, although to use above-mentioned new technique, but the most fundamentally solve this problem, so Other frequency synthesis technique must be aided with under some occasion and can meet requirement.
3, DDS technology.Along with technology and the raising of device level, make the new of this referred to as direct digital synthesis technique Frequency synthesis technique has obtained development at full speed, and it is at relative bandwidth, frequency switching time, phase continuity, orthogonal output, height Resolution and a series of performance indications aspects such as integrated, the water that can reach considerably beyond legacy frequencies synthetic technology Flat, complete the second leap of frequency synthesis technique.It has many legacy frequencies synthetic methods and is difficult to or cannot at all The advantage obtained, but in the DDS early stage of development, owing to being affected by the low and inevitable quantizing noise of operating frequency, DDS technology Fail to come into one's own.The nineties in 20th century so far, due to theoretic perfect, the raising of technique and the simplicity of implementation Changing, the DDS device facilitating a series of function admirable of the companies such as AD, Qualcomm and Stanford constantly occurs, some chips Operating frequency up to 1GHz, frequency resolution, up to MHz, is got rid of digital analog converter DAC and is limited, spuious index up to- Below 70db.These special chips, the company such as Hewlett-Packard, Tyke is utilized to start to develop various signal sources based on DDS.With traditional Frequency synthesis technique is compared, and DDS technology has that frequency switching time is short, frequency resolution is high, phase place changes continuously, easily realizes The plurality of advantages such as the more modulation to output signal.Just because of DDS, there is above-mentioned plurality of advantages, extensively weighed by people Depending on, become the developing direction of frequency synthesis technique.
Radar IF Signal Simulator is the advanced capabilities radar letter of a set of combination digital simulation technique and modern radar technology Number analog systems.This system can be used to realize the simulation to radar target signal, can simulate one or more static or The echo of moving target, can be that Radar Signal Processing System provides a set of strong test, debugging acid.Due to this simulation The motility of device service behaviour and stability, its mid frequency, bandwidth, Shi Kuan, time delay, repetition etc. are the most adjustable, therefore can be complete Radar signal processor is tested and adjusts by multi objective ground, orientation, becomes inspection radar signal processor and the most normally works Basic tool.
The radar signal of various systems, its modulation system is different with parameter value, and the signal form of generation is numerous.Thunder in real time Reach IF echo simulator to process the signal liked by array antenna received.The Digital Phased Array antenna system is according to signal stream Journey, first by array antenna received signals, by array antenna, through radio-frequency channel single-conversion, then by intermediate frequency frequency conversion Double conversion, finally by Base-Band Processing generate digital medium-frequency signal make quadrature up-conversion modulation, output single-side belt modulation Signal, modulated digital signal is converted into the output of high-quality analog intermediate frequency signal through high-speed d/a and analog band-pass filter.Entering During row signal imitation, intermediate frequency frequency conversion developing and debug this part when, needs together with Base-Band Processing being often A simulation source is provided for the Digital Phased Array antenna system.So-called simulation source is exactly a dress that can provide M road output signal Putting, the array element signals that signal the most corresponding array element in each road receives, this M road signal is output array element signals y0(t)、y1 (t)、…、yM-1(t).Theoretical according to Array Signal Processing, it is assumed that space exists from different directions but the identical J of modulation system Individual intermediate-freuqncy signal s0(t)、s1(t)、…、sJ-1T (), for the even linear array array antenna of M array element, each of which array element receives letter Number after array antenna and radio-frequency channel, output array element signals can be expressed as
y 0 ( t ) = s 0 ( t ) + s 1 ( t ) + ... + s J - 1 ( t ) y 1 ( t ) = s 0 ( t - τ 0 ) + s 1 ( t - τ 1 ) + ... + s J - 1 ( t - τ J - 1 ) ... ... y M - 1 ( t ) = s 0 ( t - Mτ 0 + τ 0 ) + s 1 ( t - Mτ 1 + τ 1 ) + ... + s J - 1 ( t - Mτ J - 1 + τ J - 1 )
Wherein, τ0、τ1、…、τJ-1It is intermediate-freuqncy signal s respectively0(t)、s1(t)、…、sJ-1(t) relatively prolonging between adjacent array element Time, it is decided by array structure and signal direction of arrival DOA information source (direction of arrival.Owing to array structure is known, so, prolong Time τ and the direction of arrival DOA information source of signal s (t) between just there is one-to-one relationship.The conventional method of prior art is to utilize Existing array antenna and radio-frequency channel equipment, receive the signal of beacon emissions from wireless channel, thus pass as signal source It is defeated by intermediate frequency frequency conversion and band processing system.Such method, on the one hand needs first to complete array antenna and radio-frequency channel portion Point, it is impossible to synchronize to carry out system design；On the other hand, multiple relatively costly Radio Beacon is designed owing to needing；Even if additionally, having Array antenna, radio-frequency channel and Radio Beacon, debugging also must be carried out at outdoor or microwave dark room, very inconvenient.
Summary of the invention
The present invention seeks to the weak point existed for prior art, it is provided that is produced from a kind of use the simplest simulation source Generating apparatus.The intermediate-freuqncy signal that this device exports after can simulating the Digital Phased Array antenna front ends channel frequency conversion, makes intermediate frequency frequency conversion Depart from aerial array and channel with band processing system exploitation debugging, improve whole the Digital Phased Array antenna system development efficiency.
The above-mentioned purpose of the present invention can be reached by following measures, a kind of digital phase control array antenna intermediate-freuqncy signal simulation Source generating device, including: the tables of data 1, multichannel DAC output unit 3, the parameter that are connected with logic control element 2 for core show Unit 4 and parameter set unit 5, it is characterised in that logic control element 2 is from tables of data 1, and reading M can be the most interviewed The data of the same data segment asked；Parameter set unit 5 connects according to the artificial parameter arranged and numeral phased-array antenna array The each signal received, according to the direction of arrival DOA of information source, produces a binary coding, and transmits in binary coding mode To logic control element 2, logic control element 2, according to comprising the binary coding of signal parameter, calculates from space not Tongfang To analogue signal poor with the relative time delay of adjacent array element and initial address, according to relative time delay calculate address difference from tables of data Middle peek, then the data addition that memory element different from tables of data 1 are taken, after suing for peace tables of data 1 same number of rows according to addition Data and M road if sampling sequence export to multichannel DAC output unit 3, obtain the intermediate frequency of each array element of digital phase control array antenna The dis-crete sample values of signal, these dis-crete sample values obtain continuous print time domain continuous wave by digital analog converter DAC to be believed Number, and as the final output in simulation source, output to intermediate frequency frequency conversion and the array signal processing system of Base-Band Processing.
The present invention has the advantages that compared to prior art.
Use the simplest.The present invention with logic control element 2 be core conjoint data table 1, multichannel DAC output unit 3, Parameter display unit 4 and parameter set unit 5 form digital phase control array antenna intermediate-freuqncy signal simulation source generating device, structure letter Single, use flexibly.Overcome prior art and need to design the defect of multiple relatively costly Radio Beacon.Avoid array antenna, Radio-frequency channel and Radio Beacon, the problem that debugging must carry out inconvenience at outdoor or microwave dark room.
The output intermediate-freuqncy signal of the Digital Phased Array antenna system reception intermediate-freuqncy signal and radio-frequency channel can be simulated.The present invention Logic control element is arranged according to parameter, reads data from tables of data, and through multichannel DAC output unit, output can be simulated There is the array received intermediate-freuqncy signal arranging parameter characteristic, it is provided that process as letter to the Digital Phased Array antenna system back end signal Number source.Need not utilize existing array antenna and radio-frequency channel equipment, from wireless channel, receive the signal of beacon emissions.Solve Prior art of having determined needs first to complete array antenna and radio-frequency channel part, it is impossible to the problem synchronizing to carry out system design.
Intermediate frequency frequency conversion and band processing system exploitation and debugging can be made to depart from array antenna and radio-frequency channel, improve whole The Digital Phased Array array signal processing development efficiency.Logic control element 2 of the present invention is from tables of data 1, and it is individual permissible that reading exists M It is accessed for the data of same data segment simultaneously；Parameter set unit 5 is according to the artificial parameter arranged and the Digital Phased Array sky Each signal direction of arrival DOA information source direction of arrival that linear array receives, produces a binary coding, and with binary coding Mode passes to logic control element 2, and logic control element 2 software comprises the binary coding of signal parameter according to this, calculates Need simulation poor, according to relative time delay meter in relative time delay and the initial address of adjacent array element from the signal of space different directions The address difference calculated is peeked from tables of data, then the data that memory element different from tables of data 1 are taken are added, to tables of data 1 Same number of rows exports to multichannel DAC output unit 3 according to data and M road if sampling sequence after being added summation, obtains digital phase control The dis-crete sample values of the intermediate-freuqncy signal of each array element of array antenna, is obtained these dis-crete sample values by digital analog converter DAC To continuous print time domain continuous wave signal, and as the final output in simulation source, these parameters show in parameter display unit simultaneously Show.Intermediate frequency frequency conversion and band processing system exploitation and debugging can be made to depart from array antenna and radio-frequency channel, improve digital phase control Array antenna system signal processes development efficiency.
Accompanying drawing explanation
Fig. 1 is that digital phase control array antenna intermediate-freuqncy signal of the present invention simulates source generating device schematic block circuit diagram.
Fig. 2 is the binary code structure chart that Fig. 1 parameter set unit produces.
Fig. 3 is the storage format chart schematic diagram of Fig. 1 tables of data memory space.
Fig. 4 is the structural principle block diagram of Fig. 1 logic control element and display unit 4.
Fig. 5 is Fig. 1 multichannel DAC output unit 3 structural principle block diagram.
Fig. 6 is logic control element 2 parameter setting work flow chart.
Fig. 7 is simulation source signal output services flow chart in logic control element 2.
Detailed description of the invention
Refering to Fig. 1-Fig. 3.In embodiment described below, a kind of digital phase control array antenna intermediate-freuqncy signal simulation source produces Device, including: with logic control element 2 for core be connected tables of data 1, multichannel DAC output unit 3, parameter display unit 4 and Parameter set unit 5, wherein, logic control element 2 transmitting control data table 1, multichannel DAC output unit 3, parameter display unit 4 and the various piece information of parameter set unit 5.Multichannel DAC output unit 3 is by multiple independent digit analog converter DAC structures Become, one array element receiving intermediate frequency signal of every road output signal simulation；Parameter display unit 4 is made up of multiple independent display modules, Each display module shows the direction of arrival DOA information source value of a signal；Tables of data 1 is by multiple independent data memory space groups Becoming, the data of each memory space represent one section of if signal sampling of a signal.Base band data is then short cycle pseudorandom Code PN code, unlike signal uses different PN code, but these PN code cycles are identical, and this section of intermediate-freuqncy signal data length is equal to base band PN In one cycle of code, the irrelevant information source of multiple independence can be simulated by the uncorrelated characteristic of PN code.Parameter set unit 5 is passed through Artificial parameter is arranged, and arranges each signal direction of arrival DOA information source parameter, produces a binary coding；Logic control element 2 The binary coding comprising signal parameter is obtained from parameter set unit 5；Logic control element 2 obtains from parameter set unit 5 Binary-coded information, decoding obtains the value of each signal direction of arrival DOA information source, and exports and show to display module, shows Show that module shows signal direction of arrival DOA information source value.The binary coding that logic control element 2 obtains from parameter set unit 5 Information, calculates each signal poor in relative time delay and the initial address of adjacent array element, and according to initial address difference from tables of data Fetch data, then the data that memory element different from tables of data are taken are added；Data after logic control element 2 is added export To digital analog converter DAC, digital analog converter DAC then output time-domain continuous signal.
Logic control element 2, from tables of data 1, reads and there is M the number that can simultaneously be accessed for same data segment According to；Each direction of arrival DOA that parameter set unit 5 receives according to the artificial parameter arranged and numeral phased-array antenna array (direction of arrival, DOA), produces a binary coding, and passes to logic control in binary coding mode Unit 2 processed, logic control element 2 according to comprising the binary coding of signal parameter, calculate need simulation from space not Tongfang To signal poor in relative time delay and the initial address of adjacent array element, according to relative time delay calculate address difference take from tables of data Count, then the data that memory element different from tables of data 1 are taken are added, counting tables of data 1 same number of rows according to after being added summation Export to multichannel DAC output unit 3 according to M road if sampling sequence, obtain the intermediate frequency letter of each array element of digital phase control array antenna Number dis-crete sample values, these dis-crete sample values by digital analog converter DAC obtain continuous print time domain continuous wave believe Number, and as the final output in simulation source, output to intermediate frequency frequency conversion and the array signal processing system of Base-Band Processing.
Refering to Fig. 4.Logic control element gets parms after arranging the binary coding of unit, true according to this binary coding Whether each signal fixed is deposited, the signal only existed, and just carries out the decoding of direction of arrival DOA information source parameter, and is shown by correspondence Module display direction of arrival DOA information source parameter, and non-existent signal, corresponding display module does not show any information.(a logic Control unit 2, after parameter set unit 5 obtains binary coding, analyzes this binary coding, it may be judged whether signal exists, as Fruit exists, and calculates the relative time delay between its adjacent array element, does not exists, do not deal with；B logic control element 2 exists according to each Signal relative time delay, calculate the initial address that each signal peeks in memory space adjacent lines poor；C logic control element 2 The number of it is believed that initial address difference, simultaneously takes a number from memory space often row, and each memory space is gone together taken several phases mutually Add.
When being embodied as, it is considered to array system has M array element, it is even linear array, owing to being linear array, signal direction of arrival DOA information source has only to consider 0 °～180 °.Array element distance is equal to half wavelength, and meanwhile, the signal number from different directions is J, respectively intermediate-freuqncy signal s0(t), s1(t) ..., sJ-1(t).Array element signals y of simulation source output0(t)、y1(t)、…、yM-1 T () is the superposition of this J signals all.
For parameter set unit 5 as shown in Figure 2, its function is the direction of arrival DOA letter of J signal of definition space Source.Information source phase parameter can be described by the binary code of an a length of P × J, and this code includes J part, each Partial-length is all P, and, the parameter of the most corresponding intermediate-freuqncy signal s (t) of each part.As a example by the 1st segment data, bitRepresent intermediate-freuqncy signal s1T () parameter defines.BitIt is 0, shows modulated intermediate-freuqncy signal s1 T () does not exists, each bit thereafter is nonsensical, bitIt is 1, shows modulated intermediate-freuqncy signal s1T () exists, thereafter each Bit definitions intermediate frequency s1The direction of arrival DOA information source value of (t).BitP-1 bit representation signal ripple reaches altogether Direction DOA information source value, a kind of simple specific coding mode is exactly uniform enconding, the binary system of the most all P-1 bit compositions Number size is directly proportional to angular dimension, and it is 0 ° that such as bit is all 0 corresponding signal direction of arrival DOA information source, is all 1 corresponding 180°.Thus, the parameter that parameter set unit 5 completes J signal by the coding of P × J bit defines.From physics realization On, simple key switch of dialling of can sampling, or keyboard.During work, by manually producing this coding by physical hardware input.
Tables of data 1 physics realization can be made up of read only memory ROM as shown in Figure 3.In tables of data 1 figure first trip and first For sequence number, other is the data in tables of data 1.Tables of data 1 is made up of J memory space, and each memory space is by M row phase Constitute with data segment, i.e. have M and can be accessed for identical data section simultaneously.A letter is deposited inside each memory space Number one piece of data, corresponding modulated intermediate-freuqncy signal s of i.e. the 0th memory space0(t), the 1st memory space corresponding modulated intermediate frequency letter Number s1(t) ...,.For each memory space, being again to be made up of M identical data segment, each data segment has N number of data.Number According to the production method of section, with signal s1(t) corresponding dataAs a example by illustrate, and assume modulated intermediate-freuqncy signal s1 T () is binary phase shift keying BPSK modulation.
First, the PN code using Cycle Length as T is as baseband signal c1(t), and the PN code of this length of T is carried out two System phase shift keying BPSK modulates, and obtains modulated intermediate-freuqncy signal s of a length of T1(t)=c1T () cos ω t, wherein ω is carrier wave Angular frequency；Then, to modulated intermediate-freuqncy signal s1T (), according to the N number of point of equal interval sampling, the value of these sampled points is exactly Different modulated intermediate-freuqncy signal signals, the base band PN code cycle is identical but data different, thereby may be ensured that Intermediate-freuqncy signal s0(t), s1(t) ..., sJ-1It is incoherent between (t).Owing to the output in simulation source is the output of M road, and each road All comprising identical signal, simply have time delay between signal, this just requires when logic control element 2 reading from tables of data 1, Read the data of M same data segment simultaneously.
Parameter display module shown in Fig. 4 can realize with charactron or liquid crystal.Parameter display unit 4 can by J solely Vertical display module is constituted, and each display module shows the direction of arrival DOA information source value of a signal, and really this signal does not exists, then Corresponding display module does not show any information.
Multichannel DAC output unit 3 is made up of the digital analog converter DAC of M road independence as shown in Figure 5.Every way type matrix The input intending transducer DAC is the sampling of an array element receiving intermediate frequency signal, and output is then that the time domain of this intermediate-freuqncy signal is continuous Signal.
Refering to Fig. 6.The generation in simulation source completes on above-mentioned this platform of simulation source generating device.In steps In, it is all to be completed by logic control element 2 software.Logic control element 2 is connected to other unit, completes these unit Between data transmission.In physics realization, logic control element 2 can use field programmable gate array FPGA to realize, also Digital signal processor DSP can be used to realize.
Device is started working, by manually arranging signal existence, its direction of arrival of signal in parameter set unit 5 DOA information source, and these settings are produced a binary coding by parameter set unit 5Realize.Logic control list Unit 2 reads binary coding from parameter set unit 5Logic control element 2 according to described coded system, byObtain each signal direction of arrival DOA information source parameter and export.
Refering to Fig. 7.Refering to Fig. 7.Logic control element 2 needs to produce M circuit-switched data, and every circuit-switched data represents an array element and receives The sampled data of intermediate-freuqncy signal, i.e. array element signals y0(t)、y1(t)、…、yM-1The sampled data of (t), sampling period TsIt is Logic control element 2 takes the time of a number from memory space, and every road signal is simultaneously by J intermediate-freuqncy signal s0(t)、s1 (t)、…、sJ-1T () is added and forms, between each road, simply signal has relative time delay.For convenience, it is assumed that when parameter is arranged, Modulated intermediate-freuqncy signal s of space only one of which0(t).Logic control element 2 is first according to the binary code of parameter set unit 5, really Fixed only s0T () exists, and byObtain the binary coding of direction of arrival DOA information source parameter, thus really Determine the value of direction of arrival DOA information source.And the value of direction of arrival DOA information source and array element receive the relative time delay τ of signal0It is one by one Corresponding, thus logic control element 2 can be obtained by parameter τ0。
When Fig. 3 tables of data 1, in only one of which intermediate-freuqncy signal s0T, time (), logic control element 2 has only to the 0th storage Fetch data in space, wherein, and the 0th array element signals y0T () takes from the 0th row, the 1st array element signals y1T () takes from the 1st row, according to this class Pushing away, each row data take simultaneously, i.e. t=TsIn the moment, each row takes first data simultaneously, as corresponding array element intermediate-freuqncy signal First sampled data, t=2TsIn the moment, each row takes the second number the most simultaneously, and this number is often to go to be peeked immediately preceding first After those data, as second sampled data of corresponding array element intermediate-freuqncy signal, go on the most always.If a line number According to taking, then restart from the first data of this row.When peeking each row of data, initial address is different, initiates just The difference of address, corresponding time delay τ0.Owing to each peek cycle is TsIf this means that adjacent two row initial addresses Difference n, relative time delay is then τ0=nTs.Such as, if the 0th row is peeked1st row peekM-1 row is peekedNow peek due to adjacent rows Beginning address difference 2, then τ0=2Ts.Due to TsIt is known when system designs, so, as long as logic control element 2 is aware of τ0Parameter, it is possible to the initial address obtaining adjacent rows reading is poor.Same principle, when there is multiple signal, for often Individual modulated intermediate-freuqncy signal s0(t)、s1(t)、…、sJ-1T (), fetches data to j-th memory space at the 0th respectively, and is added.Patrol The binary code that first volume control unit 2 is determined by parameter set unit 5 obtains the direction of arrival DOA information source of each signal, so After obtain parameter τ0、τ1、…、τJ-1, and then may determine that, when each memory element is peeked, the initial address of adjacent lines is poor；Finally The data that different memory element colleagues mutually are obtained are added, as the sampled value of this row correspondence array element receiving intermediate frequency signal.Such as, There are two modulated intermediate-freuqncy signals s in space0(t) and s1T (), fetches data at the 0th memory space and the 1st memory space the most respectively. Assume the 0th memory space the 0th row peek1st row peekM-1 Row peekAnd the 1st memory space the 0th row peek1st row PeekM-1 row is peeked Then the 0th intermediate-freuqncy signal that array element is corresponding y0T the sample sequence of () is 1st intermediate-freuqncy signal y that array element is corresponding1 T the sample sequence of () is The intermediate-freuqncy signal that the M-1 array element is corresponding yM-1T the sample sequence of () is
2 M road if sampling sequences of logic control element export to digital analog converter DAC.At logic control element 2 After complete paired data table 1 reading and addition function, obtain the dis-crete sample values of the intermediate-freuqncy signal of each array element, and only this A little dis-crete sample values, by digital analog converter DAC, just can obtain array element signals y of continuous print time domain continuous wave0(t)、y1 (t)、…、yM-1(t).This M road time domain waveform array element signals is exactly the final output signal in the source of simulating, for intermediate frequency frequency conversion and base The array signal processing system of tape handling.

Claims (10)

1. a digital phase control array antenna intermediate-freuqncy signal simulation source generating device, including: it is core phase with logic control element (2) Tables of data (1), multichannel DAC output unit (3), parameter display unit (4) and parameter set unit (5) even, it is characterised in that Logic control element (2), from tables of data (1), reads M the data that can simultaneously be accessed for same data segment；Parameter sets Put each signal that unit (5) receives according to the artificial parameter arranged and numeral phased-array antenna array, reach according to the ripple of information source Direction DOA produces a binary coding, and passes to logic control element (2), logic control list in binary coding mode Unit (2) basis comprises the binary coding of signal parameter, calculates the analogue signal from space different directions and adjacent array element Relative time delay and initial address are poor, peek from tables of data according to the address difference that relative time delay calculates, then from tables of data (1) The data that different memory element take are added, tables of data (1) same number of rows according to data and M road if sampling sequence after addition summation Output, to multichannel DAC output unit (3), obtains the dis-crete sample values of the intermediate-freuqncy signal of each array element of digital phase control array antenna, this A little dis-crete sample values obtain continuous print time domain continuous wave signal by digital analog converter DAC, and as the source of simulation Output eventually, output to intermediate frequency frequency conversion and the array signal processing system of Base-Band Processing.
2. digital phase control array antenna intermediate-freuqncy signal simulation source generating device as claimed in claim 1, it is characterised in that: logic control Unit processed (2) transmitting control data table (1), multichannel DAC output unit (3), parameter display unit (4) and parameter set unit (5) various piece information.
3. digital phase control array antenna intermediate-freuqncy signal simulation source generating device as claimed in claim 1, it is characterised in that: multichannel DAC output unit (3) is made up of multiple independent digit analog converter DAC, during output signal simulation one array element in every road receives Frequently signal.
4. digital phase control array antenna intermediate-freuqncy signal simulation source generating device as claimed in claim 1, it is characterised in that: parameter shows Showing that unit (4) is made up of multiple independent display modules, each display module shows the direction of arrival DOA information source value of a signal.
5. digital phase control array antenna intermediate-freuqncy signal simulation source generating device as claimed in claim 1, it is characterised in that: tables of data (1) being made up of multiple independent data memory spaces, the data of each memory space represent one section of intermediate-freuqncy signal of a signal and adopt Sample.
6. digital phase control array antenna intermediate-freuqncy signal simulation source generating device as claimed in claim 1, it is characterised in that: logic control The binary-coded information that unit processed (2) obtains from parameter set unit (5), decoding obtains each signal direction of arrival DOA letter The value in source, and export and show to display module, display module display signal direction of arrival DOA information source value.
7. digital phase control array antenna intermediate-freuqncy signal simulation source generating device as claimed in claim 1, it is characterised in that: logic control Unit processed (2) gets parms after arranging the binary coding of unit, determines whether each signal is deposited according to this binary coding, deposits , then carry out the decoding of direction of arrival DOA information source parameter, and by corresponding display module display direction of arrival DOA information source parameter, no Existing, corresponding display module does not show any information.
8. digital phase control array antenna intermediate-freuqncy signal simulation source generating device as claimed in claim 1, it is characterised in that: logic control Unit processed (2), after parameter set unit (5) obtains binary coding, analyzes this binary coding, it may be judged whether signal exists, Exist, then calculate the relative time delay between its adjacent array element, do not exist, do not deal with.
9. digital phase control array antenna intermediate-freuqncy signal simulation source generating device as claimed in claim 1, it is characterised in that: tables of data (1) being made up of J memory space, each memory space is made up of M row identical data section, deposits inside each memory space The one piece of data of a signal, each data segment has N number of data.
10. digital phase control array antenna intermediate-freuqncy signal simulation source generating device as claimed in claim 1, it is characterised in that: data Table (1), when only one of which intermediate-freuqncy signal, logic control element (2) only need to fetch data at the 0th memory space, wherein, the 0th Individual array element signals takes from the 0th row, and the 1st array element signals takes from the 1st row, and the rest may be inferred, and each row data take simultaneously, and each row is same Time take first data, as first sampled data of corresponding array element intermediate-freuqncy signal, each row takes the second number the most simultaneously, this Number is often to go immediately preceding first by those data after peeking, as second sampled data of corresponding array element intermediate-freuqncy signal, Go on the most always.
CN201610431991.8A 2016-06-17 2016-06-17 Digital phase control array antenna intermediate-freuqncy signal simulation source generating device Pending CN106125054A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108872950A (en) * 2017-05-11 2018-11-23 北京遥感设备研究所 A kind of method that signal simulator generates self-editing pulse echo
CN109639403A (en) * 2018-11-26 2019-04-16 西南电子技术研究所（中国电子科技集团公司第十研究所） The method of synchronous transfer digital array antenna base band excited data

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101102138A (en) * 2007-08-10 2008-01-09 重庆大学 A signal source generation device and method of array signal processing system
CN102508215A (en) * 2011-09-29 2012-06-20 北京振兴计量测试研究所 Double-channel active and passive radar integrated simulator
CN102544751A (en) * 2011-09-28 2012-07-04 中国电子科技集团公司第十研究所 Multi-target medium frequency digital phased-array antenna
CN102645647A (en) * 2012-04-23 2012-08-22 西安电子科技大学 Radar imaging signal simulator
CN103176179A (en) * 2013-02-22 2013-06-26 清华大学 Method of real-time simulation on SAR (synthetic aperture radar) echo

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101102138A (en) * 2007-08-10 2008-01-09 重庆大学 A signal source generation device and method of array signal processing system
CN102544751A (en) * 2011-09-28 2012-07-04 中国电子科技集团公司第十研究所 Multi-target medium frequency digital phased-array antenna
CN102508215A (en) * 2011-09-29 2012-06-20 北京振兴计量测试研究所 Double-channel active and passive radar integrated simulator
CN102645647A (en) * 2012-04-23 2012-08-22 西安电子科技大学 Radar imaging signal simulator
CN103176179A (en) * 2013-02-22 2013-06-26 清华大学 Method of real-time simulation on SAR (synthetic aperture radar) echo

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108872950A (en) * 2017-05-11 2018-11-23 北京遥感设备研究所 A kind of method that signal simulator generates self-editing pulse echo
CN108872950B (en) * 2017-05-11 2021-08-13 北京遥感设备研究所 Method for generating self-numbering pulse echoes by signal simulator
CN109639403A (en) * 2018-11-26 2019-04-16 西南电子技术研究所（中国电子科技集团公司第十研究所） The method of synchronous transfer digital array antenna base band excited data

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Application publication date: 20161116