CN202372825U

CN202372825U - Output point number module for expanded programmable logic controller (EPLC)

Info

Publication number: CN202372825U
Application number: CN2011204866058U
Authority: CN
Inventors: 李磊; 俞阿龙; 曹凤莲; 李正
Original assignee: Huaiyin Normal University
Current assignee: Huaiyin Normal University
Priority date: 2011-11-30
Filing date: 2011-11-30
Publication date: 2012-08-08
Anticipated expiration: 2021-11-30

Abstract

The utility model discloses an output point number module for an expanded programmable logic controller (EPLC). The output point number module is a serial peripheral interface (SPI) output expansion circuit. A signal input port of the SPI output expansion circuit is connected with a master-out slave-in port of an SPI module in a PLC, and clock signal ends of the SPI output expansion circuit and the SPI module in the PLC are connected with each other. The utility model adopts the design scheme that an SPI bus and a shift register are combined and the output of a master module of an embedded intelligent PLC is expanded. The circuit is simple in design and low in cost, an output expansion circuit is a relatively-independent module which is convenient and reliable in application, and the problem of shortage of output interfaces is effectively solved by widely applying the expansion design to the embedded intelligent PLC.

Description

Expansion EPLC output point digital-to-analogue piece

Technical field

The utility model relates to a kind of Programmable Logic Controller, and especially the output expansion module in the Programmable Logic Controller is specifically expanded EPLC output point digital-to-analogue piece.

Background technology

At present; Programmable Logic Controller PLC is owing to characteristics such as simple in structure, convenient programming, excellent performance and convenient in application; Especially in recent years the Application and Development of programmable logic controller and intelligent miniature device able to programme makes PLC become current purposes wide industrial controller the most.But raising along with application complexity; The application bottleneck of PLC also shows, the embedded intelligence programmable logic controller (PLC), and primary module output is counted scope generally from 16 o'clock to 60 o'clock; But a part of delivery outlet is multiplexing after control and communication interface, and what give over to output has only about 30.For the expansion that must consider greater than 30 module to export.At present, adopt the mode of multistage PLC control usually, the complexity that makes The whole control system is improved greatly, and the fluctuation of service of system.

Summary of the invention

The purpose of the utility model be to embedded programmable controller can be less with output interface, adopt multistage PLC to have again that complexity is high, system's problem of unstable, expansion EPLC output point digital-to-analogue piece is proposed.

The technical scheme of the utility model is:

Expansion EPLC output point digital-to-analogue piece; It is a SPI out-expander; The master of SPI module goes out from entering the mouth to link to each other in the signal input port of described SPI out-expander and the PLC controller, and the clock signal terminal of SPI out-expander links to each other with the clock signal terminal of SPI module in the PLC controller.

The SPI out-expander of the utility model comprises a plurality of shift registers of serial connection successively; The master of SPI module goes out from entering the mouth to link to each other in the serial signal input end of first shift register and the PLC controller, and the serial signal output terminal of first shift register links to each other with the serial signal input end of next shift register; The signal output part of each shift register is as the delivery outlet of output module.

The shift register of the SPI out-expander of the utility model is two.

The shift register of the SPI out-expander of the utility model all is serial input, parallel Output Shift Register.

The beneficial effect of the utility model:

The synchronous serial output interface of the utility model is the equipment of serial datum stream immigration under the effect of synchronous clock.The characteristics of utilizing spi bus clock speed, data bit length, clock module can programme and control flexibly do not have and need carry out the addressing operation advantage.The utility model is that spi bus is combined with shift register, the design proposal of expansion embedded intelligence programmable logic controller (PLC) primary module output.This circuit design is simple; Cost is lower, and output expansion is a relatively independent module, should use conveniently, reliable; To make this expansion design be applied to widely on the embedded intelligence programmable logic controller (PLC), efficiently solve the not enough problem of output interface.

The utility model provides a kind of through spi bus combine with shift register 16 the tunnel output method for designing.The spi bus module is three-way to be operated under the Master mode, to HC595 the synchronous clock input is provided.In the primary module, the SPI1 of TMS470R1A288 is used for the communication between the output of primary module and expansion module, and SPI2 is used for expanding the output of primary module and counts.The signal wire SPI2 master of SPI goes out from going into (SIMO) to be used for expansion output and to count, and connects the serial input terminal of HC595.

Description of drawings

Fig. 1 is based on the Embedded PLC system chart of TMS470R1A288 microprocessor.

Fig. 2 is the circuit diagram of the SPI out-expander of the utility model.

Fig. 3 is the high-level schematic functional block diagram of the shift register HC595 of the utility model.

Fig. 4 is the SPI output control flow chart of the utility model.

Embodiment

Below in conjunction with accompanying drawing and embodiment the utility model is further described.

As shown in Figure 1; Expansion EPLC output point digital-to-analogue piece; It is a SPI out-expander; The master of SPI module goes out from entering the mouth to link to each other in the signal input port of described SPI out-expander and the PLC controller, and the clock signal terminal of SPI out-expander links to each other with the clock signal terminal of SPI module in the PLC controller.

The SPI out-expander of the utility model comprises a plurality of shift registers (model can be HC595) of serial connection successively; The master of SPI module goes out from entering the mouth to link to each other in the serial signal input end of first shift register and the PLC controller, and the serial signal output terminal of first shift register links to each other with the serial signal input end of next shift register; The signal output part of each shift register is as the delivery outlet of output module.

The shift register of the SPI out-expander of the utility model is two.

The shift register of the SPI out-expander of the utility model all is serial input, parallel Output Shift Register

Out-expander is as shown in Figure 2; Two HC595 are relations of cascade; The spi bus data output signal end SPI2SIMO of TMS470R1A288 is connected to the serial data input end DS of U1, and the serial data input end Q7 ' of U1 is connected to the serial data input end DS of U2.Receive the input end of clock SH_CP of two HC595 behind the clock signal SPI2CLK process phase inverter U3 of SPI simultaneously.Packing into of signal UDTY control HC595 data, the data that are connected to U1 and the U2 simultaneously end of packing into.The another one control signal OUT_EN of TMS470R1A288, the OE that is connected to two HC595 simultaneously holds, the output of control parallel data.

Fig. 3 is a HC595 inner function module synoptic diagram; In conjunction with Fig. 2 and Fig. 3; Data output to the parallel data output terminal from SPI2SIMO can be divided into three phases: at first, can only remove the content in the shift register when serial input data SPI2SIMO of HC595 immigration shift register under the effect of shift clock SPI2CLK, register are removed end MR for low level; State that can not the control output end is moved this pin to high level through R3 resistance in the design.Secondly, behind the complete immigration shift register of 8 bit data, under the effect of UDTY signal, in the storage register of the data storage to 8 in the shift register, serial data output terminal Q7 ' output be the state of most significant digit Q7; At last, when the OE signal was effective, data outputed to 8 bit parallel data output ends.

The utility model does not relate to all identical with the prior art prior art that maybe can adopt of part to be realized.

Claims

1. expand EPLC output point digital-to-analogue piece for one kind; It is characterized in that it is a SPI out-expander; The master of SPI module goes out from entering the mouth to link to each other in the signal input port of described SPI out-expander and the PLC controller, and the clock signal terminal of SPI out-expander links to each other with the clock signal terminal of SPI module in the PLC controller.

2. expansion EPLC output point digital-to-analogue piece according to claim 1; It is characterized in that described SPI out-expander comprises a plurality of shift registers of serial connection successively; The master of SPI module goes out from entering the mouth to link to each other in the serial signal input end of first shift register and the PLC controller, and the serial signal output terminal of first shift register links to each other with the serial signal input end of next shift register; The signal output part of each shift register is as the delivery outlet of output module.

3. expansion EPLC output point digital-to-analogue piece according to claim 2, the shift register that it is characterized in that described SPI out-expander is two.

4. expansion EPLC output point digital-to-analogue piece according to claim 2, the shift register that it is characterized in that described SPI out-expander all are serial input, parallel Output Shift Register.