CN202362380U - Multifunctional high-precision digital frequency meter - Google Patents

Multifunctional high-precision digital frequency meter Download PDF

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CN202362380U
CN202362380U CN2011205197728U CN201120519772U CN202362380U CN 202362380 U CN202362380 U CN 202362380U CN 2011205197728 U CN2011205197728 U CN 2011205197728U CN 201120519772 U CN201120519772 U CN 201120519772U CN 202362380 U CN202362380 U CN 202362380U
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input end
output terminal
flop
flip
counter
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王睿
王金华
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Zhejiang University ZJU
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Zhejiang University ZJU
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Abstract

The utility model discloses a multifunctional high-precision digital frequency meter, comprising a strobe generation module, a phase discriminator, a register, an arithmetic unit, two multiplexers, three counters and a display which are connected with one another. By the aid of the reasonable and ingenious circuit structure design, the multifunctional high-precision digital frequency meter can measure a signal frequency, can also measure the duty ratio, the period and the pulse width of signals and phase difference between two signals, and is high in frequency measuring precision, small in size, convenient to carry and low in power consumption, energy-saving and power-saving, measuring errors are kept constant when the measuring frequency is within a measuring range, and all core circuits can be realized on one chip except for a display and the like.

Description

A kind of multifunction high-precision digital frequency meter
Technical field
The utility model belongs to the signal detection technique field, is specifically related to a kind of multifunction high-precision digital frequency meter.
Background technology
Frequency measurement is one of the most modal measurement in the hyundai electronics measuring technique, has a wide range of applications at aspects such as post and telecommunications, communications and transportation, scientific researches.The measurement of many physical quantitys all relates to the measurement that maybe can be converted into frequency like the measurement of rotating speed, vibration frequency etc.And in related application such as electronic engineering, resource exploration, instrument and meter, frequency meter then is the requisite survey instruments of engineering technical personnel.Various multi-functional, high precision, high-frequency digital frequency meter are arranged in the market, but all expensive.
Traditional digital frequency meter is based on single-chip microcomputer and discrete component, and volume is big, and power consumption is high, and degree of stability is low.In recent years having occurred with FPGA (field programmable gate array) is the digital frequency meter of core with single-chip microcomputer.The appearance of FPGA is very large scale integration technology and computer aided technique result of development; FPGA device integrated level is high, volume is little; Has the function that realizes specialized application through user program; It allows circuit designers based on computer platform, through design input, emulation, test and verification, up to reaching expected result.But such digital frequency meter circuit structure connects comparatively complicated, and function is comparatively single, often only has the function of survey frequency, not efficent use of resources.
Summary of the invention
To the above-mentioned technological deficiency of existing in prior technology, the utility model provides a kind of multifunction high-precision digital frequency meter, and frequency measurement accuracy is high, and low in energy consumption, diverse in function.
A kind of multifunction high-precision digital frequency meter comprises: a gate generation module, a phase detector, a register, an arithmetical unit, two MUXs, three counters and a display; Wherein:
The first input end of phase detector links to each other with the first input end of first MUX and receives first measured signal; Second input end of phase detector receives second measured signal; The output terminal of phase detector links to each other with second input end of first MUX; The control end of first MUX receives the first given control signal; The output terminal of first MUX links to each other with the first input end of gate generation module, the clock end of the 3rd counter, first Enable Pin of second counter; The clock end of the clock end of first counter and second counter all receives given standard signal; Second input end of gate generation module receives given clock signal; The output terminal of gate generation module links to each other with the Enable Pin of first counter, second Enable Pin of second counter and the Enable Pin of the 3rd counter; The first input end of second MUX, second input end, the 3rd input end and four-input terminal link to each other with the output terminal of first counter, the output terminal of second counter, the output terminal of the 3rd counter and the output terminal of register respectively; First output terminal of second MUX, second output terminal and the 3rd output terminal link to each other with first input end, second input end and the 3rd input end of arithmetical unit respectively, and the control end of second MUX receives the second given control signal, and the output terminal of arithmetical unit links to each other with the input end of display.
Described phase detector by two JK flip-flops and one and the door constitute; Wherein: the clock end of first JK flip-flop is the first input end of phase detector; The clock end of second JK flip-flop is second input end of phase detector; The J end of first JK flip-flop links to each other with
Figure BDA0000119715350000021
end of second JK flip-flop; The K end of second JK flip-flop links to each other with
Figure BDA0000119715350000022
end of first JK flip-flop; The K end of first JK flip-flop is held with the Q of second JK flip-flop and is linked to each other with second input end of door; The Q end of the J of second JK flip-flop end and first JK flip-flop and linking to each other with the first input end of door, with the output terminal of door be the output terminal of phase detector.
Described gate generation module is made up of a frequency divider and a d type flip flop; Wherein: the clock end of frequency divider is second input end of gate generation module, and the output terminal of frequency divider links to each other with the D of d type flip flop end, and the clock end of d type flip flop is the first input end of gate generation module, and the Q end of d type flip flop is the output terminal of gate generation module.
Described arithmetical unit is made up of a multiplier and a divider; Wherein: the first input end of multiplier is the first input end of arithmetical unit; Second input end of multiplier is second input end of arithmetical unit; The end that removes of divider is the 3rd input end of arithmetical unit; The output terminal of multiplier removes end with the quilt of divider and links to each other, and the output terminal of divider is the output terminal of arithmetical unit.
The beneficial effect of the utility model is:
(1) function is many; But except that the frequency of measuring-signal, but the also dutycycle of measuring-signal, cycle, pulse width, and measure two phase differential between signal.
(2) precision is high; Survey frequency keeps measuring error constant in range ability, less than 0.0001%; Other measurement function errors are less than 0.1%.
(3) volume is little; Except that display etc., core circuit can all be realized on chip piece, and advantages of small volume is easy to carry.
(4) low in energy consumption; Power consumption is little, energy-conservation economize on electricity.
Description of drawings
Fig. 1 is the structural principle synoptic diagram of the utility model.
Fig. 2 is the structural representation of phase detector.
Fig. 3 is the work schedule synoptic diagram of phase detector.
Fig. 4 is the structural representation of gate generation module.
Fig. 5 is the structural representation of arithmetical unit.
Embodiment
In order to describe the utility model more particularly, be elaborated below in conjunction with accompanying drawing and embodiment technical scheme and relative theory thereof to the utility model.
As shown in Figure 1, a kind of multifunction high-precision digital frequency meter comprises: a gate generation module, a phase detector, a register, an arithmetical unit, two MUXs, three counters and a display; Wherein:
The first input end of phase detector links to each other with the first input end of first MUX and receives first measured signal; Second input end of phase detector receives second measured signal; The output terminal of phase detector links to each other with second input end of first MUX; The control end of first MUX receives the first given control signal; The output terminal of first MUX links to each other with the first input end of gate generation module, the clock end of the 3rd counter, first Enable Pin of second counter; The clock end of the clock end of first counter and second counter all receives given standard signal; Second input end of gate generation module receives given clock signal; The output terminal of gate generation module links to each other with the Enable Pin of first counter, second Enable Pin of second counter and the Enable Pin of the 3rd counter; The first input end of second MUX, second input end, the 3rd input end and four-input terminal link to each other with the output terminal of first counter, the output terminal of second counter, the output terminal of the 3rd counter and the output terminal of register respectively; First output terminal of second MUX, second output terminal and the 3rd output terminal link to each other with first input end, second input end and the 3rd input end of arithmetical unit respectively, and the control end of second MUX receives the second given control signal, and the output terminal of arithmetical unit links to each other with the input end of display.
In the present embodiment, clock signal is that frequency is the pulse signal of 50MHz, and standard signal is that frequency is the pulse signal of 100MHz.
As shown in Figure 2, phase detector by two JK flip-flops and one and the door constitute; Wherein: the clock end of first JK flip-flop is the first input end of phase detector; The clock end of second JK flip-flop is second input end of phase detector; The J end of first JK flip-flop links to each other with
Figure BDA0000119715350000041
end of second JK flip-flop; The K end of second JK flip-flop links to each other with
Figure BDA0000119715350000042
end of first JK flip-flop; The K end of first JK flip-flop is held with the Q of second JK flip-flop and is linked to each other with second input end of door; The Q end of the J of second JK flip-flop end and first JK flip-flop and linking to each other with the first input end of door, with the output terminal of door be the output terminal of phase detector.
As shown in Figure 4, the gate generation module is made up of a frequency divider and a d type flip flop; Wherein: the clock end of frequency divider is second input end of gate generation module, and the output terminal of frequency divider links to each other with the D of d type flip flop end, and the clock end of d type flip flop is the first input end of gate generation module, and the Q end of d type flip flop is the output terminal of gate generation module; Frequency divider in the present embodiment is that the sub-frequency divider cascade of 4 100 frequency divisions forms, and the sub-frequency divider of 100 frequency divisions is made up of one 8 digit counter, since 0 counting, and after counting 99, just zero clearing, counting again.
As shown in Figure 5, arithmetical unit is made up of a multiplier and a divider; Wherein: the first input end of multiplier is the first input end of arithmetical unit; Second input end of multiplier is second input end of arithmetical unit; The end that removes of divider is the 3rd input end of arithmetical unit; The output terminal of multiplier removes end with the quilt of divider and links to each other, and the output terminal of divider is the output terminal of arithmetical unit; Multiplier in the present embodiment is 32 multipliers of taking advantage of 32, and divider is 64 dividers that remove 32.
In the present embodiment, register memory contains four constant values, is respectively the frequency 50MHz of standard signal, the cycle 1/50MHz of standard signal, and constant 100 and 720 is so the output terminal of register has four output ports; First counter and the 3rd counter are the counter of an Enable Pin of 32 bit strips; Second counter is the counter of two Enable Pins of 32 bit strips, only when two Enable Pin signals all are high level, just begins counting; First MUX is 2 to select 1 selector switch; Second MUX is 7 to select 3 selector switch.
MUX is as shown in table 1 for the corresponding selection output of different measuring target in the present embodiment:
Table 1
Figure BDA0000119715350000043
The measuring principle of present embodiment digital frequency meter is:
For frequency measurement:
The bidding calibration signal frequency and the first measured signal frequency are respectively f bWith f t, behind the actual closing gate, the counting of first counter and the 3rd counter is respectively N bWith N t, the frequency of first measured signal can be expressed as so:
f t = f b N b × N t - - - ( 1 )
To formula 1 equal sign both sides take the logarithm the back differentiate, can get:
Δf t f t = Δf b f b + ΔN t N t - ΔN b N b - - - ( 2 )
In measurement owing to all be that rising edge by this signal triggers to the start-stop time of first measured signal counting, so in gate time to the counting N of first measured signal tError free, so formula 2 can be rewritten as:
Δf t f t = Δf b f b - ΔN b N b - - - ( 3 )
Formula 3 shows that the frequency measurement source of error has two, and first is the frequency stability error of standard signal, and second is the counting error to standard signal.At present, common quartz crystal oscillator degree of stability can reach 10 -10, first error can be ignored.First counter is to standard signal count value N bDiffer at most ± 1 error, promptly | Δ N b|≤1.Can get:
| Δf t f t | = | ΔN b N b | ≤ 1 N b - - - ( 4 )
Can find out that by formula 4 size of the relative error of survey frequency and the first measured signal frequency is irrelevant, and is only relevant with the standard signal frequency with gate time, promptly realized the equal precision measurement of whole test frequency range.Gate time is long more, and the standard signal frequency is high more, and the relative error of frequency measurement is just more little; When choosing standard signal is 100MHz, and gate time, frequency-measurement accuracy can reach 10 when being 1s -8
For duty ratio measuring:
Utilize second counter, simultaneously as gate-control signal, when first measured signal is high level, standard signal is counted with first measured signal and actual gate.If the second rolling counters forward value is N behind the actual gate p, the while first counter outputting standard signal-count N bAccording to the dutycycle definition, can get the dutycycle expression formula and be:
D = N p N b × 100 % - - - ( 5 )
For phase difference measurement:
If the first measured signal TCLK0 and the second measured signal TCLK1 that the two-way frequency is identical, have phase differential arranged, they generate the output signal out that one tunnel dutycycle is directly proportional with former phase differential after through phase detector; The work schedule of phase detector is as shown in Figure 3.Through measuring its dutycycle, can realize the measurement of phase differential; Relation below output signal dutyfactor and phase differential
Figure BDA0000119715350000061
satisfy:
Figure BDA0000119715350000062
For period measurement:
Period measurement can obtain on the frequency measurement basis, and the cycle of establishing first measured signal is T t, T then tEqual the first measured signal frequency f tInverse:
T t = 1 f t = N b N t × 1 f b - - - ( 7 )
For pulse width measure:
If the first measured signal pulsewidth is w, according to the pulse width definition, convolution 1 can get with formula 7 so:
w = D × T t = N p N b × N b N t × 1 f b = N p N t × 1 f b - - - ( 8 ) 。

Claims (4)

1. a multifunction high-precision digital frequency meter is characterized in that, comprising: a gate generation module, a phase detector, a register, an arithmetical unit, two MUXs, three counters and a display;
Wherein, The first input end of phase detector links to each other with the first input end of first MUX and receives first measured signal; Second input end of phase detector receives second measured signal; The output terminal of phase detector links to each other with second input end of first MUX; The control end of first MUX receives the first given control signal; The output terminal of first MUX links to each other with the first input end of gate generation module, the clock end of the 3rd counter, first Enable Pin of second counter; The clock end of the clock end of first counter and second counter all receives given standard signal; Second input end of gate generation module receives given clock signal; The output terminal of gate generation module links to each other with the Enable Pin of first counter, second Enable Pin of second counter and the Enable Pin of the 3rd counter, and the first input end of second MUX, second input end, the 3rd input end and four-input terminal link to each other with the output terminal of first counter, the output terminal of second counter, the output terminal of the 3rd counter and the output terminal of register respectively, and first output terminal of second MUX, second output terminal and the 3rd output terminal link to each other with first input end, second input end and the 3rd input end of arithmetical unit respectively; The control end of second MUX receives the second given control signal, and the output terminal of arithmetical unit links to each other with the input end of display.
2. multifunction high-precision digital frequency meter according to claim 1 is characterized in that: described phase detector by two JK flip-flops and one and the door constitute; Wherein: the clock end of first JK flip-flop is the first input end of phase detector; The clock end of second JK flip-flop is second input end of phase detector; The J end of first JK flip-flop links to each other with
Figure FDA0000119715340000011
end of second JK flip-flop; The K end of second JK flip-flop links to each other with
Figure FDA0000119715340000012
end of first JK flip-flop; The K end of first JK flip-flop is held with the Q of second JK flip-flop and is linked to each other with second input end of door; The Q end of the J of second JK flip-flop end and first JK flip-flop and linking to each other with the first input end of door, with the output terminal of door be the output terminal of phase detector.
3. multifunction high-precision digital frequency meter according to claim 1 is characterized in that: described gate generation module is made up of a frequency divider and a d type flip flop; Wherein: the clock end of frequency divider is second input end of gate generation module, and the output terminal of frequency divider links to each other with the D of d type flip flop end, and the clock end of d type flip flop is the first input end of gate generation module, and the Q end of d type flip flop is the output terminal of gate generation module.
4. multifunction high-precision digital frequency meter according to claim 1 is characterized in that: described arithmetical unit is made up of a multiplier and a divider; Wherein: the first input end of multiplier is the first input end of arithmetical unit; Second input end of multiplier is second input end of arithmetical unit; The end that removes of divider is the 3rd input end of arithmetical unit; The output terminal of multiplier removes end with the quilt of divider and links to each other, and the output terminal of divider is the output terminal of arithmetical unit.
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Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103901270A (en) * 2014-04-20 2014-07-02 苏州蓝萃电子科技有限公司 Method for testing frequency based on DSP digital frequency meter
CN103954835A (en) * 2014-03-25 2014-07-30 苏州经贸职业技术学院 Frequency display apparatus and work method thereof
CN105486919A (en) * 2015-12-22 2016-04-13 南京信息工程大学 Frequency measurement device based on FPGA
CN106597096A (en) * 2016-12-02 2017-04-26 武汉新芯集成电路制造有限公司 Clock frequency monitoring method
CN106707020A (en) * 2016-12-22 2017-05-24 武汉盛帆智能科技有限公司 Pulse detection device and pulse detection method
CN106918740A (en) * 2015-12-28 2017-07-04 苏州普源精电科技有限公司 A kind of equally accurate frequency measuring device and method
CN107228979A (en) * 2017-05-31 2017-10-03 北京航天控制仪器研究所 A kind of digital frequency measuring system based on clock phase shift
CN110988466A (en) * 2019-12-11 2020-04-10 云南大学 High-precision frequency meter based on double modes
CN112730979A (en) * 2020-12-24 2021-04-30 太原航空仪表有限公司 STM 32-based equal-precision frequency measurement method

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103954835A (en) * 2014-03-25 2014-07-30 苏州经贸职业技术学院 Frequency display apparatus and work method thereof
CN103901270A (en) * 2014-04-20 2014-07-02 苏州蓝萃电子科技有限公司 Method for testing frequency based on DSP digital frequency meter
CN105486919A (en) * 2015-12-22 2016-04-13 南京信息工程大学 Frequency measurement device based on FPGA
CN105486919B (en) * 2015-12-22 2018-09-14 南京信息工程大学 A kind of frequency measuring equipment based on FPGA
CN106918740A (en) * 2015-12-28 2017-07-04 苏州普源精电科技有限公司 A kind of equally accurate frequency measuring device and method
CN106918740B (en) * 2015-12-28 2020-06-19 普源精电科技股份有限公司 Equal-precision frequency measurement device and method
CN106597096A (en) * 2016-12-02 2017-04-26 武汉新芯集成电路制造有限公司 Clock frequency monitoring method
CN106707020A (en) * 2016-12-22 2017-05-24 武汉盛帆智能科技有限公司 Pulse detection device and pulse detection method
CN106707020B (en) * 2016-12-22 2019-06-11 武汉盛帆电子股份有限公司 Pulse detecting equipment and pulse detecting method
CN107228979A (en) * 2017-05-31 2017-10-03 北京航天控制仪器研究所 A kind of digital frequency measuring system based on clock phase shift
CN110988466A (en) * 2019-12-11 2020-04-10 云南大学 High-precision frequency meter based on double modes
CN112730979A (en) * 2020-12-24 2021-04-30 太原航空仪表有限公司 STM 32-based equal-precision frequency measurement method

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