CN202268348U - 高对比度高光效全彩led器件 - Google Patents
高对比度高光效全彩led器件 Download PDFInfo
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- CN202268348U CN202268348U CN2011203739661U CN201120373966U CN202268348U CN 202268348 U CN202268348 U CN 202268348U CN 2011203739661 U CN2011203739661 U CN 2011203739661U CN 201120373966 U CN201120373966 U CN 201120373966U CN 202268348 U CN202268348 U CN 202268348U
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Abstract
高对比度高光效全彩LED器件,包括白色支架、三个LED芯片、导线和填充树脂,所述白色支架包括焊板和上表面开口的研钵状凹部、架体和油墨层,所述凹部位于所述焊板上面的所述白色支架中央,所述焊板嵌入所述白色支架内部,两端从所述白色支架侧面伸出形成金属极性引脚,所述架体外表面和所述金属极性引脚表面涂覆油墨层,所述凹部内部有填充树脂;所述LED芯片焊接在所述凹部下底面的焊板上,通过导线与所述金属极性引脚连接。本实用新型的有益效果是:降低成本、提升亮度、提高产品可靠性、提升对比度。
Description
技术领域
本实用新型涉及一种高对比度高光效全彩LED器件。
背景技术
由于LED具有节能、环保、重量轻、寿命长、体积小、性能稳定等诸多优点,得到很多领域的广泛的应用;其中LED在显示屏领域,由初期的单色图文、数字显示屏到目前常见的双色、全彩显示屏及户内、户外显示屏得到广泛的应用。
目前应用在全彩显示屏的三合一贴片LED,通常情况下在封装前需在支架外壳正面白色PPA上刷上黑色油墨,提高对比度,此种方式已延续多年的使用,但因支架外壳四边还是白色,其对比度比较低。为提高整屏对比度,目前存在两种方式:第一种是支架直接采用黑色PPA材料射出,形成黑色外壳,来提高对比度,但因黑色外壳,存在光线的反射率下降,造成其产品出光效率下降50%左右,若通过提升裸晶亮度来弥补损失的亮度,成本将上升1/3左右;另外一种方式是支架采用两次射出,第一次先射出一层白色PPA材料,再在白色PPA外壳外面再射出一次黑色PPA材料,最终形成白色内杯,黑色外壳支架,但因两次射出效率下降一半,且支架不良率比较高,会造成支架成本过高,同时两次射出,会造成整体支架结构强度变弱,封装成成品的LED可靠性变弱。
发明内容
本实用新型针对目前全彩LED光效率降低、成本高、产品可靠性弱的问题,提出了一种降低成本、提升亮度、提高产品可靠性、提升对比度的高对比度高光效全彩LED器件。
本实用新型所述的高对比度高光效全彩LED器件,包括白色支架、三个LED芯片、导线和填充树脂,其特征在于:所述白色支架包括焊板和上表面开口的研钵状凹部、架体和油墨层,所述凹部位于所述焊板上面的所述白色支架中央,所述焊板嵌入所述白色支架内部,两端从所述白色支架侧面伸出形成金属极性引脚,所述架体外表面和所述金属极性引脚表面涂覆油墨层,所述凹部内部有填充树脂;所述LED芯片焊接在所述凹部下底面的焊板上,通过导线与所述金属极性引脚连接。
所述白色支架的凹部为白色,外表面涂覆的油墨层为除白色外的任意颜色。
所述凹部为白色PPA,外表黑色为黑色油墨。
所述LED芯片呈直线排列。
所述填充树脂为环氧树脂或硅类胶体。
本实用新型的有益效果是:降低成本、提升亮度、提高产品可靠性、提升对比度。
附图说明
图1是本实用新型的俯视图
图2是本实用新型的剖面图
具体实施方式
下面结合附图进一步说明本实用新型
参照附图:
本实用新型所述的高对比度高光效全彩LED器件,包括白色支架1、三个LED芯片2、导线3和填充树脂4,所述白色支架1包括焊板11和上表面开口的研钵状凹部12、架体13和油墨层14,所述凹部12位于所述焊板11上面的所述白色支架1中央,所述焊板11嵌入所述白色支架1内部,两端从所述白色支架1侧面伸出形成金属极性引脚111,所述架体13外表面和所述金属极性引脚111涂覆油墨层14,所述凹部12内部有填充树脂4;所述LED芯片2焊接在所述凹部12下底面的焊板11上,通过导线3与所述金属极性引脚111连接。
所述白色支架1的凹部为白色,外表面涂覆的油墨层为除白色外的任意颜色。
所述凹部12为白色PPA,外表黑色为黑色油墨。
所述LED芯片2呈直线排列。
所述填充树脂4为环氧树脂或硅类胶体。
本说明书实施例所述的内容仅仅是对实用新型构思的实现形式的列举,本实用新型的保护范围的不应当被视为仅限于实施例所陈述的具体形式,本实用新型的保护范围也及于本领域技术人员根据本实用新型构思所能够想到的等同技术手段。
Claims (5)
1.高对比度高光效全彩LED器件,包括白色支架、三个LED芯片、导线和填充树脂,其特征在于:所述白色支架包括焊板和上表面开口的研钵状凹部、架体和油墨层,所述凹部位于所述焊板上面的所述白色支架中央,所述焊板嵌入所述白色支架内部,两端从所述白色支架侧面伸出形成金属极性引脚,所述架体外表面和所述金属极性引脚表面涂覆油墨层,所述凹部内部有填充树脂;所述LED芯片焊接在所述凹部下底面的焊板上,通过导线与所述金属极性引脚连接。
2.如权利要求1所述的高对比度高光效全彩LED器件,其特征在于:所述白色支架的凹部为白色,外表面涂覆的油墨层为除白色外的任意颜色。
3.如权利要求2所述高对比度高光效全彩LED器件,其特征在于:所述凹部为白色PPA,外表黑色为黑色油墨。
4.如权利要求3所述的高对比度高光效全彩LED器件,其特征在于:所述LED芯片呈直线排列。
5.如权利要求1~4所述的高对比度高光效全彩LED器件,其特征在于:所述填充树脂为环氧树脂或硅类胶体。
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CN106548995A (zh) * | 2015-09-16 | 2017-03-29 | 扬智科技股份有限公司 | 电路板模块及其半导体封装件 |
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CN106548995A (zh) * | 2015-09-16 | 2017-03-29 | 扬智科技股份有限公司 | 电路板模块及其半导体封装件 |
CN106548995B (zh) * | 2015-09-16 | 2019-07-12 | 扬智科技股份有限公司 | 电路板模块及其半导体封装件 |
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