CN202267962U - Bus interface circuit and electronic device - Google Patents
Bus interface circuit and electronic device Download PDFInfo
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- CN202267962U CN202267962U CN2011203849233U CN201120384923U CN202267962U CN 202267962 U CN202267962 U CN 202267962U CN 2011203849233 U CN2011203849233 U CN 2011203849233U CN 201120384923 U CN201120384923 U CN 201120384923U CN 202267962 U CN202267962 U CN 202267962U
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- bus
- interface circuit
- signal line
- switching chip
- signal
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Abstract
The utility model provides a bus interface circuit and an electronic device. The bus interface circuit comprises a switching chip and an interface circuit, wherein the switching chip is used for controlling switching of output signals between first bus signals and second bus signals and is respectively connected with a first bus signal line and a second bus signal line. The interface circuit is used for detecting the type of an external connector, triggering the switching chip to switch the output signals according to the detected type of the connector and receiving the output signals, and is connected with the switching chip. An embodiment of the bus interface circuit achieves automatic detecting and switching by using the circuit, and the same slot is led to output different signals, so that cost can be reduced, and space occupied on a printed circuit board can be effectively reduced.
Description
Technical field
The utility model relates to a kind of EBI structure, relates in particular to a kind of bus interface circuit and electronic equipment.
Background technology
The connector (connector) of cable (Cable) and Cable of USB3.0 interface that current USB3.0 controller from the motherboard (mainboard) is connected to the cabinet front panel is all very expensive.In the prior art, can use of the connector use of the slot (Slot) of an extra PCIEx1 as USB3.0.
Yet the shortcoming of this scheme is: need to increase the PCIEx1Slot of a special use, increased cost on the one hand, PCIEx1Slot need take the space of printed circuit board on the other hand.
The utility model content
For the purpose of the embodiment that solves the problems of the technologies described above the utility model provides a kind of bus interface circuit and electronic equipment, effectively reduce the space that takies printed circuit board.
In order to achieve the above object, the embodiment of the utility model provides a kind of bus interface circuit, comprising:
One is used to control the switching chip that the output signal switches between first bus signals and second bus signals, and said switching chip is connected with second bus signal line with first bus signal line respectively; And
One is used to detect the type of external connector, triggers said switching chip according to the type of detected connector and switches the output signal, and receive the interface circuit of output signal, is connected with said switching chip.
Preferably, said first bus signal line is the USB3.0 signal wire.
Preferably, said second bus signal line is the PCIE signal wire.
Preferably, said interface circuit is the PCIE interface circuit.
The embodiment of the utility model also provides a kind of electronic equipment, comprising:
One motherboard comprises: first bus signal line and second bus signal line;
One bus interface circuit comprises:
One is used to control the switching chip that the output signal switches between first bus signals and second bus signals, and said switching chip is connected with second bus signal line with first bus signal line respectively;
One is used to detect the type of external connector, triggers said switching chip according to detected connector type and switches the output signal, and receive the interface circuit of output signal, is connected with said switching chip.
Preferably, said first bus signal line is the USB3.0 signal wire.
Preferably, said second bus signal line is the PCIE signal wire.
Preferably, said interface circuit is the PCIE interface circuit.
Can know by technique scheme; The embodiment of the utility model has following beneficial effect: the use circuit detects automatically and switches; Make same slot can export various signals, can reduce cost on the one hand, also can effectively reduce the space that takies printed circuit board on the other hand.
Description of drawings
Fig. 1 is the block diagram of bus interface circuit among the embodiment of the utility model;
Fig. 2 is the schematic diagram of bus interface circuit among the embodiment of the utility model.
Embodiment
For the purpose, technical scheme and the advantage that make the utility model embodiment is clearer,, the utility model embodiment is done explanation in further detail below in conjunction with embodiment and accompanying drawing.At this, illustrative examples of the utility model and explanation are used to explain the utility model, but not as the qualification to the utility model.
As shown in Figure 1, be the block diagram of bus interface circuit among the embodiment of the utility model, this bus interface circuit comprises:
One is used to control the switching chip 11 that the output signal switches between first bus signals and second bus signals; Comprise signal input part and signal output part, the signal input part that wherein switches chip 11 is connected with second bus signal line 13 with first bus signal line 12 respectively;
One is used to detect the type of external connector (not shown), switches chip 11 according to the type triggering of detected connector and switches the output signals, and receive the interface circuit 14 of exporting signal, and this interface circuit 14 is connected with the signal output part that switches chip 11.
In the present embodiment; When external connector was connected with interface circuit 14, this interface circuit 14 can detect the type of external connector, and for example: detecting external connector is the USB3.0 connector; Or PCIE connector; Type according to detected connector issues switching command to switching chip 11 then, and switching chip 11 will be exported signal according to switching command and between first bus signals and second bus signals, switch, for example when external connector is the USB3.0 connector; The signal output part that switches chip 11 is exported to external connector through interface circuit 14 with the USB3.0 signal to interface circuit 14 output USB3.0 signals.
In the present embodiment, this switching chip 11 can adopt existing single-chip microcomputer to realize.
In the present embodiment, this first bus signal line 12 can be selected the USB3.0 signal wire for use, also can select other USB certainly for use, for example the USB2.0 signal wire.
In the present embodiment, this second bus signal line 13 can be selected PCIE (PCI express) signal wire for use, also can select other expansion bus certainly for use.
In the present embodiment, this interface circuit 14 can be selected the PCIE interface circuit for use, also can select other expansion interface circuit certainly for use.
Be the USB3.0 signal wire with first bus signal line below, second bus signal line is that PCIE signal wire, interface circuit are that example is introduced for the PCIE interface circuit, referring to Fig. 2.
In the definition of the PCIE of standard Slot Pin pin, its B12Pin is Reserve.In the present embodiment can be with drawing on the B12Pin; As Detect Pin; When inserting the plug of USB3.0 (the USB3.0 connector is connected with the PCIE slot), this Pin will be dragged down (the USB3.0 plug is self-defined by producer, like this can plug end the golden finger of B12Pin correspondence and short circuit).Can to detect be that USB3.0Cable is inserted into to the PCIE slot like this.
Simultaneously, use one to switch chip, be used to switch motherboard output USB3.0 signal or PCIE signal.For example acquiescence can be set to the output of PCIE signal.And dragged down as Detect Pin, the Control Pin that switches chip will be dragged down, and switches chip like this and will export signal and switch to the USB3.0 signal.
Can know by technique scheme,, make same slot can export various signals, can effectively reduce the space that takies printed circuit board through using circuit to detect automatically and switching.
The embodiment of the utility model also provides a kind of electronic equipment, comprising:
One motherboard comprises first bus signal line and second bus signal line;
One bus interface circuit comprises:
One is used to control the switching chip that the output signal switches between first bus signals and second bus signals, switches chip and is connected with second bus signal line with first bus signal line respectively;
One is used to detect the type of external connector, according to the type triggering switching chip switching output signal of detected connector, and receives the interface circuit of exporting signal, is connected with the switching chip.
In the present embodiment, this first bus signal line can be selected the USB3.0 signal wire for use, also can select other USB certainly for use, for example the USB2.0 signal wire.
In the present embodiment, this second bus signal line can be selected the PCIE signal wire for use, also can select other expansion bus certainly for use.
In the present embodiment, this interface circuit can be selected the PCIE interface circuit for use, also can select other expansion interface circuit certainly for use.
The above only is the preferred implementation of the utility model; Should be pointed out that for those skilled in the art, under the prerequisite that does not break away from the utility model principle; Can also make some improvement and retouching, these improvement and retouching also should be regarded as the protection domain of the utility model.
Claims (8)
1. a bus interface circuit is characterized in that, comprising:
One is used to control the switching chip that the output signal switches between first bus signals and second bus signals, and said switching chip is connected with second bus signal line with first bus signal line respectively; And
One is used to detect the type of external connector, triggers said switching chip according to the type of detected connector and switches the output signal, and receive the interface circuit of output signal, is connected with said switching chip.
2. bus interface circuit according to claim 1 is characterized in that, said first bus signal line is the USB3.0 signal wire.
3. bus interface circuit according to claim 1 and 2 is characterized in that, said second bus signal line is the PCIE signal wire.
4. bus interface circuit according to claim 3 is characterized in that, said interface circuit is the PCIE interface circuit.
5. an electronic equipment is characterized in that, comprising:
One motherboard comprises: first bus signal line and second bus signal line;
One bus interface circuit comprises:
One is used to control the switching chip that the output signal switches between first bus signals and second bus signals, and said switching chip is connected with second bus signal line with first bus signal line respectively;
One is used to detect the type of external connector, triggers said switching chip according to detected connector type and switches the output signal, and receive the interface circuit of output signal, is connected with said switching chip.
6. electronic equipment according to claim 5 is characterized in that, said first bus signal line is the USB3.0 signal wire.
7. electronic equipment according to claim 5 is characterized in that, said second bus signal line is the PCIE signal wire.
8. electronic equipment according to claim 5 is characterized in that, said interface circuit is the PCIE interface circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2011203849233U CN202267962U (en) | 2011-10-11 | 2011-10-11 | Bus interface circuit and electronic device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2011203849233U CN202267962U (en) | 2011-10-11 | 2011-10-11 | Bus interface circuit and electronic device |
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CN202267962U true CN202267962U (en) | 2012-06-06 |
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CN2011203849233U Expired - Fee Related CN202267962U (en) | 2011-10-11 | 2011-10-11 | Bus interface circuit and electronic device |
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Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103098039A (en) * | 2012-10-17 | 2013-05-08 | 华为技术有限公司 | High-speed peripheral-device interconnected-bus port configuration method and apparatus |
CN103150280A (en) * | 2012-12-28 | 2013-06-12 | 北京创毅讯联科技股份有限公司 | Bus interface patch board and data transmission system |
CN110737624A (en) * | 2019-09-23 | 2020-01-31 | 天津市英贝特航天科技有限公司 | circuit for realizing PCIE bus switching peripheral mounting |
CN111897760A (en) * | 2020-07-30 | 2020-11-06 | 普联技术有限公司 | Electronic product, expansion device thereof, control method and control device |
CN114116565A (en) * | 2021-11-26 | 2022-03-01 | 天津市英贝特航天科技有限公司 | Circuit, cardboard and computing equipment of compatible PCI and PCIE bus |
-
2011
- 2011-10-11 CN CN2011203849233U patent/CN202267962U/en not_active Expired - Fee Related
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103098039A (en) * | 2012-10-17 | 2013-05-08 | 华为技术有限公司 | High-speed peripheral-device interconnected-bus port configuration method and apparatus |
WO2014059617A1 (en) * | 2012-10-17 | 2014-04-24 | 华为技术有限公司 | Port configuration method and device for high-speed peripheral component interconnect express |
CN103098039B (en) * | 2012-10-17 | 2016-05-25 | 华为技术有限公司 | High-speed peripheral device interconnection bus port collocation method and equipment |
CN103150280A (en) * | 2012-12-28 | 2013-06-12 | 北京创毅讯联科技股份有限公司 | Bus interface patch board and data transmission system |
CN110737624A (en) * | 2019-09-23 | 2020-01-31 | 天津市英贝特航天科技有限公司 | circuit for realizing PCIE bus switching peripheral mounting |
CN111897760A (en) * | 2020-07-30 | 2020-11-06 | 普联技术有限公司 | Electronic product, expansion device thereof, control method and control device |
CN114116565A (en) * | 2021-11-26 | 2022-03-01 | 天津市英贝特航天科技有限公司 | Circuit, cardboard and computing equipment of compatible PCI and PCIE bus |
CN114116565B (en) * | 2021-11-26 | 2024-01-30 | 天津市英贝特航天科技有限公司 | Circuit compatible with PCI and PCIE buses, card board and computing equipment |
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Legal Events
Date | Code | Title | Description |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120606 Termination date: 20191011 |