CN202189106U - Satellite low frequency signal interface automatic test system - Google Patents
Satellite low frequency signal interface automatic test system Download PDFInfo
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- CN202189106U CN202189106U CN 201120271837 CN201120271837U CN202189106U CN 202189106 U CN202189106 U CN 202189106U CN 201120271837 CN201120271837 CN 201120271837 CN 201120271837 U CN201120271837 U CN 201120271837U CN 202189106 U CN202189106 U CN 202189106U
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Abstract
The utility model relates to a satellite low frequency signal interface automatic test system which is composed of a contact switching device, an oscilloscope, a digital universal meter, a monitor computer, and a switch cable. The monitor computer, the contact switching device, and the oscilloscope adopt the Ethernet communication mode. The monitor computer and the universal meter adopt the USB to Ethernet communication mode. The contact switching device is accurately connected with a satellite device via the switch cable, and then the monitor computer transmits orders to the contact switching device, the oscilloscope, and the universal meter respectively. The contact switching device returns relay state information, and the oscilloscope and the universal meter return test data of the satellite device. The satellite low frequency signal interface automatic test system has the characteristics of high reliability and excellent versatility, and is suitable for the interface test within entire satellite low frequency signals, and at the same time, is also suitable for the conducting insulation examination of an entire satellite cable network and a ground test cable network.
Description
Technical field
The utility model relates to a kind of satellite automated test system, particularly a kind of system that is applicable to whole each the stage low frequency signal interface testing of star AIT of satellite.
Background technology
In the satellite AIT stage; The integration test task is heavy; And present test data and test process rely on manually-operated fully, and detecting informationization and automatization level are low, how to improve the integration test level of IT application and testing efficiency; Reducing tester's labour intensity, is an important topic of integration test area research.
Satellite low frequency signal interface (abbreviation low frequency interface) test belongs to whole important content measurement of star integration test, also is the minimum test event of automaticity in the whole at present star integration test.Increase along with the satellite function; The satellite stand-alone device continues to increase; The equipment room low frequency interface is intricate, yet present low frequency interface method of testing and means do not change mainly still manually-operated during the low frequency interface test, artificial comparison and record along with the variation of satellite; Test receive artificial subjective factor influence big, the detecting information degree is low, testing efficiency is not high.
The utility model content
The technology of the utility model is dealt with problems and is: the deficiency that overcomes prior art; The satellite low frequency interface Auto-Test System that a kind of reliability is high, versatility is good is provided; Be applicable to the interface testing between whole star low frequency signal, also be adapted to the conducting insulation inspection of whole star cable system and ground test cable system simultaneously.
The technical solution of the utility model is: satellite low frequency signal interface Auto-Test System comprises contact switching device shifter, oscillograph, digital multimeter, supervisory control comuter and transit cable; The contact switching device shifter is connected with on-board equipment through transit cable, and supervisory control comuter is connected with contact switching device shifter, oscillograph and multimeter respectively; During test; Supervisory control comuter sends instruction to contact switching device shifter, oscillograph and multimeter respectively; The contact switching device shifter is connected current measuring point and oscillograph and multimeter simultaneously; Contact switching device shifter return relay status information is to supervisory control comuter, and the test data that while oscillograph and multimeter return on-board equipment is to supervisory control comuter.
Described contact switching device shifter comprises two passage switch boards, a passage break-make plate and control panels of being respectively applied for cut cable and equipment end measurement passage switching controls; The passage switch boards has 80 passages, and each passage has two relays, is connected respectively to the anode and the negative terminal of measuring port; Passage break-make plate is made up of 80 passages, and each passage is provided with the relay of a stube cable end and equipment end contact; Passage break-make plate is totally 80 relays, is connected to form between passage break-make plate and the control panel to measure passage; Control panel receives the steering order of supervisory control comuter, and the status information with each relay feeds back to supervisory control comuter simultaneously.
Described passage switch boards comprises control FPGA, two relay and the detection feedback FPGA of putting of double-pole; Control FPGA receives the steering order of supervisory control comuter; Steering order is deciphered; The output order pulse will be corresponding with tested point the two relays of putting of double-pole connect; Detection feedback FPGA detects command information and the two status informations of putting relay of double-pole of control FPGA; As the unique of the command pulse of control FPGA output and when only having that the double-pole that links to each other with tested point is two puts relay closes, tested point measured simultaneously the double-pole pair information feedback of putting relay to supervisory control comuter, otherwise sent abnormal alarm to supervisory control comuter.
Described passage break-make plate comprises control FPGA, two relay and the detection feedback FPGA of putting of double-pole; Control FPGA receives the steering order of supervisory control comuter, and steering order is deciphered, and the two relays of putting of the double-pole that the output order pulse will be corresponding with tested point are connected, and detection feedback FPGA detection double-pole is two to be put the status information of relay and feed back to supervisory control comuter.
Described supervisory control comuter and contact switching device shifter and oscillograph adopt the Ethernet mode to communicate.The mode that described supervisory control comuter and multimeter adopt USB to change Ethernet communicates.
The utility model advantage compared with prior art is:
1, the utility model low frequency interface Auto-Test System replaces to active contact switching device shifter with existing passive interconnecting device; Accomplishing contact through interface testing software control contact switching device shifter automaticallyes switch; The measurement result of interface testing software collection surveying instrument (multimeter and oscillograph) is also compared; Than preserving test result after the correct and generating test report; Thereby improve the level of IT application and the testing efficiency of low frequency interface test, and reduce tester's labour intensity and danger to greatest extent;
2, for the also point of cable system, existing method can't guarantee the pointwise traversal, and the utility model low frequency interface Auto-Test System adopts also puts the principle that attribute is equal to proper testing point, has effectively guaranteed the measurement of pointwise traversal, and test coverage is improved;
3, existing low frequency interface test needs the tester to operate on the star side; The other operational danger of star is high; Personnel labor intensity is big; The utility model low frequency interface test macro adopts Long-distance Control contact switching device shifter to accomplish the low frequency interface test, and the tester can carry out between test, and tester's labour intensity significantly reduces;
4, for same interface testing project; If carried out repeatedly test; Existing method of testing can't guarantee that the test condition of each test is in full accord; The low frequency interface test macro all carries out according to fixing testing process each test event, and the test condition of each test is in full accord, has guaranteed the comparability of each test data effectively;
5, for the interpretation of low frequency interface test data; Existing method relies on artificial interpretation fully, and the interpretation personnel often will carry out according to experience and memory, and the interpretation reliability receives interpretation personnel subjective factor to influence bigger; The utility model low frequency interface Auto-Test System can be carried out historical query with test data; And can the playback test process, the data interpretation personnel can hold test mode at that time more accurately, and test data interpretation reliability is high.
Description of drawings
Fig. 1 is the theory of constitution figure of the utility model test macro;
Fig. 2 is the utility model contact switching device shifter structural drawing;
Fig. 3 is the control principle figure of the utility model contact switching device shifter;
Fig. 4 is the utility model contact switching device shifter passage switch boards fundamental diagram;
Fig. 5 is the utility model contact switching device shifter passage break-make plate fundamental diagram;
Fig. 6 is the utility model control FPGA workflow diagram;
Fig. 7 is the utility model detection feedback FPGA workflow diagram;
Test flow chart when Fig. 8 uses the oscillograph test for the utility model.
Embodiment
As shown in Figure 1, the utility model satellite low frequency signal interface test system is made up of contact switching device shifter, oscillograph, digital multimeter, supervisory control comuter and transit cable.Supervisory control comuter and contact switching device shifter and oscillograph adopt the ethernet communication mode, and supervisory control comuter and multimeter adopt USB to change the ethernet communication mode.The contact switching device shifter is connected correctly through transit cable with on-board equipment after; Supervisory control comuter sends instruction to contact switching device shifter, oscillograph and multimeter respectively; Contact switching device shifter return relay status information, oscillograph and multimeter return the test data of on-board equipment.
As shown in Figure 2, the contact switching device shifter is made up of circuit board, accumulator, built-in multimeter and connector, and accumulator is selected the 12V/5Ah lithium ion battery for use; The multimeter module is selected Agilent U2741A module, this module direct current supply, and mini USB interface, can be equipped with USB changes LAN interface; The connector model is selected CD1-51ZJ and CD1-37ZJ for use.Supervisory control comuter sends instructions to the control panel of contact switching device shifter; Control panel is resolved instruction and is produced command pulse to the target switch boards; Target switch boards relay carries out corresponding actions; Simultaneously relay status is turned back to control panel, control panel sends to supervisory control comuter with all relay status packings.After supervisory control comuter interpretation relay status is correct, read oscillograph or multimeter measurement result, thereby accomplish the one-shot measurement process.
As shown in Figure 3, the circuit board of contact switching device shifter is made up of two passage switch boards (being respectively applied for the switching controls that cut cable and equipment end are measured passage), passage break-make plate, control panel.Therefore the passage switch boards has 80 passages, and each passage has two relays, is connected respectively to the anode and the negative terminal of measuring port, break-make switch boards totally 160 relays.Passage switch boards relay is selected the non-magnetic latching relay of Omron G6K series for use, and more than the withstand voltage AC750V of relay, contact resistance is less than 100m Ω, and more than the insulation resistance 1000M Ω, serviceable life is more than 5,000 ten thousand times.Passage break-make plate is made up of 80 passages, relay of each passage, and the contact of difference stube cable end and equipment end, the break-make plate is totally 80 relays.Break-make plate relay is selected Omron G6K series magnetic guard relay for use, and more than the withstand voltage AC750V of relay, contact resistance is less than 100m Ω, and more than the insulation resistance 1000M Ω, serviceable life is more than 5,000 ten thousand times.Control panel selects for use single-chip microcomputer and FPGA to control and state acquisition, and single-chip microcomputer is selected Atmegl64 type single-chip microcomputer for use, and FPGA selects 300,000 FPGA of altera company for use.
Fig. 4 and Fig. 5 have provided respectively in the contact switching device shifter, the schematic diagram of passage switch boards and passage break-make plate.In Fig. 4, single-chip microcomputer receives the host computer instruction, after CRC check analysis correctly; Director data is sent to control FPGA, and control FPGA decoding produces control wave, and pulse signal switches on and off through overdrive circuit rear drive relay; Simultaneously each relay status is turned back among the detection feedback FPGA, carry out the uniqueness judgement, the uniqueness judgement is carried out in two steps; The uniqueness of first step inspection control FPGA output order pulse; Second step was detected the current idle condition (not connecting any measurement passage) that is in of target measurement end (anode or negative terminal), had only for two steps all satisfied judgement and passed through, and the instruction of control FPGA is normally exported.Obstructed out-of-date when judgement, FPGA returns ERST to single-chip microcomputer, and single-chip microcomputer sends to supervisory control comuter, and the manual work of computing machine alarm is confirmed.
Be the annexation that example key diagram 4 is measured in the passage switch boards with No. one relay path below.Single-chip microcomputer sends to director data among the control FPGA through 16 bit address bus least-significant byte AD0-AD7 and 16 bit data bus least-significant byte D0-D7, and control FPGA carries out instruction decode, and detection feedback FPGA carries out the uniqueness judgement simultaneously; Judgement is through back output order pulse q1, and q1 becomes Q1 through overdrive circuit, and Q1 is loaded on the relay D1 coil; Make relay D1 coil stream that electric current arranged; Relay D1 coil attracting electric relay D1 contact, with measuring point n1 on the star and measurement port+be connected, measuring point n1 is obtained through the 40mA protective tube by measuring point m1 on the star on the star; Owing to relay D1 is the two relays of putting of double-pole; So when relay Q1 coil stream had electric current, the VCC of relay Q1 was connected with detection signal p1, detection signal p1 passes through resistance R; Obtain FQ1 entering detection feedback FPGA and carry out state-detection, testing result returns to single-chip microcomputer through 16 bit address bus most-significant byte AD8-AD15 and 16 bit data bus most-significant byte D8-D15.Each road of residue is identical with the working method of the first via among Fig. 4.
Fig. 5 and Fig. 4 are similar, and difference is the break-make of a control channel among Fig. 5, and contact does not insert the measurement port of oscillograph or multimeter, so do not carry out the uniqueness judgement.In addition, this passage relay need keep a state for a long time, in order to save power consumption, selects magnetic latching relay for use.
Equally, be the annexation of measuring passage break-make plate in the example key diagram 5 with No. one relay path.Single-chip microcomputer sends to director data among the control FPGA through 16 bit address bus least-significant byte AD0-AD7 and 16 bit data bus least-significant byte D0-D7; Control FPGA decoding produces command pulse q1_S and q1_R; Q1_S is a relay D1 closing coil control signal, and q1_R breaks off coil control signal for relay D1, and q1_S and q1_R are loaded into relay D1 closing coil respectively and break off on the coil through obtaining Q1_S and Q1_R behind the overdrive circuit; When Q1_S is high level; Relay D1 connects, and 1 connection of equipment end and cut cable is represented in measuring point n1 connection on measuring point m1 and the star on the star.VCC and detection signal p1 connect simultaneously, and p1 obtains FQ0 through resistance R and sends detection feedback FPGA to, and FPGA returns to single-chip microcomputer with testing result through 16 bit address bus most-significant byte AD8-AD15 and 16 bit data bus most-significant byte D8-D15.In like manner, when Q1_R is high level, measuring point n1 disconnection on measuring point m1 and the star on the star.Each road of residue is similar with the first via among Fig. 5.
Fig. 6 is control FPGA workflow diagram.FPGA is after carrying out power-up initializing in control, and the instruction of cycle detection single-chip microcomputer is when detecting instruction; Reading of data; In register, the status information that the FPGA of interpretation detection feedback then returns, information are normally then deciphered the output order pulse with data latching; Information then empties register data unusually, returns original state.
Fig. 7 is a detection feedback FPGA workflow diagram.Behind the detection feedback FPGA power-up initializing, cycle detection control FPGA output I/O port level, unique or do not have a high level when port level high level; Then satisfy the uniqueness judgment condition; Detection feedback FPGA output control signal powers up for the subsequent instructions driving circuit, and returns normal information to control FPGA, if it is not unique to detect control FPGA output port high level; Then do not satisfy the uniqueness judgment condition; Detection feedback FPGA powers up for the subsequent drive circuit, and wrong I/O port is returned to single-chip microcomputer, returns abnormal information simultaneously to control FPGA.After powering up normally; Detection feedback cycle detection measuring relay state; Be less than or equal to a relay connection if measure the anode synchronization, measure the negative terminal synchronization simultaneously and be less than or equal to a relay connection, judge that then relay status is correct; Feedback FPGA turns back to single-chip microcomputer with relay status information coding, returns normal information simultaneously to controlling FPGA.
Fig. 8 is oscillographic universal test flow process.Host computer and oscillograph and multimeter adopt Agilent and Tektronix disclosure agreement, and host computer is communicated by letter with the contact switch controller and adopted dynamic link library to communicate communication error correcting system employing 16bits CRC check mode.Whole testing process is divided into and contact switching device shifter state confirmation, the setting of oscillograph state, the setting of contact switching device shifter contact are set, read and processing test data, and recovers step such as contact switching device shifter state and form.
Before the test beginning, need to confirm contact switching device shifter address and all measuring relay states, guarantee that all measuring relay states are off-state.When a plurality of switching device shifter, need to distribute the address.The oscillograph state is set then; Nominal value according to measured signal in the test event is provided with information such as oscillograph horizontal stroke, ordinate resolution, triggering source and triggering level; After oscillograph is provided with completion; Contact information butt joint point switching device shifter according to measured signal in the test event is provided with again, notes it must being negative point, place or the loop line of first connection signal when making contact, and then the connection signal main track; Break is then on the contrary, and first break signal is negative point, place or loop line of break signal more on schedule.Judgement be provided with correct after, the read test result also compares test result and nominal value, whether judgment data normal.Recover contact switching device shifter state at last, after guaranteeing once to test completion, all measuring relays of contact switching device shifter are off-state.
This low frequency signal interface test system has mainly adopted following reliability and safety Design:
(1) Primary Components such as single-chip microcomputer, FPGA and relay are selected general corps level chip for use, and other device selects for use technical grade to improve the reliability service of device.
(2) single-chip microcomputer under normal conditions (do not receive host computer instruction) be in the regularly steady operational status of transmission relqy state, to improve the stable operation of single-chip microcomputer.
(3) relay status timing acquiring, when unusual the connection appearred in relay, this relay of FPGA automatic cutout turned back to host computer with whole process simultaneously.
(4) on each drive test amount passage, insert the 40mA fuse, guarantee that path in time breaks off under relay operation irregularity situation, guarantee that star ground breaks off, protection on-board equipment safety.
(5) FPGA design uniqueness decision device; Go code before the pulse decoding carrying out relay at every turn; Need to judge whether the target measurement path has other relay to connect, if having, then FPGA stops decoding; Simultaneously this relay numbering and relay status are returned to single-chip microcomputer, single-chip microcomputer is issued host computer again and is handled.
(6) all active equipments of system all adopt direct current supply, to improve the operation stability of system.
(7) strict control testing process is in time gathered host computer and is sent state before and after the instruction, guarantees to instruct the in time reliable interpretation of executing state.
The content of not doing to describe in detail in the utility model instructions belongs to those skilled in the art's known technology.
Claims (6)
1. satellite low frequency signal interface Auto-Test System is characterized in that comprising: contact switching device shifter, oscillograph, digital multimeter, supervisory control comuter and transit cable; The contact switching device shifter is connected with on-board equipment through transit cable, and supervisory control comuter is connected with contact switching device shifter, oscillograph and multimeter respectively; During test; Supervisory control comuter sends instruction to contact switching device shifter, oscillograph and multimeter respectively; The contact switching device shifter is connected current measuring point and oscillograph and multimeter simultaneously; Contact switching device shifter return relay status information is to supervisory control comuter, and the test data that while oscillograph and multimeter return on-board equipment is to supervisory control comuter.
2. satellite low frequency signal interface Auto-Test System according to claim 1 is characterized in that: described contact switching device shifter comprises two passage switch boards, a passage break-make plate and control panels of being respectively applied for cut cable and equipment end measurement passage switching controls; The passage switch boards has 80 passages, and each passage has two relays, is connected respectively to the anode and the negative terminal of measuring port; Passage break-make plate is made up of 80 passages, and each passage is provided with the relay of a stube cable end and equipment end contact; Passage break-make plate is totally 80 relays, is connected to form between passage break-make plate and the control panel to measure passage; Control panel receives the steering order of supervisory control comuter, and the status information with each relay feeds back to supervisory control comuter simultaneously.
3. satellite low frequency signal interface Auto-Test System according to claim 2 is characterized in that: described passage switch boards comprises control FPGA, two relay and the detection feedback FPGA of putting of double-pole; Control FPGA receives the steering order of supervisory control comuter; Steering order is deciphered; The output order pulse will be corresponding with tested point the two relays of putting of double-pole connect; Detection feedback FPGA detects command information and the two status informations of putting relay of double-pole of control FPGA; As the unique of the command pulse of control FPGA output and when only having that the double-pole that links to each other with tested point is two puts relay closes, tested point measured simultaneously the double-pole pair information feedback of putting relay to supervisory control comuter, otherwise sent abnormal alarm to supervisory control comuter.
4. satellite low frequency signal interface Auto-Test System according to claim 2 is characterized in that: described passage break-make plate comprises control FPGA, two relay and the detection feedback FPGA of putting of double-pole; Control FPGA receives the steering order of supervisory control comuter, and steering order is deciphered, and the two relays of putting of the double-pole that the output order pulse will be corresponding with tested point are connected, and detection feedback FPGA detection double-pole is two to be put the status information of relay and feed back to supervisory control comuter.
5. satellite low frequency signal interface Auto-Test System according to claim 1 is characterized in that: described supervisory control comuter and contact switching device shifter and oscillograph adopt the Ethernet mode to communicate.
6. satellite low frequency signal interface Auto-Test System according to claim 1 is characterized in that: the mode that described supervisory control comuter and multimeter adopt USB to change Ethernet communicates.
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| CN 201120271837 CN202189106U (en) | 2011-07-28 | 2011-07-28 | Satellite low frequency signal interface automatic test system |
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| CN 201120271837 CN202189106U (en) | 2011-07-28 | 2011-07-28 | Satellite low frequency signal interface automatic test system |
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| CN103913672A (en) * | 2014-03-20 | 2014-07-09 | 中国空间技术研究院 | Satellite low-frequency interface automatic testing system |
| CN104280648A (en) * | 2014-10-31 | 2015-01-14 | 中国航空工业集团公司上海航空测控技术研究所 | Automatic adapting cable test device and method |
| CN104569697A (en) * | 2015-01-30 | 2015-04-29 | 航天东方红卫星有限公司 | Power supply interface detection method for minisatellite comprehensive test |
| CN105116293A (en) * | 2015-09-14 | 2015-12-02 | 中国空间技术研究院 | Conduction and insulation automatic test method of aerospace low frequency cable network |
| CN107607762A (en) * | 2017-07-19 | 2018-01-19 | 上海卫星工程研究所 | Oscillograph security measuring device and method for satellite electric signal interface testing |
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| CN108267653A (en) * | 2017-12-13 | 2018-07-10 | 中国空间技术研究院 | A kind of low frequency interface tests switching circuit automatically |
| CN109188151A (en) * | 2018-09-30 | 2019-01-11 | 上海科梁信息工程股份有限公司 | A kind of small signaling interface test macro and method |
| CN110445675A (en) * | 2019-07-22 | 2019-11-12 | 北京空间技术研制试验中心 | Network-based spacecraft ground test macro automation control method |
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2011
- 2011-07-28 CN CN 201120271837 patent/CN202189106U/en not_active Expired - Lifetime
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| CN104280648A (en) * | 2014-10-31 | 2015-01-14 | 中国航空工业集团公司上海航空测控技术研究所 | Automatic adapting cable test device and method |
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| CN105116293B (en) * | 2015-09-14 | 2018-05-01 | 中国空间技术研究院 | A kind of space flight low-frequency cable net conducting insulation automatic test approach |
| CN105116293A (en) * | 2015-09-14 | 2015-12-02 | 中国空间技术研究院 | Conduction and insulation automatic test method of aerospace low frequency cable network |
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| CN112834965B (en) * | 2020-12-31 | 2021-09-24 | 中国科学院微小卫星创新研究院 | Automatic tester for satellite electric interface |
| CN112834965A (en) * | 2020-12-31 | 2021-05-25 | 中国科学院微小卫星创新研究院 | Automatic tester for satellite electric interface |
| CN113933566B (en) * | 2020-12-31 | 2024-01-26 | 中国科学院微小卫星创新研究院 | Program controlled junction box |
| CN114295939A (en) * | 2021-01-26 | 2022-04-08 | 中国科学院微小卫星创新研究院 | Automatic test system for satellite cable network |
| CN114295939B (en) * | 2021-01-26 | 2023-07-25 | 中国科学院微小卫星创新研究院 | Satellite cable network automatic test system |
| CN113655368A (en) * | 2021-08-06 | 2021-11-16 | 湖北三江航天万峰科技发展有限公司 | Batch detection device for bus interface boards |
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