CN112557787B - Universal satellite electronics test system - Google Patents

Universal satellite electronics test system Download PDF

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Publication number
CN112557787B
CN112557787B CN202011343549.2A CN202011343549A CN112557787B CN 112557787 B CN112557787 B CN 112557787B CN 202011343549 A CN202011343549 A CN 202011343549A CN 112557787 B CN112557787 B CN 112557787B
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test
unit
input
interface
node
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CN112557787A (en
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石龙龙
王学良
李锐
贺芸
何盼
祁见忠
王正凯
涂珍贞
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Shanghai Engineering Center for Microsatellites
Innovation Academy for Microsatellites of CAS
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Shanghai Engineering Center for Microsatellites
Innovation Academy for Microsatellites of CAS
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/005Testing of electric installations on transport means
    • G01R31/008Testing of electric installations on transport means on air- or spacecraft, railway rolling stock or sea-going vessels

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  • General Physics & Mathematics (AREA)
  • Testing Electric Properties And Detecting Electric Faults (AREA)

Abstract

The application provides a universal satellite electronics test system, comprising: the universal satellite electronics test system simulates the working environment of the single unit to be tested, and assists the single unit to be tested to carry out hardware debugging, function verification, system test, software development and debugging, on-board cable conduction and insulation test; the universal satellite electronics testing system converts various interfaces into universal standard interfaces through a switching tool so as to connect a tested machine with different interface types and satellite cables with different forms; standard test input and output are connected through a manual mode or an automatic node switching mode.

Description

Universal satellite electronics test system
Technical Field
The application relates to the technical field of satellite electronics, in particular to a universal satellite electronics testing system.
Background
Satellites operate in orbit, requiring multiple systems to interoperate. The comprehensive electronic subsystem is responsible for issuing a number instruction, so that each subsystem of the whole satellite (satellite electronic single machine) can operate in a coordinated manner, and plays a role of a commander in each subsystem of the satellite. This system is sometimes also referred to as an on-board data management system (OBDH, on-board data handling system).
Integrated electronics systems are a core component of the overall satellite electronics. The core of the comprehensive electronic system is a satellite-borne computer, which is a satellite-borne controller with the most powerful functions on the satellite, the most management equipment and the most heavy tasks, and almost all interactions with all subsystems (satellite electronic single machines) exist. The comprehensive electronic system performs information interaction with a lower computer of each component on the satellite through various buses and interfaces on the satellite, and realizes control and management of satellite management, attitude control, measurement and control communication and effective load tasks.
The satellite electronics single machine has special purpose, and different types of satellite electronics single machines have different functional performances and interfaces. The corresponding test equipment also has specificity, needs to develop the special test equipment, and has long time period and high cost.
Disclosure of Invention
The application aims to provide a universal satellite electronics test system to solve the problem of poor universality of the existing satellite electronics hardware interface.
In order to solve the above technical problems, the present application provides a universal satellite electronics test system, comprising: the universal satellite electronics test system simulates the working environment of the single unit to be tested, and assists the single unit to be tested to carry out hardware debugging, function verification, system testing, software development and debugging, and on-board cable conduction and insulation test;
the universal satellite electronics testing system converts various interfaces into universal standard interfaces through a switching tool so as to connect a tested machine with different interface types and satellite cables with different forms;
standard test input and output are connected through a manual mode or an automatic node switching mode.
Optionally, in the universal satellite electronics test system, the method includes:
a functional test unit configured to provide a standard test input output;
an automatic test unit configured to automatically match the test node and the test input/output quantity node;
the test computer is configured to control the automatic test unit to automatically match the test node and the test input output quantity node according to the input node table so as to perform automatic test;
the node transfer unit is configured to provide line transfer, transfer the interface node of the single unit to be tested to the standard output node on the node transfer unit, and serve as the input of the automatic test unit to form a test node.
Optionally, in the universal satellite electronics test system, the functional test unit provides a standard test input/output and an interface externally connected with a standard test device, establishes a standard test reference environment, and serves as an output of the automatic test unit;
the function test unit provides universal analog input, resistance input, OC output interface and standard test equipment interface according to the single satellite electronics function performance.
Optionally, in the universal satellite electronics test system, the functional test unit includes:
the input interface of the function test unit is a connector of J36A-96, is connected with the output of the automatic test unit and is correspondingly connected with the expansion head matrix of the function test unit one by one through the bottom circuit board;
the function test unit expansion head matrix is used as a test input and is divided into a voltage test input area, a resistance test input area, an OC instruction output test area and a standard test equipment input area;
the 1-10 points are voltage test input areas, the expansion head matrixes of the function test units are connected in pairs, the voltage is provided by a battery pack, red is a positive voltage end, and black is a negative voltage end;
11-20 points are resistance test input areas provided by the resistor groups;
the 21-25 points are OC instruction output test areas, which consist of pull-up voltage and current limiting resistors, and consist of 4 output circuits and one instruction loop;
the standard test equipment input area includes:
the 26-35 points are 422 serial port test areas, and serial port pin definitions are marked below the interface;
a standard female serial port interface is arranged below the functional test unit panel;
voltmeter, battery jar, serial port and oscillometer interface are respectively arranged below the panel of the function test unit;
the lowest part of the functional test unit panel is reserved with a grounding interface which is divided into a primary ground, a secondary ground and a shell ground;
the jack is fixedly connected with the test input/output equipment;
the jack is marked with a fixedly connected resistor, voltage or test input/output equipment name.
Optionally, in the universal satellite electronics test system, the node switching unit is connected with a unit under test, an automatic test unit and a functional test unit;
the node switching unit provides direct connection of connectors and switching amplification of test nodes for the single machine to be tested;
the node switching unit is matched with the automatic test unit to be automatically connected with the functional test unit to realize the interface matching of different tested single machines;
the node switching unit is directly and manually connected with the functional test unit for use, so that the universality of the test equipment is realized.
Optionally, in the universal satellite electronics test system, the node switching unit includes:
the node switching unit input interface is configured as a standard J36A-96 connector and covers the maximum interface node number of the single unit to be tested;
the node switching unit interface switching tool is used for switching the interface of the single unit to be tested or the cable on the satellite to be tested into a standard J36A-96 connector according to the switching cable manufactured by the interfaces of the single unit to be tested and the cable on the satellite to be tested, and is connected with an input interface to realize the connection between the interfaces of the single unit to be tested and the cable on the satellite to be tested and the node switching unit;
the node switching unit expansion head matrix consists of expansion head jacks, and the expansion head jacks are in one-to-one corresponding through connection with nodes of the input interface through a bottom circuit board according to serial numbers;
the node switching unit output interface is a J36A-96TK standard joint and is connected with the nodes of the input interface in a one-to-one correspondence manner and is used as the input of the automatic test unit.
Optionally, in the universal satellite electronics testing system,
a test computer configured to determine whether the connection of the connector conforms to the input node table;
a test computer configured to time-share test through all the test nodes and test input/output nodes;
the test computer is also configured to perform visual control and monitoring of the test process and the test data, and perform automatic acquisition, inquiry and playback of the test data;
the test computer is also configured to interpret the test data and identify when the test data is abnormal;
the test computer is also configured to communicate with the single machine to be tested through the on-board bus simulator according to an on-board communication protocol, control the single machine to be tested and receive single machine data;
and the test computer is also configured to be connected with the automatic test unit through a serial bus and control the automatic test unit to complete test items.
Optionally, in the universal satellite electronics testing system,
the automatic test unit is connected with the test computer, the node switching unit and the functional test unit, receives a control instruction of the test computer, controls the line connection between the node switching unit and the functional test unit, and automatically matches the automatic tests of the test interfaces of different tested single machines and the interfaces of different tested satellite cables;
the automatic test unit is communicated with the test computer through a serial port and is respectively connected with an output interface of the node switching unit and an input interface of the functional test unit through a through cable;
the automatic test unit receives the instruction of the test computer, controls the line connection between the node switching unit and the functional test unit, and realizes the node matching and automatic connection of different interfaces;
the automatic test unit has a data acquisition function and an analog-to-digital conversion function, is used for realizing a cable test function and comparing the voltage quantity acquisition of the single unit to be tested, and is provided with a digital-to-analog conversion function according to the requirement and is used for providing a voltage quantity acquisition source of the single unit to be tested.
The input interface of the automatic test unit is connected with the node switching unit and is a standard interface of J36A-96; the output interface of the automatic test unit is connected with the functional test unit and is a standard interface of J36A-96;
the automatic test unit display area is used for displaying the current node connection condition, DAC output setting condition, acquisition and communication states;
the automatic test unit grounding area leads out the grounding of the automatic test unit and is used for being commonly grounded with other test units.
Optionally, in the universal satellite electronics test system, the automatic test unit includes:
the switch matrix unit is used for realizing the connection of channels between any two nodes between the input interface of the automatic test unit and the output interface of the automatic test unit;
the processor unit controls the switch matrix unit through GPIO signals or FPGA, controls the serial port to realize communication with the test computer, controls the analog-to-digital conversion unit to realize the data acquisition comparison function and the cable conduction test function, and controls the digital-to-analog conversion unit to provide an analog quantity test input source.
The analog-to-digital conversion unit is used for completing the analog quantity acquisition output by the single unit to be detected and comparing the data acquisition function of the single unit to be detected; the device is also used for testing cables, is connected with all nodes of an input interface of an automatic test unit and an output interface of the automatic test unit, and has conversion precision of 16 bits or 50mv and stability of 1mv;
the digital-to-analog conversion unit is used for generating variable voltage output and is used as input of analog quantity test; and (3) connecting the output of the digital-to-analog conversion unit to the DAC output area and the node, and reserving a test point through an expansion head.
Optionally, in the universal satellite electronics test system, the switch matrix unit includes:
the switch matrix unit can select 4 channels simultaneously without mutual influence;
the switch matrix unit adopts a time-sharing traversal mode to test all nodes;
the switch matrix unit uses a plurality of analog switches to replace relay switches to realize channel selection;
the switch matrix unit adopts 4 analog switches of 96-1 selection to be connected in parallel with an input interface of the automatic test unit, and the 4 analog switches of 96-1 selection are bidirectional conduction devices and are connected in parallel with an output interface of the automatic test unit;
the 96-selection 1 analog switch is realized in a cascade connection mode of a plurality of low-channel-number analog switches;
the 96-select 1 analog switch is controlled by a GPIO signal or an FPGA of the processor unit.
In the universal satellite electronics test system provided by the application, the work environment of the single unit to be tested is simulated, the single unit to be tested is assisted to carry out hardware debugging, function verification, system test, software development and debugging, cable conduction and insulation test on the satellite to be tested, and various interfaces are converted into universal standard interfaces through the switching tool so as to connect the single unit to be tested with different interface types and satellite cables with different forms, so that the universal satellite electronics test method based on universality and low cost requirements is realized, the universal satellite electronics test system can adapt to the interface changes of different single units, and the equipment has the characteristics of low cost, simplicity in operation, readable results and the like.
In the universal satellite electronics test system of the application, the test equipment has two modes of manual test and automatic test. The automatic test unit automatically matches test input and output according to the input interface, and simple, convenient and reliable signal input and switching device is realized in the input of various signal sources. Meanwhile, the satellite cable conduction and insulation test can be performed by using the test equipment.
The application provides a general satellite electronics hardware test system for adapting to the type of a single interface of a satellite electronics to be tested and the change of the shape of a satellite cable. Performing universal node switching aiming at various interface types, and setting a universal test input/output interface; the manual test mode and the automatic test mode are provided, test results can be stored and analyzed, the universality and the convenience of the satellite electronics test equipment are improved, and the cost is reduced.
Drawings
FIG. 1 is a schematic diagram of a general satellite electronics testing system according to an embodiment of the application;
FIG. 2 is a schematic diagram of a node switch unit of the universal satellite electronics test system according to an embodiment of the present application;
FIG. 3 is a schematic diagram of a functional test unit of a general satellite electronics test system according to an embodiment of the present application;
FIG. 4 is a schematic diagram of an automatic test unit of a general satellite electronics test system according to an embodiment of the present application;
FIG. 5 is a schematic diagram of a switch matrix unit of a universal satellite electronics test system according to an embodiment of the present application;
FIG. 6 is a schematic diagram of an input interface of an analog-to-digital conversion unit of a general satellite electronics test system according to an embodiment of the present application;
the figure shows: 10-a test computer; 20-a single unit to be tested; 30-an automatic test unit; a 40-node switching unit; 50-functional test unit.
Detailed Description
The general satellite electronics testing system according to the present application will be described in further detail with reference to the accompanying drawings and examples. Advantages and features of the application will become more apparent from the following description and from the claims. It should be noted that the drawings are in a very simplified form and are all to a non-precise scale, merely for convenience and clarity in aiding in the description of embodiments of the application.
In addition, features of different embodiments of the application may be combined with each other, unless otherwise specified. For example, a feature of the second embodiment may be substituted for a corresponding feature of the first embodiment, or may have the same or similar function, and the resulting embodiment may fall within the scope of disclosure or description of the application.
The application provides a general satellite electronics testing system, which aims to solve the problem of poor universality of the existing satellite electronics hardware interface.
To achieve the above idea, the present application provides a universal satellite electronics test system, including: the general satellite electronics test system simulates the working environment of the single unit 20 to be tested, and assists the single unit 20 to be tested to carry out hardware debugging, function verification, system testing, software development and debugging, and cable conduction and insulation test on the satellite to be tested; the universal satellite electronics testing system converts various interfaces into universal standard interfaces through a switching tool so as to connect a tested machine 20 with different interface types and satellite cables with different forms; standard test input and output are connected through a manual mode or an automatic node switching mode.
The test system is used for simulating the working environment of the single machine and assisting the single machine in debugging, function verification, system test, software development and debugging, on-board cable conduction and insulation test. The main functions are as follows: the method is suitable for single-machine satellite cables with different interface types and different forms, and can convert various interfaces into universal standard interfaces by means of a switching tool; providing a standard test input output. According to the functional performance of the satellite electronics single machine, common test environments such as general analog input, resistance input, OC output interface, standard test equipment interface and the like are designed. The device has two working modes of manual and automatic testing. All test functions can be realized by manually interconnecting nodes. The automatic test unit may automatically match the test node with the test input output node. The test computer 10 controls the automatic test module to match the input and output nodes for automatic test according to the imported node list; whether the connection of the connector accords with the input node table can be judged; all nodes can be traversed by time-sharing test; visual control and monitoring of the test process and the test data are realized, and automatic acquisition, inquiry and playback of the test data are realized. The test data may be stored in a format that is easy to read and write. Test data may be interpreted and marked for error or anomaly.
Specifically, the universal test system adopts a modularized design and is divided into four modules: test computer 10, node switching unit 40, functional test unit 50, and automatic test unit 30. The method is divided into a manual test mode and an automatic test mode. The test system composition is shown in figure 1. The node switch unit 40 is operative to provide line switching for switching the interface node of the unit under test 20 to the standard output node on the node switch unit 40 and also as input to the automatic test unit 30. The function test unit 50 is used for providing standard test input and output and an interface for externally connecting standard test equipment, and establishing a standard test reference environment and being used as output of the automatic test unit 30. The automatic test unit 30 connects the node switching unit 40 and the functional test unit 50, and realizes connection of any node and standard test input, and universality and automation of the test system. The test computer 10 is connected with the interface of the tested stand-alone device 20 and the automatic test unit 30 to realize the visual monitoring of test data and the control function of the test process. Without the automatic test unit 30, the node switching unit 40 and the functional test unit 50 may be manually connected to implement a manual test mode of the test apparatus.
Further, the node switching unit 40 is connected to the stand-alone unit 20 to be tested, the automatic test unit 30 and the functional test unit 50. The node switching unit 40 mainly provides the through connection of the single-unit connector under test and the switching amplification of the node. Matching of different single machine interfaces is achieved by matching with the automatic test unit 30 or directly connecting with the functional test unit 50 manually, so that universality of the test equipment is achieved. The node switching unit 40 is designed as shown in fig. 2. The node switching unit 40 is composed of four parts: interface switching frock 43, input interface 41, expansion head matrix 44 and output interface 42. The input interface 41 is a standard J36A-96 connector having 96 nodes that can cover the maximum number of interface nodes of the unit under test 20. The interface switching tool 43 is a switching cable manufactured according to the interface of the single unit 20 to be tested and the cable connector on the satellite to be tested, and switches different interfaces of the single unit 20 to be tested or the cable to be tested into a standard J36A-96 connector to be connected with the input interface. For example: one end of the J36A-52 interface-to-J36A-96 tool cable is a J36A-52 joint, the other end of the J36A-96 tool cable is a J36A-96 joint, the front 52 joints of the J36A-96 joints and the J36A-52 joints are connected in a one-to-one correspondence through way, and the rest joints of the J36A-96 joints are empty. The connection of the single unit 20 to be tested, the cable joint to be tested and the node switching unit 40 is realized by using the interface switching tool cable. The right side of the node switching unit 40 is an expansion head matrix 44, which is composed of 10 rows of 10 columns and 100 expansion head jacks, and the expansion head jacks are numbered 1-100 according to the sequence from top to bottom and from left to right. The pin number is marked under the receptacle. The expansion head jacks are connected with the nodes of the input interface in a one-to-one correspondence through way through the bottom circuit board according to serial numbers. The remaining 4 (97-100) interconnects are used as spare. The output interface 42 is a J36A-96TK (hole) standard connector, is connected with the input interface nodes in a one-to-one correspondence, and externally serves as input of the automatic test unit 30.
In one embodiment of the present application, the functional test unit 50 connects the automatic test unit 30 and the node switching unit 40. And connecting different input and output quantities according to the test cases, and accessing different test equipment. The functional test unit 50 mainly provides a stand-alone test input/output, including a temperature amount, a voltage amount, a current amount, a frequency amount, a 422 serial port, and the like. The design of the test unit is shown in fig. 3. Input interface 51 is a 96-well connector (J36A-96) for connecting to the output of automatic test unit 30. The input interfaces 51 are connected in one-to-one correspondence with the right test input expansion heads through the bottom circuit board. The expansion head is divided into several areas according to the test input: voltage test zone 52, resistance test zone 53, OC test zone 54, and input zone for standard test equipment. The voltage test input area 52 is arranged at 1-10 points, the expansion heads are connected in pairs, the voltage is provided by the battery pack, red is the positive voltage end, and black is the negative voltage end. Points 11-20 are the resistive test input areas 53 provided by the resistor groups. The OC instruction output test area 54 is formed by pull-up voltage and current limiting resistor at 21-25 points. The system consists of 4 outputs and one command loop. The serial port test area 59 is at the point 26-35, serial port pin definition marks below the interface, and a standard female serial port interface is placed below the functional test unit. A voltmeter 56, a signal source frequency meter interface 58, a battery jar or voltage supply area 57, a serial port 59, an oscilloscope interface ammeter interface and the like are respectively arranged below the panel; the lowest reserved grounding interface 55 is divided into a primary ground, a secondary ground, a shell ground and the like. The jack is fixedly connected with the test input/output equipment. The jack is marked with a fixedly connected resistor, voltage or equipment name.
In one embodiment of the present application, the automatic test unit 30 connects the test computer 10, the node switching unit 40, and the functional test unit 50. And receiving a control instruction of the test computer 10, controlling the line connection between the node switching unit 40 and the functional test unit 50, and realizing the automatic test of matching different tested machine 20 test interfaces and different tested cable interfaces. The automatic test unit 30 communicates with the test computer 10 through a serial port, and is connected to an output interface of the node switching unit 40 and an input interface of the functional test unit 50 through a through cable, respectively. And receiving the instruction of the test computer 10, controlling the line connection between the node switching unit 40 and the functional test unit 50, and realizing the node matching and automatic connection of different interfaces. Meanwhile, the automatic test unit 30 has a data acquisition function (ADC) for realizing a cable test function and comparing voltage amount acquisition of the single unit under test 20. The DAC function can be set as required to provide a voltage acquisition source for the single unit 20 under test. The automatic test unit 30 is designed as shown in fig. 4. The input interface 31 is connected to the node switching unit 40 and is a 96-well standard interface. The output interface 32 is connected to the functional test unit 50 and is a 96-well standard interface. The display area 33 is used for displaying the current node connection condition, DAC output setting condition, acquisition, communication status, and the like. The ground region 392 leads to the ground of the automatic test unit 30 for common ground with other test units.
In one embodiment of the application, the switch matrix unit 34 enables connection of channels between any two nodes between the input interface and the output interface. The general switch matrix is designed by using input nodes and output nodes as rows and columns of the matrix respectively, and placing switches at each node of the matrix. The scheme can realize simultaneous selection of multiple paths, but has huge switch quantity, needs 96×96 switch nodes, and is controlled and complicated. Considering analog quantity differential acquisition and various grounding requirements, in order to save cost and reduce complexity, the switch matrix is designed to be capable of selecting 4 channels simultaneously without mutual influence; and testing all nodes in a time-sharing traversal mode. Channel selection is achieved by using a multi-channel analog switch instead of a relay switch, and the design block diagram is shown in fig. 5. In order to realize that 4 channels are simultaneously gated and are not mutually influenced, 4 analog switches of 96-1 are adopted to be connected in parallel with an input interface, and 4 analog switches of 96-1 are adopted to be connected in parallel with an output interface. It should be noted that the signal transmission direction is also different for different test items, so that the analog switch needs to use a bidirectional conduction device. In the device selection, the 96-selection 1 analog switch can be realized by adopting a cascade connection mode of a plurality of low-channel-number analog switches. The analog switch may be controlled using a processor GPIO signal or FPGA.
In one embodiment of the application, the processor unit 35 controls the switch matrix unit, which may be controlled by a GPIO signal or an FPGA. The serial port is controlled to enable communication with the test computer 10. The processor controls the ADC to realize the data acquisition and comparison function and the cable conduction test function, and controls the DAC to provide an analog quantity test input source. The ADC unit 36 is used for completing the analog quantity collection output by the single unit 20 to be tested, and comparing the data collection function of the single unit 20 to be tested, and the ADC is also used for testing the cable. Therefore, the ADC needs to be connected to all nodes of the input interface and the output interface. The AD conversion accuracy is 16 bits, the accuracy is 50mv, and the stability is 1mv. A block diagram of the input interface design is shown in fig. 6. It should be noted that the input/output interface of the automatic test unit 30 may be used as the input of the ADC, so the analog switch paths input at either end of the ADC are selected to cover all the nodes. The DAC cell 37 generates a variable voltage output for use as an input to the analog quantity test. One solution is to connect the DAC output to a fixed area and node (DAC output area) and reserve test points through the expansion head. The DAC output value is continuously changed, and the change range is 0-5V.
In one embodiment of the present application, the display unit 33 may display the current interfacing state: input node point locations and output node point locations. DA setup status may be displayed: the current output voltage value. Current acquisition status, current communication status, etc. The power supply unit 391, the power interface provides power to the automatic test unit 30, requires special attention to the voltage input required by the various devices, the power supply range, and may require level shifting, etc. The ground unit 392 provides a reference ground, which is divided into a primary ground, a secondary ground, a cabinet ground, and the like. The ground may be conveniently routed for common ground or testing with other units.
In one embodiment of the present application, the test computer 10 communicates with the unit under test 20 via an on-board bus emulator in accordance with an on-board communication protocol, controls the unit under test 20 and receives unit data. The test computer 10 is connected with the automatic test unit 30 through a serial bus, and controls the automatic test unit 30 to complete test items.
The analog switch mainly completes the signal switching function in the signal link. The signal link is turned off or turned on by adopting a switching mode of an MOS tube; as its function is similar to a switch, it is implemented with the characteristics of an analog device, becoming an analog switch. Analog switches mainly function as on-signals or off-signals in electronic devices. The analog switch has the characteristics of low power consumption, high speed, no mechanical contact, small volume, long service life and the like, so the analog switch is widely applied to an automatic control system and a computer.
In summary, the foregoing embodiments describe various configurations of the general satellite electronic testing system in detail, and of course, the present application includes, but is not limited to, those configurations listed in the foregoing embodiments, and any modifications based on the configurations provided in the foregoing embodiments fall within the scope of the present application. One skilled in the art can recognize that the above embodiments are illustrative.
In the present specification, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different point from other embodiments, and identical and similar parts between the embodiments are all enough to refer to each other. For the system disclosed in the embodiment, the description is relatively simple because of corresponding to the method disclosed in the embodiment, and the relevant points refer to the description of the method section.
The above description is only illustrative of the preferred embodiments of the present application and is not intended to limit the scope of the present application, and any alterations and modifications made by those skilled in the art based on the above disclosure shall fall within the scope of the appended claims.

Claims (7)

1. The universal satellite electronics test system is characterized by simulating the working environment of a single unit to be tested and assisting the single unit to be tested to carry out hardware debugging, function verification, system testing, software development and debugging, on-board cable conduction and insulation test;
the universal satellite electronics testing system converts various interfaces into universal standard interfaces through a switching tool so as to connect a tested machine with different interface types and satellite cables with different forms;
standard test input and output are connected through a manual mode or an automatic node switching mode, wherein the universal satellite electronics test system comprises:
a functional test unit configured to provide a standard test input output;
an automatic test unit configured to automatically match the test node and the test input/output quantity node;
the test computer is configured to control the automatic test unit to automatically match the test node and the test input output quantity node according to the input node table so as to perform automatic test;
the node switching unit is configured to provide line switching, switch the interface node of the single machine to be tested to the standard output node on the node switching unit, and serve as the input of the automatic test unit to form a test node;
wherein the automatic test unit comprises:
the switch matrix unit is used for realizing the connection of channels between any two nodes between the input interface of the automatic test unit and the output interface of the automatic test unit;
the processor unit controls the switch matrix unit through GPIO signals or FPGA, controls the serial port to realize communication with the test computer, controls the analog-to-digital conversion unit to realize a data acquisition comparison function and a cable conduction test function, and controls the digital-to-analog conversion unit to provide an analog quantity test input source;
the analog-to-digital conversion unit is used for completing the analog quantity acquisition output by the single unit to be detected and comparing the data acquisition function of the single unit to be detected; the device is also used for testing cables, is connected with all nodes of an input interface of an automatic test unit and an output interface of the automatic test unit, and has conversion precision of 16 bits or 50mv and stability of 1mv;
the digital-to-analog conversion unit is used for generating variable voltage output and is used as input of analog quantity test; the output of the digital-to-analog conversion unit is connected to the DAC output area and the node, and a test point is reserved through an expansion head;
wherein the switch matrix unit comprises:
the switch matrix unit can select 4 channels simultaneously without mutual influence;
the switch matrix unit adopts a time-sharing traversal mode to test all nodes;
the switch matrix unit uses a plurality of analog switches to replace relay switches to realize channel selection;
the switch matrix unit adopts 4 analog switches of 96-1 selection to be connected in parallel with an input interface of the automatic test unit, and the 4 analog switches of 96-1 selection are bidirectional conduction devices and are connected in parallel with an output interface of the automatic test unit;
the 96-selection 1 analog switch is realized in a cascade connection mode of a plurality of low-channel-number analog switches;
the 96-select 1 analog switch is controlled by a GPIO signal or an FPGA of the processor unit.
2. The universal satellite electronics test system according to claim 1, wherein the functional test unit provides standard test input and output, and interfaces to external standard test equipment, establishes a standard test reference environment, and serves as output of the automatic test unit;
the function test unit provides universal analog input, resistance input, OC output interface and standard test equipment interface according to the single satellite electronics function performance.
3. The universal satellite electronics testing system of claim 2 wherein said functional test unit comprises:
the input interface of the function test unit is a connector of J36A-96, is connected with the output of the automatic test unit and is correspondingly connected with the expansion head matrix of the function test unit one by one through the bottom circuit board;
the function test unit expansion head matrix is used as a test input and is divided into a voltage test input area, a resistance test input area, an OC instruction output test area and a standard test equipment input area;
the 1-10 points are voltage test input areas, the expansion head matrixes of the function test units are connected in pairs, the voltage is provided by a battery pack, red is a positive voltage end, and black is a negative voltage end;
11-20 points are resistance test input areas provided by the resistor groups;
the 21-25 points are OC instruction output test areas, which consist of pull-up voltage and current limiting resistors, and consist of 4 output circuits and one instruction loop;
the standard test equipment input area includes:
the 26-35 points are 422 serial port test areas, and serial port pin definitions are marked below the interface;
a standard female serial port interface is arranged below the functional test unit panel;
voltmeter, battery jar, serial port and oscillometer interface are respectively arranged below the panel of the function test unit;
the lowest part of the functional test unit panel is reserved with a grounding interface which is divided into a primary ground, a secondary ground and a shell ground;
the jack is fixedly connected with the test input/output equipment;
the jack is marked with a fixedly connected resistor, voltage or test input/output equipment name.
4. The universal satellite electronics test system according to claim 1, wherein the node switch unit connects a stand-alone under test, an automatic test unit and a functional test unit;
the node switching unit provides direct connection of connectors and switching amplification of test nodes for the single machine to be tested;
the node switching unit is matched with the automatic test unit to be automatically connected with the functional test unit to realize the interface matching of different tested single machines;
the node switching unit is directly and manually connected with the functional test unit for use, so that the universality of the test equipment is realized.
5. The universal satellite electronics testing system according to claim 4, wherein the node switch unit comprises:
the node switching unit input interface is configured as a standard J36A-96 connector and covers the maximum interface node number of the single unit to be tested;
the node switching unit interface switching tool is used for switching the interface of the single unit to be tested or the cable on the satellite to be tested into a standard J36A-96 connector according to the switching cable manufactured by the interfaces of the single unit to be tested and the cable on the satellite to be tested, and is connected with an input interface to realize the connection between the interfaces of the single unit to be tested and the cable on the satellite to be tested and the node switching unit;
the node switching unit expansion head matrix consists of expansion head jacks, and the expansion head jacks are in one-to-one corresponding through connection with nodes of the input interface through a bottom circuit board according to serial numbers;
the node switching unit output interface is a J36A-96TK standard joint and is connected with the nodes of the input interface in a one-to-one correspondence manner and is used as the input of the automatic test unit.
6. The universal satellite electronics testing system of claim 1 wherein,
a test computer configured to determine whether the connection of the connector conforms to the input node table;
a test computer configured to time-share test through all the test nodes and test input/output nodes;
the test computer is also configured to perform visual control and monitoring of the test process and the test data, and perform automatic acquisition, inquiry and playback of the test data;
the test computer is also configured to interpret the test data and identify when the test data is abnormal;
the test computer is also configured to communicate with the single machine to be tested through the on-board bus simulator according to an on-board communication protocol, control the single machine to be tested and receive single machine data;
and the test computer is also configured to be connected with the automatic test unit through a serial bus and control the automatic test unit to complete test items.
7. The universal satellite electronics testing system of claim 1 wherein,
the automatic test unit is connected with the test computer, the node switching unit and the functional test unit, receives a control instruction of the test computer, controls the line connection between the node switching unit and the functional test unit, and automatically matches the automatic tests of the test interfaces of different tested single machines and the interfaces of different tested satellite cables;
the automatic test unit is communicated with the test computer through a serial port and is respectively connected with an output interface of the node switching unit and an input interface of the functional test unit through a through cable;
the automatic test unit receives the instruction of the test computer, controls the line connection between the node switching unit and the functional test unit, and realizes the node matching and automatic connection of different interfaces;
the automatic test unit has a data acquisition function and an analog-to-digital conversion function, is used for realizing a cable test function and comparing the voltage quantity acquisition of the single unit to be tested, and is provided with a digital-to-analog conversion function according to the requirement, and is used for providing a voltage quantity acquisition source of the single unit to be tested;
the input interface of the automatic test unit is connected with the node switching unit and is a standard interface of J36A-96; the output interface of the automatic test unit is connected with the functional test unit and is a standard interface of J36A-96;
the automatic test unit display area is used for displaying the current node connection condition, DAC output setting condition, acquisition and communication states;
the automatic test unit grounding area leads out the grounding of the automatic test unit and is used for being commonly grounded with other test units.
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