CN202042472U - 具有用于高电流、高频和热量耗散的穿透硅通孔的半导体器件 - Google Patents

具有用于高电流、高频和热量耗散的穿透硅通孔的半导体器件 Download PDF

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CN202042472U
CN202042472U CN2008901003310U CN200890100331U CN202042472U CN 202042472 U CN202042472 U CN 202042472U CN 2008901003310 U CN2008901003310 U CN 2008901003310U CN 200890100331 U CN200890100331 U CN 200890100331U CN 202042472 U CN202042472 U CN 202042472U
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pad
chip
hole
metal
array
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M·格伯
G·A·弗朗兹
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Texas Instruments Inc
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Texas Instruments Inc
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Abstract

一种具有半导体芯片(101)的集成电路器件(100)，所述芯片具有在芯片区域上二维排列的通孔(103)。金属填充通孔的核心适合于电源和接地以及热量耗散，或适合于高频信号；在顶部，核心连接到晶体管，并且在底部，连接到金属钉头。所述器件还具有由缝隙(223)隔开的实质上相同的金属焊盘(120)的二维平面阵列。该阵列具有两组焊盘：第一焊盘组(124)位于阵列中心并且在芯片下面；焊盘位置匹配通孔，并且每一焊盘与各自的通孔的钉头接触。第二焊盘组(125)位于阵列周边并且围绕芯片；这些焊盘具有到各自晶体管端部的键合引线(150)。封装化合物(110)覆盖芯片和引线连接，以及填充焊盘之间的缝隙。

Description

具有用于高电流、高频和热量耗散的穿透硅通孔的半导体器件
技术领域
本实用新型一般涉及半导体器件和工艺，更具体地说，涉及使用具有金属填充通孔的芯片的这类器件和工艺，所述通孔适合于高电流和高频，以及热能量的有效的耗散。 
背景技术
半导体技术的长期趋势是将其产品的功能复杂度翻倍，尤其是每18个月将集成电路(IC)的功能复杂度翻倍，这具有若干隐含的结果。第一，较高的产品复杂度应该主要地通过减小芯片元件的特征尺寸而同时保持封装尺寸不变来实现；优选的是，甚至封装应该减小。第二，功能复杂度的增加应该伴随着产品可靠性的相应的增加。第三，每一功能单元的成本应该随着每一代复杂度降低，使得具有翻倍功能的产品的成本仅稍微增加。 
对于由半导体芯片构造的这些趋势带来的挑战，已知的技术对IC和引线框架设计产生了许多限制和问题。围绕芯片周边放置高频以及电源和接地的输入/输出端部将对以下方面造成当前的困难：不用冗长的电源线互连有源电路元件；减小沿着电源分布线的电压降；在屏蔽线中分布高频线；以及将偶然的静电过荷释放到地电位。使用引线键合作为唯一的互连技术并且围绕芯片周边放置大量的键合焊盘将限制以下方面的可能性：减小电压降；减小电气电阻和电感；减小键合焊盘间距；以及节省宝贵的硅面积。预制造数量不断增长的引线的常规引线框架对于以下方面引起当前的困难：减小内部引线的宽度；减小内部引线的间距；以及在最小化的内部引线上放置针脚部(stitch bond)。 
对于半导体封装的挑战，已知的技术对以下选择产生了限制：减小封装轮廓，使得当其被安装在电路板上时，封装消耗较少的面积和较小的高度；以最小的成本(材料和制造成本两者)达到这些目标；提供大量的输入/输出端部；改进热量耗散，尤其是利用短的热通路以减小IC工作期间发热区(hot spot)的提高的温度；以及设计封装，使得芯片和/或封装的堆叠成为增加功能密度和减小器件厚度的选择。 
实用新型内容
申请人引入包括半导体器件制造以及操作的设计、工艺、冶金、可靠性和热性能的研究以识别对上面所列困难的解决方案。得到的新的方法实现了在较高的芯片输入/输出数量下的封装小型化、极大提高的电气和热的器件性能以及减小的制造成本。本实用新型的特征是具有穿过硅芯片的金属填充通孔，其将电源、接地和屏蔽信号从单个封装焊盘直接提供到有源IC位置；通孔使用金属钉头(stud)来连接到焊盘，得到与焊盘排列在其中的平面平行的芯片组件。还包括金属填充通孔，其将热能量从IC发热区耗散到由金属钉头互连的单个封装焊盘。此外，引线键合将常规信号连接到IC晶体管。封装是无引线的，并且除了聚合密封剂以外，可以包括绝缘的聚合前体。 
本实用新型的一个实施例是具有半导体芯片的集成电路器件，所述半导体芯片具有在芯片区域上二维排列的通孔。金属填充通孔的核心适合于电源和地以及热量耗散，或适合于高频信号；在顶部，所述核心连接到晶体管，并且在底部，连接到金属钉头。该器件还具有由缝隙隔开的实质上相同的金属焊盘的二维平面阵列。该阵列具有两组焊盘：第一焊盘组位于该阵列中心并且在该芯片下面；该焊盘位置匹配所述通孔并且每一焊盘与各自的通孔的钉头接触。第二焊盘组位于该阵列周边并且围绕所述芯片；这些焊盘具有到各自晶体管端部的键合引线。封装化合物覆盖所述芯片和所述引线连接，并且填充所述焊盘之间的缝隙。 
本实用新型的另一实施例是用于制造集成电路器件的方法，包括以下步骤：在半导体芯片中，在芯片区域上形成通孔的二维阵列，使得每一通孔从顶部芯片表面延伸到底部芯片表面，并且具有绝缘涂层和金属填充的核心，该核心适合于电源和地，以及热量耗散，或替换地，适合于高频信号传输。在芯片金属化层上，或在所述顶部芯片表面，生成从通孔到晶体管的连接，并且在所述底部芯片表面，为每一通孔形成金属钉头；该钉头具有实质上相等的高度。 
为了制造金属焊盘的二维平面阵列，提供具有厚度的金属板，并且在一个板表面形成一组网格状的凹槽。该凹槽在到达相对的板表面之前的深度处终止，得到附着在实心金属板上的金属焊盘的二维阵列。该阵列包括在阵列中心并且在匹配所述通孔的位置处的第一组焊盘和在阵列周边处的第二组焊盘。通孔钉头附着到所述中心焊盘组；芯片晶体管被用引线连接到所述周边焊盘组。使用封装化合物覆盖所述芯片和所述引线连接，并且填充所述焊盘之间的凹槽。最后，去除金属板的底部表面，从而暴露化合物填充的凹槽并且形成金属焊盘的 底部表面。 
附图说明
下面参照附图描述了本实用新型的示例实施例，其中： 
图1A以透视图示意性地示出了本实用新型的实施例；将已封装的半导体器件部分地打开，以显示具有金属填充通孔和再分布迹线(trace)的芯片，所述芯片由金属钉头和引线组装在金属焊盘的二维阵列上，所述金属焊盘的二维阵列由缝隙隔开，所述焊盘由绝缘载体支撑。 
图1B以透视图示意性地示出了本实用新型的实施例；将已封装的半导体器件部分地打开，以显示具有金属填充通孔和再分布迹线的芯片，所述芯片由金属钉头和引线组装在金属焊盘的二维阵列上，所述金属焊盘的二维阵列由缝隙隔开。 
图2示出了本实用新型的另一实施例的示意性剖面图，其中通过与图1中不同的另一技术来制造金属焊盘阵列。 
图3是半导体芯片的一部分的示意性透视图，其示出了通孔阵列和再分布迹线的细节。 
图4是穿过半导体芯片的金属填充通孔和所附的金属钉头的示意性剖面图。 
图5A是另一实施例的示意性剖面图，其示出了具有金属填充通孔的芯片的堆叠，所述芯片由金属钉头和引线组装在金属焊盘上。 
图5B是类似于图5A的、具有从通孔到金属钉头的再分布迹线的实施例。 
图6A是另一实施例的示意性剖面图，其示出了具有金属填充通孔的芯片，所述芯片由金属钉头组装在金属焊盘上。 
图6B是类似于图6A的、具有从通孔到金属钉头的再分布迹线的实施例。 
具体实施方式
在图1A和1B中以剖开的透视图并且在图2中以剖面图所示的本实用新型的实施例是已封装的集成电路器件，在图1A和1B中通常命名为100。该器件包括封装在保护化合物110中的半导体芯片101和接触焊盘120的二维区域阵列，其中一个焊盘表面120b没有化合物。半导体芯片101具有区域(area)、包括晶体管或其他电路元件102的顶部表面101a和没有晶体管的底部表面101b。 
在整个芯片区域中是二维排列的通孔103。在图3中也描绘了该二维布置。通孔阵列可以是随机的，但是优选的，通孔布置是实质上均匀的，使得通孔具 有中心间距，其在x方向上命名为131，在y方向上命名为132。在许多实施例中，该间距是恒定的，并且在某些实施例中，间距131与间距132相同，而在其他实施例(如图3中所示)中，间距是互相不同的。请注意，通孔间距131优选的是与接触焊盘120的间距121相同，并且通孔间距132与焊盘间距122相同，但是在某些实施例中，它们不是相同的。 
在芯片区域上的二维阵列的每一通孔103从顶部芯片表面101a延伸到底部芯片表面101b。因此，通孔常常被称为穿透半导体通孔(TSV)。如图4中的放大的剖面图所示，每一通孔103具有由绝缘层(涂层)401覆盖的壁。用金属402填充通孔的核心，优选的是铜，或其他合适的导电材料。通孔的直径410被选择为使得核心具有承载电源和接地的低的电气电阻和电感，并且也具有耗散来自电路发热区的热量的低的热电阻。通孔直径410具有优选的是圆形剖面的开口或由半导体的晶向给定的几何剖面的开口。对于柱形通孔，直径410在通孔长度上是恒定的。优选的直径是在大约3微米和50微米之间。由于通孔核心中的金属的量确定了相对于半导体材料的热膨胀系数(CTE)的差的大小，因此具有小的直径的通孔是优选的。对于硅，在直径小于大约30微米的通孔中，其CTE比起金属CTE占主导地位。 
沿着其延伸并且尤其是在顶部芯片表面101a(实际上是保护覆盖层101c的表面)上的任何地方，通孔103具有到一个或多个特定晶体管或其他电路元件102的一个或多个连接或布线迹线141(优选的是铜)。迹线141可以是直接连接，如图3中所示，或它们可以是通过使用其他芯片金属化层的线路的连接。在底部芯片表面101b上，通孔103可以具有与金属钉头420一起的金属端部442(优选的是具有可键合表面的铜)。通过引线球键合技术(参见下面)将钉头优选的制造为精压金球(替换地制造为精压铜球)。替换地，可以使用微凸点技术或电镀工艺，尤其是对于批处理。该方法产生实质上相等高度420a的钉头420，使得使用钉头420将芯片101附着到焊盘120时可以在芯片和焊盘120的平面阵列之间提供一致的间隔。 
对于某些实施例，在芯片的底部表面101b上使用额外的再分布线(优选的是由铜制成)是有利的，如图2中线143示意性指示的。这些再分布线可以用在某些实施例中，例如堆叠芯片并且仅倒装焊的器件，以将通孔限制在芯片周边区域。 
替换地，可以将至少某些通孔103形成为适合传输高频信号的电屏蔽通孔。此外，某些通孔103可以被设计为具有到电路输入/输出的短迹线141，以有效地 将过应力情况中的任何静电过荷释放到地电位。 
可以将额外的金属填充通孔放在电路区的近距离处，在所述电路区，根据模型或经验，高频和密集的电路集成将在电路工作期间引起极大的温度增加。这些额外的通孔为从电路到外部散热器的热量耗散提供了直接的捷径通路，从而保持器件可靠地工作在安全的温度区域。 
参照图1A、1B和2，器件100包括由缝隙隔开的金属焊盘120的二维平面阵列。在图1A中，由载体160支撑焊盘，该载体可以由绝缘材料或层压载体制成。载体160以虚线示出，因为在器件组装处理期间使用它(参见下面)并且随后去除它。在图1B中，不用支撑而制备焊盘(参见下面)。图1A和1B中的缝隙(命名为123)具有直的焊盘侧壁；图2中的缝隙(命名为223)具有成形为邻接在斜截部分的斜截凹槽的焊盘侧壁。缝隙形状的差别是制造焊盘所使用的方法的结果；参见下面。焊盘优选的是实质上相同的，并且具有中心间距，其在x方向上命名为121，在y方向上命名为122。在许多实施例(如图1A和1B中所示的)中，间距121与间距122相同，而在其他实施例中，间距互相不同。优选的，焊盘x-和y-间距与对应的通孔x-和y-间距相同，但是在某些实施例中，它们是不同的(例如，将图1A和1B与图3进行比较)。 
焊盘120具有面朝向芯片101的第一表面120a和面背离芯片101的第二表面120b。如图1A、1B和2所示，焊盘120的平面阵列由两组构成：第一焊盘组(命名为124)位于阵列中心并且在芯片下面。组124的焊盘位置与对应的通孔103匹配，并且优选的是这个组的每一焊盘与各自的通孔的金属钉头420接触。以这种方式，从第二焊盘表面120b经过钉头420、通孔103和连接141到晶体管的电气通路对于电源和地电位具有最小的电气电阻和电感，并且对于热量耗散具有最小的热电阻。此外，通路为其本身提供静电过荷到地电位的有效释放。在另一方面，当通孔103被电屏蔽时，从第二焊盘表面120b经过钉头420、通孔103和连接141的通路为其本身提供高频信号的传输。 
第二焊盘组(命名为125)位于阵列周边并且围绕芯片。优选的是这个组的每一焊盘具有到在芯片表面101a上的集成电路的各自的晶体管端部的至少一个键合引线150。 
焊盘120优选的是由铜制成。第一表面120a优选的是适合于附着金属钉头(例如金或铜)和引线针脚部(例如金或铜)。第二表面120b适合于焊接球126的附着(例如通过具有薄的金层表面)。在图1A中，第二表面120b由载体160暂时支撑。 
如图1A、1B和2所示，封装化合物110覆盖芯片101、引线连接150和第一焊盘表面120a。优选的，化合物110是基于环氧的模塑材料。第二焊盘表面120b保持没有化合物110。当焊盘120被配置为图1A和1B中所示的时，焊盘之间的缝隙123优选的是用化合物110填充。在此情况下，缝隙123中的化合物表面与焊盘的第二表面120b共面。另一方面，当焊盘120被配置为图2中所示的时，缝隙123优选的是用化合物110仅部分地填充(参见下面制造工艺)。 
底部芯片表面101b和第一组焊盘124的第一焊盘表面120a之间的间隔210可以用封装化合物填充，如图2的实施例所示。替换地，可以使用聚合前体来填充底部芯片表面101b和第一组焊盘124的第一焊盘表面120a之间的间隔。 
图5A、5B、6A和6B示出了其他实施例，其突出了通过结合二维平面阵列的金属焊盘使用TSV而得到的优势。图5A示出了器件500，其具有互相堆叠的、不同尺寸(面积)的两个芯片501和510。芯片501具有通孔503，芯片510具有通孔513。通孔503位于以下位置，该位置使得它们能够与通孔513中的一些对齐；对齐的通孔通过金属钉头(在图5A中未示出)互连。通孔513继而通过芯片510的底部表面上的金属钉头521连接到位于芯片510下面并且面对芯片510的金属焊盘520。此外，键合引线550将金属焊盘522连接到位于芯片510的顶部表面上的晶体管。由封装化合物570保护堆叠的芯片、键合引线以及焊盘520和522的顶部表面。由于自动键合器可以保持引线550的环高度为低，因此封装化合物可以是薄的并且器件500的整个厚度560可以小到大约0.3到0.4毫米。 
图5B示出了具有类似于器件500的堆叠芯片的器件580。芯片502的通孔504与芯片511的通孔514对齐。然而，为了连接到金属钉头531，通孔514需要再分布金属线590。钉头531与焊盘的平面阵列的金属焊盘523接触。器件580具有范围从大约0.3到0.4毫米的厚度。 
在专门通过金属钉头连接器组装而不求助于引线键合的实施例中可以实现更小的厚度。图6A描绘了具有芯片601的芯片大小的器件600，该芯片601具有在芯片表面601a上的晶体管和金属钉头621之间的多个金属填充通孔603；通孔603与钉头621对齐。这些钉头(优选的是由金或铜制成)被熔合在金属焊盘622的二维平面阵列上。通孔603被设计为在电气上用作电源和地的供应，并且用作信号的输入/输出，以及在热方面用作热量耗散通道。封装化合物670保护芯片表面601a上的电路。整个器件厚度660可以保持在从大约0.2到0.3毫米的范围。图6B中类似的器件在通孔603和钉头621之间具有再分布线690，因为通孔没有与钉头对齐。图6B中的器件的整个厚度在0.2和0.3毫米之间。 
本实用新型的另一实施例是用于制造具有穿透硅通孔(TSV)的集成电路器件的方法，该TSV用于高电流、高频和最大化的热量耗散。提供了半导体晶圆，其包括多个芯片，所述多个芯片具有区域、带有晶体管和其他电路元件的顶部表面和没有晶体管的底部表面。在减薄之后，遍及每一芯片区域形成通孔的二维阵列；该阵列可以是随机的，但是优选的是均匀的；可以通过化学刻蚀、激光或等离子体来产生通孔。在优选的实施例中，通孔阵列具有恒定的中心距。该阵列的每一通孔从顶部芯片表面延伸到底部芯片表面，并且具有绝缘涂层和金属填充的核心，优选的是由铜(替换的是银、合金或另一合适的导电材料)制成。通孔的直径被选择为使得通孔金属的电导率和热导率适合于高电源和地电位，并且也适合于有效的热量耗散。 
贯穿通孔的长度并且尤其是在每一芯片的顶部表面上，金属迹线被图形化为从通孔到晶体管和其他电路元件的连接。在每一芯片的底部表面，为每一通孔形成金属钉头。优选的是，钉头是由金或铜制成的，并且优选的附着方法是结合精压步骤的修改的引线球键合技术，所述精压步骤对于所有钉头实现实质上相等的高度。替换地，可以使用电镀技术。在某些实施例中，将钉头放在通孔附近而不是直接放在通孔出口上可以是有利的。在此情况下，将再分布迹线图形化以将钉头连接到通孔。 
当使用以金属层碾压的载体时，优选的是通过在载体表面上的金属层上使用掩膜来进行刻蚀步骤，以此来制造金属焊盘的二维平面阵列(在器件制造流程的最后，去除并且丢弃载体)。当不用层压的载体制备金属焊盘的二维平面阵列时，制造工艺提供平的金属板(sheet)，其优选的是由铜制成并且具有1毫米或更小的厚度；板具有第一表面和第二表面。 
接下来，在板的第一表面中形成一组网格状的凹槽。该凹槽在到达第二表面之前的深度处终止，使得形成金属凸出物或焊盘的二维阵列，其附着在实心类金属板连接上。虽然旋转锯片可以用来生成凹槽，但是优选的技术使用掩膜和化学或等离子体刻蚀。在优选的实施例中，焊盘具有与上述芯片通孔间距相同的中心距。此外，在最优选的实施例中，槽的网格是正交的。 
焊盘阵列被分组成子阵列。每一子阵列包括位于子阵列中心并且匹配芯片通孔的第一组焊盘和位于子阵列周边的第二组焊盘。 
晶圆和在类板连接上的焊盘阵列被对齐，使得每一芯片面对各自的子阵列。接着使通孔钉头与各自的中心焊盘组接触，并且将钉头附着到第一焊盘表面。附着的优选方法是热超声键合；替换地，可以使用加热并且加压循环。 
在下一工艺步骤中，每一芯片的晶体管通过引线球键合连接到各自的周边焊盘组的第一表面。接着，用封装化合物保护晶圆、引线连接和第一焊盘表面。优选的方法使用递模成型技术。在这个封装步骤中，用化合物填充凹槽，并且优选的，也用化合物填充底部芯片表面和第一组焊盘的第一焊盘表面之间的间隔。实心类板连接(焊盘被附在其上)保持没有化合物。 
在封装化合物没有填充底部芯片表面和第一焊盘表面之间的间隔的实施例中，额外的底部填充步骤是明智的。在这个步骤中，使用聚合前体来通过毛细管作用填充底部芯片表面和第一组焊盘的第一焊盘表面之间的间距，并且围绕金属钉头。 
在下一个工艺步骤中，去除焊盘附着到的金属板的底部表面和连接，从而生成金属焊盘的新的第二表面。用于去除的优选的方法是刻蚀(化学或等离子体)；替换地，可以是使用机械切除或打磨方法。可选的，可以用可焊接层(镍、金)覆盖新的第二表面(优选的是铜)。 
在如上面所描述的一系列工艺步骤之后，第二焊盘表面与焊盘之间的凹槽中的化合物表面共面(参见图1B)。在替换的工艺流程中，由锯割步骤代替去除金属板的底部表面的步骤。垂直地应用到金属板的底部表面的旋转锯在板中切出额外的凹槽，使得额外的凹槽与早期在焊盘网格的制造中生成的凹槽对齐。当金属连接完全被切断并且锯碰到化合物时，锯的渗透停止。在锯割处理之后，化合物被暴露并且相对于第二焊盘表面是凹进的(参见图2)。 
为了增强到外部部分的接触和连接，可以将焊接球附着到第二焊盘表面(参见图2)。 
最后，优选的是通过锯割技术将封装过并且已附着的晶圆分割成分离的器件。 
本实用新型涉及的本领域技术人员应理解，在所主张的实用新型的范围内，所描述的实施例的许多变化以及其他实施例是可能的。 

Claims (6)

1.一种集成电路器件，包括：
半导体芯片，其具有区域、包括晶体管的顶部表面和没有晶体管的底部表面；
遍及所述芯片区域实质上一致并且二维排列的通孔：
每一通孔从所述顶部芯片表面延伸到所述底部芯片表面，所述通孔具有绝缘涂层、适合于电源和接地以及热量耗散的金属填充的核心，在所述顶部表面具有到所述晶体管的连接，并且在底部表面具有金属钉头；
由缝隙隔开的金属焊盘的二维平面阵列，所述焊盘具有面朝向所述芯片的第一表面和面背离所述芯片的第二表面，所述阵列具有两组焊盘：
位于所述阵列的中心并且在所述芯片下面的第一焊盘组，所述焊盘的位置匹配所述通孔，并且每一焊盘与各自的通孔的钉头接触；
位于所述阵列的周边并且在所述芯片周围的第二焊盘组，每一焊盘具有到各自晶体管端部的键合引线；以及
覆盖所述芯片、所述引线连接和所述第一焊盘表面的封装化合物，这里所述第二焊盘表面保持没有化合物。
2.根据权利要求1所述的器件，还具有填充所述焊盘之间的缝隙的封装化合物。
3.根据权利要求1所述的器件，其中所述通孔以恒定的中心间距排列，并且所述金属焊盘以相同的间距排列。
4.根据权利要求1所述的器件，还具有适合于高频信号传输的屏蔽的通孔。
5.根据权利要求1所述的器件，其中在所述底部表面上的通孔钉头具有实质上相等的高度，并且所述芯片和所述焊盘的平面阵列之间的间隔是一致的。
6.根据权利要求1所述的器件，还包括具有所述第二表面的焊盘，所述第二表面没有封装化合物，适合于焊接附着。
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