CN202026299U - Frequency synthesizing device - Google Patents
Frequency synthesizing device Download PDFInfo
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- CN202026299U CN202026299U CN2011201499875U CN201120149987U CN202026299U CN 202026299 U CN202026299 U CN 202026299U CN 2011201499875 U CN2011201499875 U CN 2011201499875U CN 201120149987 U CN201120149987 U CN 201120149987U CN 202026299 U CN202026299 U CN 202026299U
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Abstract
The utility model discloses a frequency synthesizing device which comprises a voltage controlled crystal oscillator, a digital frequency synthesizing module, a phase locked loop, a control module and a multi-way selector, wherein the input end of the digital frequency synthesizing module is connected with the voltage controlled crystal oscillator, the output end of the digital frequency synthesizing module is connected with the input end of the phase locked loop, the control module is connected with the control end of the digital frequency synthesizing module, the input end of the multi-way selector is respectively connected with the output end of the digital frequency synthesizing module and the output end of the phase locked loop, and the control end of the multi-way selector is connected with the control module. The frequency synthesizing device disclosed by the embodiment of the utility model realizes that the high frequency and the low frequency of an output signal are accurate and adjustable.
Description
Technical field
The present invention relates to the frequency synthesis technique field, particularly a kind of apparatus for frequency synthesizing.
Background technology
Modern many electronic systems must depend on the performance of used clock frequency source.Usually, high performance clock frequency source all is to realize by frequency synthesizer.
A kind of frequency synthesizer is arranged in the prior art, as shown in Figure 1, it comprises VCXO (Voltage Controled X ' tal Oscillator, voltage-controlled quartz oscillator), DDS (Direct Digital Synthesizer, Direct Digital Frequency Synthesizers), PLL (Phase Locked Loop, phase-locked loop) and control module; VCXO, DDS link to each other successively with PLL; Control module links to each other with DDS.This frequency synthesizer adopts DDS to drive PLL, can effectively overcome the low and low shortcoming of PLL frequency resolution of DDS output frequency in the broadband system.
In realizing process of the present utility model, the inventor finds that there is following problem at least in prior art: the frequency synthesizer of prior art can not be realized low frequency (as 0.1Hz) and high frequency (as 500MHz) compatibility, i.e. the accurately adjustable very difficulty of the signal high and low frequency of frequency synthesizer generation.
Summary of the invention
In order to overcome the defective that prior art medium frequency synthesizer high and low frequency can not be compatible, the utility model embodiment provides a kind of apparatus for frequency synthesizing.Described technical scheme is as follows:
A kind of apparatus for frequency synthesizing, comprise: VCXO, the numerical frequency synthesis module, phase-locked loop and control module, the input of described numerical frequency synthesis module links to each other with described VCXO, the output of described numerical frequency synthesis module links to each other with the input of described phase-locked loop, described control module links to each other with the control end of described numerical frequency synthesis module, described device also comprises MUX, the input of described MUX links to each other with the output of described numerical frequency synthesis module and the output of described phase-locked loop respectively, and the control end of described MUX links to each other with described control module.
Further, described apparatus for frequency synthesizing also comprises the quantum frequency discriminator block, and described quantum frequency discriminator block comprises electronic circuit, quantized system and servo loop; The input of described electronic circuit links to each other with the output of described VCXO, first output of described electronic circuit links to each other with the input of described quantized system, second output of described electronic circuit links to each other with the first input end of described servo loop, the output of described quantized system links to each other with second input of described servo loop, and the output of described servo loop links to each other with the control end of described VCXO.
Further, described phase-locked loop comprises phase discriminator, loop filter, voltage controlled oscillator and frequency divider; The first input end of described phase discriminator links to each other with the output of described numerical frequency synthesis module, second input of described phase discriminator links to each other with the output of described frequency divider, the output of described phase discriminator links to each other with the input of described loop filter, the output of described loop filter links to each other with the input of described voltage controlled oscillator, first output of described voltage controlled oscillator links to each other with the input of described frequency divider, and second output of described voltage controlled oscillator links to each other with the input of described multiplexer circuit.
Further, described numerical frequency synthesis module comprises Direct Digital Frequency Synthesizers and digital filter circuit; The input of described digital filter circuit links to each other with described Direct Digital Frequency Synthesizers, and the control end of described digital filter circuit links to each other with described control module.
Further, described control module is FPGA (Field-Programmable Gate Array, a field programmable gate array).
Further, described apparatus for frequency synthesizing comprises also module is set that the described module that is provided with links to each other with the input of described control module.
The beneficial effect of the technical scheme that the utility model embodiment provides is: the utility model is divided into two-way by the output with the numerical frequency synthesis module, one tunnel back that links to each other with PPL links to each other with MUX, another road directly links to each other with MUX, when needs output high-frequency signal, by the MUX gating the former, and when needs output low frequency signal,, thereby realized that high and low frequency is accurately adjustable then by the MUX gating latter.
Description of drawings
Fig. 1 is the structural representation of the apparatus for frequency synthesizing that provides of prior art;
Fig. 2 is the structural representation of the apparatus for frequency synthesizing that provides of the utility model embodiment.
Embodiment
For making the purpose of this utility model, technical scheme and advantage clearer, the utility model execution mode is described in further detail below in conjunction with accompanying drawing.
As shown in Figure 2, the apparatus for frequency synthesizing that provides of present embodiment comprises: VCXO 101, numerical frequency synthesis module 102, phase-locked loop 103, control module 104 and MUX 106.Wherein, the input of numerical frequency synthesis module 102 links to each other with VCXO 101, the output of numerical frequency synthesis module 102 links to each other with the input of phase-locked loop 103, control module 104 links to each other with the control end of numerical frequency synthesis module 102, the input of MUX 106 links to each other with the output of numerical frequency synthesis module 102 and the output of phase-locked loop 103 respectively, and the control end of MUX 106 links to each other with control module 104.
The clock signal of the high stable that VCXO 101 produces outputs to numerical frequency synthesis module 102, and numerical frequency synthesis module 102 generates the signal of different frequency according to the control word of control module 104; The signal that generates divides two-way, and one the road passes to phase-locked loop 103, by phase-locked loop 103 this signal is moved to high-frequency range after, be input to MUX 106; Another road signal of numerical frequency synthesis module 102 directly outputs to MUX 106; MUX 106 is exported according to Instruction Selection road signal wherein of control module 104, thereby can realize the accurately adjustable of high and low frequency.
As preferred embodiment of the present utility model, aforementioned apparatus for frequency synthesizing also comprises quantum frequency discriminator block 105.As shown in Figure 2, quantum frequency discriminator block 105 comprises electronic circuit 1051, quantized system 1052 and servo loop 1053.Wherein, the input of electronic circuit 1051 links to each other with the output of VCXO 101, first output of electronic circuit 1051 links to each other with the input of quantized system 1052, second output of electronic circuit 1051 links to each other with the first input end of servo loop 1053, the output of quantized system 1052 links to each other with second input of servo loop 1053, and the output of servo loop 1053 links to each other with the control end of VCXO 101.Electronic circuit 1051 in the quantum frequency discriminator block 105, quantized system 1052, servo loop 1053 and VCXO 101 have constituted the loop control system of a sealing, make VCXO 101 output stable clock signals.The clock signal that is specially VCXO 101 is to electronic circuit 1051 process frequencys multiplication, comprehensive, after the mixing of microwave frequency multiplication, obtain a microwave interrogation signals again, 1052 pairs of interrogation signals of quantized system carry out obtaining the frequency discrimination signal behind the frequency discrimination, the frequency discrimination signal carries out voltage-controlled through the voltage that obtains rectifying a deviation after the processing of servo loop 1053 to VCXO 101, thereby VCXO 101 frequency locks are absorbed on the peak dot of line to atomic resonance, make VCXO 101 output stable clock signals.The detailed structure of aforementioned electronic circuit 1051, quantized system 1052 and servo loop 1053 is known for those skilled in the art, omits at this and describes in detail.
Wherein, the frequency synthesizer that present embodiment provides also comprises module 107 is set, module 107 is set to link to each other with the input of control module 104, be used to be provided with frequency output, because the apparatus for frequency synthesizing that present embodiment provides is that high and low frequency is accurately adjustable, then the user can select different frequency output by module 107 is set.
Further, the control module 104 in the present embodiment is FPGA, and control figure frequency synthesis module 102 produces the signal and the control MUX 106 of different frequency and selects output signal.
Further, the numerical frequency synthesis module 102 in the present embodiment comprises DDS1021 and digital filter circuit 1022.As shown in Figure 2, the input of DDS1021 links to each other with the output of VCXO 101, the control end of DDS1021 links to each other with FPGA, and the output of DDS1021 links to each other with the input of digital filter circuit 1022, and DDS1021 is used for producing according to the control word of FPGA the signal of different frequency.The control end of digital filter circuit 1022 links to each other with control module 104, and first output of digital filter circuit 1022 links to each other with the input of phase-locked loop 103, and second output of digital filter circuit 1022 links to each other with the input of MUX 106.Digital filter circuit 1022 is used for the discrete spurious signal that filtering DDS1021 produces.
Further, the phase-locked loop in the present embodiment 103 comprises phase discriminator 1031, loop filter 1032, voltage controlled oscillator 1033 and frequency divider 1034.As shown in Figure 2, the first input end of phase discriminator 1031 links to each other with the output of numerical frequency synthesis module 102, the secondary signal input of phase discriminator 1031 links to each other with the output of frequency divider 1034, the output of phase discriminator 1031 links to each other with the input of loop filter 1032, the output of loop filter 1032 links to each other with the input of voltage controlled oscillator 1033, first output of voltage controlled oscillator 1033 links to each other with the input of frequency divider 1034, and second output of voltage controlled oscillator 1033 links to each other with the input of multiplexer circuit 106.Wherein phase discriminator is called phase comparator again, its effect is the phase difference that detects input signal and output signal, and convert detected phase signal to voltage signal output, this signal forms the control voltage of voltage controlled oscillator 1033 behind loop filter 1032, voltage controlled oscillator 1033 output signal frequency are implemented control.
All or part of content in the technical scheme that above embodiment provides can realize that its software program is stored in the storage medium that can read by software programming, storage medium for example: the hard disk in the computer, CD or floppy disk.
The above only is preferred embodiment of the present utility model, and is in order to restriction the utility model, not all within spirit of the present utility model and principle, any modification of being done, is equal to replacement, improvement etc., all should be included within the protection range of the present utility model.
Claims (6)
1. apparatus for frequency synthesizing, comprise: VCXO, numerical frequency synthesis module, phase-locked loop and control module, the input of described numerical frequency synthesis module links to each other with described VCXO, the output of described numerical frequency synthesis module links to each other with the input of described phase-locked loop, described control module links to each other with the control end of described numerical frequency synthesis module, it is characterized in that
Described device also comprises MUX, and the input of described MUX links to each other with the output of described numerical frequency synthesis module and the output of described phase-locked loop respectively, and the control end of described MUX links to each other with described control module.
2. apparatus for frequency synthesizing as claimed in claim 1 is characterized in that, also comprises the quantum frequency discriminator block, and described quantum frequency discriminator block comprises electronic circuit, quantized system and servo loop; The input of described electronic circuit links to each other with the output of described VCXO, first output of described electronic circuit links to each other with the input of described quantized system, second output of described electronic circuit links to each other with the first input end of described servo loop, the output of described quantized system links to each other with second input of described servo loop, and the output of described servo loop links to each other with the control end of described VCXO.
3. apparatus for frequency synthesizing as claimed in claim 1 is characterized in that described phase-locked loop comprises phase discriminator, loop filter, voltage controlled oscillator and frequency divider; The first input end of described phase discriminator links to each other with the output of described numerical frequency synthesis module, second input of described phase discriminator links to each other with the output of described frequency divider, the output of described phase discriminator links to each other with the input of described loop filter, the output of described loop filter links to each other with the input of described voltage controlled oscillator, first output of described voltage controlled oscillator links to each other with the input of described frequency divider, and second output of described voltage controlled oscillator links to each other with the input of described multiplexer circuit.
4. apparatus for frequency synthesizing as claimed in claim 1 is characterized in that, described numerical frequency synthesis module comprises Direct Digital Frequency Synthesizers and digital filter circuit;
The input of described digital filter circuit links to each other with described Direct Digital Frequency Synthesizers, and the control end of described digital filter circuit links to each other with described control module.
5. as each described apparatus for frequency synthesizing of claim 1-4, it is characterized in that described control module is a field programmable gate array.
6. as each described apparatus for frequency synthesizing of claim 1-4, it is characterized in that, also comprise module is set that the described module that is provided with links to each other with the input of described control module.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2011201499875U CN202026299U (en) | 2011-05-12 | 2011-05-12 | Frequency synthesizing device |
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| CN2011201499875U CN202026299U (en) | 2011-05-12 | 2011-05-12 | Frequency synthesizing device |
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| CN202026299U true CN202026299U (en) | 2011-11-02 |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102957425A (en) * | 2012-10-08 | 2013-03-06 | 中国计量科学研究院 | Atomic transition motivation device and method |
| CN103780253A (en) * | 2014-01-10 | 2014-05-07 | 苏州广纳达电子系统有限公司 | Reference signal generator using FPGA to control automatic frequency correction |
| CN107248696A (en) * | 2017-06-15 | 2017-10-13 | 江汉大学 | A kind of self-compensation type semiconductor laser |
-
2011
- 2011-05-12 CN CN2011201499875U patent/CN202026299U/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102957425A (en) * | 2012-10-08 | 2013-03-06 | 中国计量科学研究院 | Atomic transition motivation device and method |
| CN102957425B (en) * | 2012-10-08 | 2015-03-11 | 中国计量科学研究院 | Atomic transition motivation device and method |
| CN103780253A (en) * | 2014-01-10 | 2014-05-07 | 苏州广纳达电子系统有限公司 | Reference signal generator using FPGA to control automatic frequency correction |
| CN107248696A (en) * | 2017-06-15 | 2017-10-13 | 江汉大学 | A kind of self-compensation type semiconductor laser |
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Granted publication date: 20111102 Termination date: 20130512 |