CN201985876U - Two-dimensional chaos circuit and two-dimensional chaos secret communication system thereof - Google Patents

Two-dimensional chaos circuit and two-dimensional chaos secret communication system thereof Download PDF

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CN201985876U
CN201985876U CN2011201174500U CN201120117450U CN201985876U CN 201985876 U CN201985876 U CN 201985876U CN 2011201174500 U CN2011201174500 U CN 2011201174500U CN 201120117450 U CN201120117450 U CN 201120117450U CN 201985876 U CN201985876 U CN 201985876U
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resistance
operational amplifier
integrated operational
output
negative pole
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吕恩胜
姚勇
赵玉奇
滕文锐
黄双成
易鸿雁
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HENAN VOCATIONAL COLLEGE OF CHEMICAL TECHNOLOGY
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HENAN VOCATIONAL COLLEGE OF CHEMICAL TECHNOLOGY
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Abstract

The utility model relates to a two-dimension chaos circuit and a two-dimensional chaos secret communication system thereof. The chaos circuit comprises integrated operational amplifiers A1 and A2, resistors R-R7, and capacitors C1-C4. The chaos secret communication system circuit comprises a transmitting end circuit N1, a communication channel and a receiving end circuit N2. The chaos circuit provided by the utility model is simple, and only provided with the two integrated operational amplifiers, two energy storage elements and part of resistors, and is stable in work; and the secret communication system designed by the utility model is applied to voice analogue signal confidentiality.

Description

2 D chaotic circuit and 2 D chaotic secret signalling thereof
Technical field:
The utility model belongs to nonlinear circuit and system, is specifically related to a kind of 2 D chaotic circuit and 2 D chaotic secret signalling thereof.
Background technology:
The different phase of recognizing in-depth research from understanding has been experienced in the development of chaos, but the achievement how application of chaos is studied has become the challenge that 21 century nonlinear science development is faced for human service.The important application of chaos circuit is a chaotic secret communication, because the components and parts of general chaos circuit utilization are more, and debug difficulties, unstable properties etc. are difficult to be applied to secure communication.
Summary of the invention:
The purpose of this utility model is to overcome problems of the prior art and a kind of 2 D chaotic circuit and 2 D chaotic secret signalling thereof of simple in structure, stable performance is provided.
The utility model is realized above-mentioned purpose, and the technical scheme of employing is:
A kind of 2 D chaotic circuit, it is characterized in that: by resistance R 1, R2, R3, R4, R and capacitor C 1, C2 and integrated operational amplifier A1 form the sinusoidal oscillation circuit of chaos circuit, in sinusoidal oscillation circuit, end ground connection and series resistance R1 after capacitor C 1 and resistance R 4 are in parallel, the other end and resistance R are in series, resistance R is connected with the positive pole of integrated operational amplifier A1, resistance R 1 is connected with the negative pole of integrated operational amplifier A1, resistance R is also by series capacitance C2, resistance R 3 is connected with the output H (s) of integrated operational amplifier A1, be connected with an end of resistance R 2 between the negative pole of resistance R 1 and integrated operational amplifier A1, the other end of resistance R 2 also is connected with the output H (s) of integrated operational amplifier A1; By resistance R 5, R6 and integrated operational amplifier A2 form the hysteresis circuit of chaos circuit, export positive and negative saturation voltage H (v), the negative pole of integrated operational amplifier A2 is connected between series capacitance C2 and the resistance R 3, the positive pole of integrated operational amplifier A2 is connected between the output H (s) and resistance R 2 of integrated operational amplifier A1 by resistance R 5, between the positive pole of integrated operational amplifier A2 and resistance R 5, be connected with an end of resistance R 6, the other end of resistance R 6 is connected with the output of integrated operational amplifier A2, between the negative pole of resistance R 1 and integrated operational amplifier A1, be connected with an end of resistance R 7, the other end of resistance R 7 is connected between the output of resistance R 6 and integrated operational amplifier A2, sinusoidal oscillation circuit is connected with the hysteresis circuit in the chaos circuit, resistance R 7 (v) feeds back to hysteresis loop comparator output saturation voltage H sinusoidal oscillation circuit output H (s), slowly regulates since 0
Figure 2011201174500100002DEST_PATH_IMAGE002
, circuit produces chaos.
A kind of described chaos circuit and the 2 D chaotic secret signalling made, it is characterized in that: chaotic secret communication system is made of the chaotic secret communication circuit, comprises the transmitting terminal circuit
Figure 2011201174500100002DEST_PATH_IMAGE004
, channel and receiving terminal circuit
Figure 2011201174500100002DEST_PATH_IMAGE006
At the transmitting terminal circuit
Figure 2011201174500100002DEST_PATH_IMAGE008
In, end ground connection and series resistance R1 after capacitor C 1 and resistance R 4 are in parallel, the other end is connected with the positive pole of integrated operational amplifier A3, the output of integrated operational amplifier A3 connects its negative pole, an end that also connects resistance R i, the other end of resistance R i is connected with the positive pole of integrated operational amplifier A1, resistance R i is also by series capacitance C2, resistance R 3 is connected with the output H (s) of integrated operational amplifier A1, resistance R 1 is connected with the negative pole of integrated operational amplifier A1, between the negative pole of resistance R 1 and integrated operational amplifier A1, be connected with an end of resistance R 2, the other end of resistance R 2 is connected with the output H (s) of integrated operational amplifier A1, the negative pole of integrated operational amplifier A2 is connected between series capacitance C2 and the resistance R 3, the positive pole of integrated operational amplifier A2 is connected between the output H (s) and resistance R 2 of integrated operational amplifier A1 by resistance R 5, between the positive pole of integrated operational amplifier A2 and resistance R 5, be connected with an end of resistance R 6, the output H of the other end integrated operational amplifier A2 of resistance R 6 (v) is connected, between the negative pole of resistance R 1 and integrated operational amplifier A1, be connected with an end of resistance R 7, the other end of resistance R 7 is connected the output H of resistance R 6 and integrated operational amplifier A2 (v), resistance R i is the positive pole of concatenation operation amplifier A4 also, the output of integrated operational amplifier A4 connects its negative pole, also connect an end of resistance R 8, need coded signal
Figure 2011201174500100002DEST_PATH_IMAGE010
Be connected to an end of resistance R 9, resistance R 8, the other end of R9 is parallel-connected to the negative pole of integrated operational amplifier A5, the plus earth of integrated operational amplifier A5, one end of resistance R 10 connects the output of integrated operational amplifier A5, resistance R 10 other ends are connected resistance R 8, between the negative pole of R9 and integrated operational amplifier A5, an end that is connected resistance R 11 between the output of resistance R 10 and integrated operational amplifier A5, the other end of resistance R 11 connects the negative pole of integrated operational amplifier A6, the plus earth of integrated operational amplifier A6, one end of resistance R 12 connects the output of integrated operational amplifier A6, the other end of resistance R 12 is connected between the negative pole of resistance R 11 and integrated operational amplifier A6, the positive pole that is connected integrated operational amplifier A7 between the output of resistance R 12 and integrated operational amplifier A6, the output of integrated operational amplifier A7 directly is connected with its negative pole, an end that is connected resistance R i ' between the output of integrated operational amplifier A7 and the negative pole, the other end of resistance R i ' connects capacitor C in parallel 1 and resistance R 4, be connected between the output of integrated operational amplifier A7 and the negative pole and go back connecting channel, by channel output coded signal
Figure 2011201174500100002DEST_PATH_IMAGE012
Channel is to connect the transmitting terminal circuit
Figure 384788DEST_PATH_IMAGE004
In the output of integrated operational amplifier A7 and its negative pole between and receiving terminal circuit
Figure 269567DEST_PATH_IMAGE006
In resistance R 23 and resistance R ' between lead;
At receiving terminal circuit
Figure 536601DEST_PATH_IMAGE006
In, end ground connection and series resistance R13 after capacitor C 3 and resistance R 16 are in parallel, the other end is connected with the positive pole of integrated operational amplifier A10, the output of integrated operational amplifier A10 connects its negative pole, an end that also connects resistance R o, the other end of resistance R o is connected with the positive pole of integrated operational amplifier A8, resistance R o is also by series capacitance C4, resistance R 15 is connected with the output H (s) ' of integrated operational amplifier A8, resistance R 13 is connected with the negative pole of integrated operational amplifier A8, between the negative pole of resistance R 13 and integrated operational amplifier A8, be connected with an end of resistance R 14, the other end of resistance R 14 is connected with the output H (s) ' of integrated operational amplifier A8, the negative pole of integrated operational amplifier A9 is connected between series capacitance C4 and the resistance R 15, the positive pole of integrated operational amplifier A9 is connected between the output H (s) ' and resistance R 14 of integrated operational amplifier A8 by resistance R 17, between the positive pole of integrated operational amplifier A9 and resistance R 17, be connected with an end of resistance R 18, the output H of the other end operational amplifier A 9 of resistance R 18 (v) ' be connected, between the negative pole of resistance R 13 and integrated operational amplifier A8, be connected with an end of resistance R 19, the other end of resistance R 19 be connected resistance R 18 and integrated operational amplifier A9 output H (v) ' between, resistance R o also connects the positive pole of integrated operational amplifier A11, the output of integrated operational amplifier A11 connects its negative pole, also connect resistance R 20 1 ends, the other end of resistance R 20 connects the negative pole of integrated operational amplifier A12, the plus earth of integrated operational amplifier A12, one end of resistance R 21 connects the output of integrated integrated operational amplifier A12, the other end of resistance R 21 is connected between the negative pole of resistance R 20 and integrated operational amplifier A12, be connected resistance R 22 1 ends between the output of resistance R 21 and integrated operational amplifier A12, need the signal of deciphering
Figure 548550DEST_PATH_IMAGE012
Be connected the resistance R 23 of series connection by channel, between the Ro ', resistance R o ' is connected with resistance R 16 1 ends with the capacitor C 3 of parallel connection, resistance R 22, the be connected in parallel negative pole of integrated operational amplifier A13 of the other end of R23, the plus earth of integrated operational amplifier A13, one end of resistance R 24 connects the output of integrated operational amplifier A13, the other end of resistance R 24 connects resistance R 22, between the negative pole of R23 and integrated operational amplifier A13, an end that is connected resistance R 25 between the output of resistance R 24 and integrated operational amplifier A13, the other end of resistance R 25 connects the negative pole of integrated operational amplifier A14, the plus earth of integrated operational amplifier A14, one end of resistance R 26 connects the output of integrated operational amplifier A14, resistance R 26 other ends connect between the negative pole of resistance R 25 and integrated operational amplifier A14, and the output of integrated operational amplifier A14 also sends out decrypted signal
Figure 2011201174500100002DEST_PATH_IMAGE014
The beneficial effects of the utility model are: chaos circuit is simple, has only two integrated transporting dischargings, and two energy-storage travelling wave tubes and part resistance constitute, working stability, and the secret signalling of design is applicable to that analog signal such as voice maintains secrecy.
Description of drawings:
Fig. 1 is 2 D chaotic circuit theory diagrams of the present utility model.
Fig. 2 is a 2 D chaotic phasor of the present utility model.
Fig. 3 is chaotic secret communication system circuit theory diagrams of the present utility model.
Fig. 4 is a chaotic secret communication system block diagram of the present utility model.
Fig. 5 is that the ripple signal waveforms is sent out, recorded to chaotic secret communication system of the present utility model when synchronous.
Fig. 6 is that ripple signal phasor is sent out, recorded to chaotic secret communication system of the present utility model when synchronous.
Fig. 7 is that ripple signal phasor is sent out, recorded to chaotic secret communication system of the present utility model when asynchronous.
Embodiment:
As Fig. 1, shown in 2, a kind of 2 D chaotic circuit, it is characterized in that: by resistance R 1, R2, R3, R4, R and capacitor C 1, C2 and integrated operational amplifier A1 form the sinusoidal oscillation circuit of chaos circuit, in sinusoidal oscillation circuit, end ground connection and series resistance R1 after capacitor C 1 and resistance R 4 are in parallel, the other end and resistance R are in series, resistance R is connected with the positive pole of integrated operational amplifier A1, resistance R 1 is connected with the negative pole of integrated operational amplifier A1, resistance R is also by series capacitance C2, resistance R 3 is connected with the output H (s) of integrated operational amplifier A1, be connected with an end of resistance R 2 between the negative pole of resistance R 1 and integrated operational amplifier A1, the other end of resistance R 2 also is connected with the output H (s) of integrated operational amplifier A1; By resistance R 5, R6 and integrated operational amplifier A2 form the hysteresis circuit of chaos circuit, export positive and negative saturation voltage H (v), the negative pole of operational amplifier A 2 is connected between series capacitance C2 and the resistance R 3, the positive pole of operational amplifier A 2 is connected by resistance R 5 and is connected with the output H (s) of integrated operational amplifier A1, between the positive pole of operational amplifier A 2 and resistance R 5, be connected with an end of resistance R 6, the output of the other end operational amplifier A 2 of resistance R 6 is connected, between the negative pole of resistance R 1 and integrated operational amplifier A1, be connected with an end of resistance R 7, the other end of resistance R 7 is connected between the output of resistance R 6 and operational amplifier A 2, sinusoidal oscillation circuit is connected with the hysteresis circuit in the chaos circuit, resistance R 7 (v) feeds back to hysteresis loop comparator output saturation voltage H sinusoidal oscillation circuit output H (s), slowly regulates since 0
Figure 92795DEST_PATH_IMAGE002
, circuit produces chaos.
Shown in Fig. 3,4,5,6,7, a kind of 2 D chaotic secret signalling of making based on the described 2 D chaotic circuit of claim 1, it is characterized in that: chaotic secret communication system is made of the chaotic secret communication circuit, comprises the transmitting terminal circuit
Figure 148476DEST_PATH_IMAGE004
, channel and receiving terminal circuit
Figure 902805DEST_PATH_IMAGE006
At the transmitting terminal circuit
Figure 452866DEST_PATH_IMAGE008
In, end ground connection and series resistance R1 after capacitor C 1 and resistance R 4 are in parallel, the other end is connected with the positive pole of integrated operational amplifier A3, the output of integrated operational amplifier A3 connects its negative pole, an end that also connects resistance R i, the other end of resistance R i is connected with the positive pole of integrated operational amplifier A1, resistance R i is also by series capacitance C2, resistance R 3 is connected with the output H (s) of integrated operational amplifier A1, resistance R 1 is connected with the negative pole of integrated operational amplifier A1, between the negative pole of resistance R 1 and integrated operational amplifier A1, be connected with an end of resistance R 2, the other end of resistance R 2 is connected with the output H (s) of integrated operational amplifier A1, the negative pole of integrated operational amplifier A2 is connected between series capacitance C2 and the resistance R 3, the positive pole of integrated operational amplifier A2 is connected between the output H (s) and resistance R 2 of integrated operational amplifier A1 by resistance R 5, between the positive pole of integrated operational amplifier A2 and resistance R 5, be connected with an end of resistance R 6, the output H of the other end integrated operational amplifier A2 of resistance R 6 (v) is connected, between the negative pole of resistance R 1 and integrated operational amplifier A1, be connected with an end of resistance R 7, the other end of resistance R 7 is connected the output H of resistance R 6 and integrated operational amplifier A2 (v), resistance R i is the positive pole of concatenation operation amplifier A4 also, the output of integrated operational amplifier A4 connects its negative pole, also connect an end of resistance R 8, need coded signal Be connected to an end of resistance R 9, resistance R 8, the other end of R9 is parallel-connected to the negative pole of integrated operational amplifier A5, the plus earth of integrated operational amplifier A5, one end of resistance R 10 connects the output of integrated operational amplifier A5, resistance R 10 other ends are connected resistance R 8, between the negative pole of R9 and integrated operational amplifier A5, an end that is connected resistance R 11 between the output of resistance R 10 and integrated operational amplifier A5, the other end of resistance R 11 connects the negative pole of integrated operational amplifier A6, the plus earth of integrated operational amplifier A6, one end of resistance R 12 connects the output of integrated operational amplifier A6, the other end of resistance R 12 is connected between the negative pole of resistance R 11 and integrated operational amplifier A6, the positive pole that is connected integrated operational amplifier A7 between the output of resistance R 12 and integrated operational amplifier A6, the output of integrated operational amplifier A7 directly is connected with its negative pole, an end that is connected resistance R i ' between the output of integrated operational amplifier A7 and the negative pole, the other end of resistance R i ' connects capacitor C in parallel 1 and resistance R 4, be connected between the output of integrated operational amplifier A7 and the negative pole and go back connecting channel, by channel output coded signal
Figure 296111DEST_PATH_IMAGE012
Channel is to connect the transmitting terminal circuit
Figure 537736DEST_PATH_IMAGE004
In the output of integrated operational amplifier A7 and its negative pole between and receiving terminal circuit
Figure 875176DEST_PATH_IMAGE006
In resistance R 23 and resistance R ' between lead;
At receiving terminal circuit In, end ground connection and series resistance R13 after capacitor C 3 and resistance R 16 are in parallel, the other end is connected with the positive pole of integrated operational amplifier A10, the output of integrated operational amplifier A10 connects its negative pole, an end that also connects resistance R o, the other end of resistance R o is connected with the positive pole of integrated operational amplifier A8, resistance R o is also by series capacitance C4, resistance R 15 is connected with the output H (s) ' of integrated operational amplifier A8, resistance R 13 is connected with the negative pole of integrated operational amplifier A8, between the negative pole of resistance R 13 and integrated operational amplifier A8, be connected with an end of resistance R 14, the other end of resistance R 14 is connected with the output H (s) ' of integrated operational amplifier A8, the negative pole of integrated operational amplifier A9 is connected between series capacitance C4 and the resistance R 15, the positive pole of integrated operational amplifier A9 is connected between the output H (s) ' and resistance R 14 of integrated operational amplifier A8 by resistance R 17, between the positive pole of integrated operational amplifier A9 and resistance R 17, be connected with an end of resistance R 18, the output H of the other end operational amplifier A 9 of resistance R 18 (v) ' be connected, between the negative pole of resistance R 13 and integrated operational amplifier A8, be connected with an end of resistance R 19, the other end of resistance R 19 be connected resistance R 18 and integrated operational amplifier A9 output H (v) ' between, resistance R o also connects the positive pole of integrated operational amplifier A11, the output of integrated operational amplifier A11 connects its negative pole, also connect resistance R 20 1 ends, the other end of resistance R 20 connects the negative pole of integrated operational amplifier A12, the plus earth of integrated operational amplifier A12, one end of resistance R 21 connects the output of integrated integrated operational amplifier A12, the other end of resistance R 21 is connected between the negative pole of resistance R 20 and integrated operational amplifier A12, be connected resistance R 22 1 ends between the output of resistance R 21 and integrated operational amplifier A12, need the signal of deciphering
Figure 729180DEST_PATH_IMAGE012
Be connected the resistance R 23 of series connection by channel, between the Ro ', resistance R o ' is connected with resistance R 16 1 ends with the capacitor C 3 of parallel connection, resistance R 22, the be connected in parallel negative pole of integrated operational amplifier A13 of the other end of R23, the plus earth of integrated operational amplifier A13, one end of resistance R 24 connects the output of integrated operational amplifier A13, the other end of resistance R 24 connects resistance R 22, between the negative pole of R23 and integrated operational amplifier A13, an end that is connected resistance R 25 between the output of resistance R 24 and integrated operational amplifier A13, the other end of resistance R 25 connects the negative pole of integrated operational amplifier A14, the plus earth of integrated operational amplifier A14, one end of resistance R 26 connects the output of integrated operational amplifier A14, resistance R 26 other ends connect between the negative pole of resistance R 25 and integrated operational amplifier A14, and the output of integrated operational amplifier A14 also sends out decrypted signal
Figure 271151DEST_PATH_IMAGE014
Chaos circuit comprises integrated transporting discharging A1, A2, resistance R, R1, R2, R3, R4, R5, R6, R7, capacitor C 1, C2, C3, C4.
The chaotic secret communication system circuit is by the transmitting terminal circuit , channel, receiving terminal circuit Three parts are formed.
Above-mentioned chaos circuit, chaotic secret communication system have following feature:
(1) resistance R 1, R2, R3, R4, R in the chaos circuit, capacitor C 1, C2, integrated transporting discharging A1 forms sinusoidal oscillation circuit.
(2) the hysteresis circuit that resistance R 5, R6, integrated transporting discharging A2 form in the chaos circuit is exported positive and negative saturation voltage H (v).
(3) sinusoidal oscillation circuit is connected with the hysteresis circuit in the chaos circuit, and resistance R 7 (v) feeds back to hysteresis loop comparator output saturation voltage H sinusoidal oscillation circuit output H (s), slowly regulates since 0 , circuit produces chaos.
(4) transmitting terminal circuit in the secret signalling
Figure 507911DEST_PATH_IMAGE004
Signal between capacitor C 1, the C2 is to transmit mutually, be two-way transmission, with the transmission of this both direction signal separately, realize that the method for this circuit design purpose is to use two the opposite voltage followers of direction and the resistance that equates with former resistance R of connecting separately.For circuit is implemented control, at the transmitting terminal circuit
Figure 200536DEST_PATH_IMAGE004
Signal for coupling direction right-to-left, the voltage follower that access is made of integrated transporting discharging A4, at voltage follower output back series connection two-stage sign-changing amplifier, change the one-level reverser into one-level reverse summing amplifier, be that resistance R 8, R9, R10, integrated transporting discharging A5 constitute anti-phase adder, resistance R 11, R12, integrated transporting discharging A6 constitute inverter.The external signal of need to be keep secret, i.e. the information that tendency to develop is sent inserts resistance R 9, thereby has realized the encryption of chaos circuit to information.
(6) receiving terminal circuit
Figure 615337DEST_PATH_IMAGE006
Signal between capacitor C 3, the C4 is to transmit mutually, be two-way transmission, with the transmission of this both direction signal separately, realize that the method for this circuit design purpose is to use two the opposite voltage followers of direction and the resistance that equates with former resistance R of connecting separately.Signal for coupling direction right-to-left, the voltage follower that access is made of integrated transporting discharging A11, at voltage follower output back series connection two-stage sign-changing amplifier, change the secondary reverser into secondary reverse summing amplifier, be that resistance R 20, R21, integrated transporting discharging A12 constitute inverter, resistance R 22, R23, R24, integrated transporting discharging A13 constitute anti-phase adder.The external signal that needs demodulation, i.e. the information of desire modulation inserts resistance R 24, thereby has realized the deciphering of chaos circuit to information.
The 2 D chaotic circuit theory: be made up of two parts as shown in Figure 1, left-half is a sinusoidal oscillation circuit; Right half part is the hysteresis circuit, and the output voltage of right half part hysteresis circuit is
Figure DEST_PATH_IMAGE016
, the threshold voltage of in-phase end is
Figure DEST_PATH_IMAGE018
, so the voltage ratio of hysteresis circuit inverting input
Figure DEST_PATH_IMAGE020
When also little, the hysteresis circuit is output as
Figure DEST_PATH_IMAGE022
, the voltage ratio of hysteresis circuit inverting input
Figure DEST_PATH_IMAGE024
When also big, the hysteresis circuit is output as , the variation of inverting input level causes the output switch level of hysteresis circuit
Figure DEST_PATH_IMAGE028
, circuit can chaos, is actually the sinusoidal oscillation circuit of exporting to that circuit changes into the voltage on capacitor C 1 and the resistance R in the hysteresis circuit.
According to Fig. 1, establish capacitor C 1 and be for voltage
Figure DEST_PATH_IMAGE030
, capacitor C 2 voltages are
Figure DEST_PATH_IMAGE032
, C1=C2=C, the voltage of resistance R is
Figure DEST_PATH_IMAGE034
, two integrated transporting dischargings are desirable, hysteresis loop comparator be output as H (v), according to the KCL of circuit, the KVL law, the available systems equation is
Figure DEST_PATH_IMAGE036
=
Figure DEST_PATH_IMAGE038
Figure DEST_PATH_IMAGE040
Figure DEST_PATH_IMAGE042
+
Figure DEST_PATH_IMAGE044
Figure DEST_PATH_IMAGE046
) (1)
Wherein
Figure DEST_PATH_IMAGE048
,
Figure DEST_PATH_IMAGE050
The threshold value of hysteresis loop comparator
Figure DEST_PATH_IMAGE052
,
Figure DEST_PATH_IMAGE054
(2)
By changing
Figure DEST_PATH_IMAGE056
,
Figure DEST_PATH_IMAGE058
,
Figure DEST_PATH_IMAGE060
Resistance, thereby change threshold voltage ,, slowly regulate since 0 in order to make the smooth starting of oscillation of system
Figure DEST_PATH_IMAGE062
System produces chaos.
Chaos circuit circuit element when design takes off row parameters R 1=1.8K
Figure DEST_PATH_IMAGE064
, C1=C2=1nF, R=0.05K
Figure 624848DEST_PATH_IMAGE064
, R3=R4=3K
Figure 849725DEST_PATH_IMAGE064
, R2=3.9K
Figure 384612DEST_PATH_IMAGE064
, R5=3.3K
Figure 498062DEST_PATH_IMAGE064
, R6=19.6K
Figure 236342DEST_PATH_IMAGE064
, R7=46.8K
Figure 522966DEST_PATH_IMAGE064
Computer Simulation obtains the 2 D chaotic system mutually as shown in Figure 2.
Design of chaotic secure communication system: make up secret signalling transmitting terminal circuit, circuitous resistance R shown in Figure 1, it connects series capacitance C2, resistance R 3 circuit on shunt capacitance C1, resistance R 4 circuit and the right on the left side, and actual is the both sides capacitance voltages
Figure 397513DEST_PATH_IMAGE030
With
Figure 744180DEST_PATH_IMAGE032
Coupling path, the signal at resistance R two ends is to transmit mutually, be two-way transmission, with the transmission of this both direction signal separately, realize that the method for this circuit design purpose is to use two the opposite voltage followers of direction and the resistance that equates with former resistance R of connecting separately.As shown in Figure 3, for circuit is implemented control, at the transmitting terminal circuit
Figure 156707DEST_PATH_IMAGE004
, for coupling direction signal from left to right, insert the voltage follower that constitutes by integrated transporting discharging A3, send to capacitor C 2, resistance R 3 circuit of the right series connection by resistance R i; Signal for coupling direction right-to-left, the voltage follower that access is made of integrated transporting discharging A4, at voltage follower output back series connection two-stage sign-changing amplifier, and change the one-level reverser into one-level reverse adder, as shown in Figure 3, promptly resistance R 8, R9, R10, integrated transporting discharging A5 constitute anti-phase adder, and resistance R 11, R12, integrated transporting discharging A6 constitute inverter, the external signal of need to be keep secret, i.e. the information that tendency to develop is sent , insert resistance R 9, realize the encryption of chaos circuit by anti-phase adder to information, anti-phase adder output inserts the voltage follower that integrated transporting discharging A7 constitutes, integrated transporting discharging A7 output output encrypted message
Figure 241655DEST_PATH_IMAGE012
,
Figure 241447DEST_PATH_IMAGE012
Send to the electric capacity of left side parallel connection on the one hand by resistance R i '
Figure DEST_PATH_IMAGE066
, resistance
Figure DEST_PATH_IMAGE068
Circuit sends to receiving terminal circuit by channel in addition
Figure 16636DEST_PATH_IMAGE006
, the transmitting terminal circuit
Figure 645064DEST_PATH_IMAGE004
Design.
Receiving terminal circuit
Figure 759782DEST_PATH_IMAGE006
Structure is as the transmitting terminal circuit
Figure 182673DEST_PATH_IMAGE004
Similar, make up receiving terminal circuit by circuit shown in Figure 1, two voltage followers that service orientation is opposite and the resistance that equates with former resistance R of connecting separately make the voltage of both sides capacitor C 3, C4 With
Figure DEST_PATH_IMAGE072
Coupling path separately.As shown in Figure 3,, insert the voltage follower that constitutes by integrated transporting discharging A10, send to capacitor C 4, resistance R 15 circuit of the right series connection by resistance R o for coupling direction signal from left to right; The voltage follower that constitutes by integrated transporting discharging A11 for coupling direction right-to-left, at its output back series connection two-stage reverser, and change the secondary reverser into secondary reverse adder, as shown in Figure 3, be that resistance R 20, R21, integrated transporting discharging A12 constitute inverter, resistance R 22, R23, R24, integrated transporting discharging A13 constitute anti-phase adder.The external signal that needs demodulation
Figure 445158DEST_PATH_IMAGE012
, promptly desire the information of the system of separating
Figure 630938DEST_PATH_IMAGE012
, insert resistance R 24, by anti-phase adder cancellation chaotic signal, keep anti-phase information
Figure DEST_PATH_IMAGE074
, resistance R 25, R26, integrated transporting discharging A14 constitute inverter, anti-phase information Phase place returns to original phase place, output
Figure 256272DEST_PATH_IMAGE014
Thereby, realized the deciphering of chaos circuit to information.Send to the coded signal of receiving terminal circuit in addition by channel
Figure 865108DEST_PATH_IMAGE012
, pass through Ro ' and send to capacitor C 3, resistance R 16 circuit in parallel.Receiving terminal circuit
Figure 851649DEST_PATH_IMAGE006
Design.
As shown in Figure 3, two identical chaos circuits of circuit parameter are coupled together by channel, constituted the synchronous of two chaos circuits, modulation signal that the desire of transmitting terminal sends and chaotic signal superposition are together, has chaos randomness, the listener-in have only his receiving circuit parameter and transmitting terminal circuit parameter when identical could be with it synchronously and intercept useful signal, this has certain degree of difficulty technically, the basic principle of the 2 D chaotic circuit secret signalling of the utility model design that Here it is.
Secret signalling circuit element when design takes off columns: R1=R14=1.8K
Figure 924648DEST_PATH_IMAGE064
, C1=C2=C3=C4=1nF, Ri=Ri '=Ro=Ro '=0.05K
Figure 705653DEST_PATH_IMAGE064
, R3=R4=R15=R16=3K
Figure 801785DEST_PATH_IMAGE064
, R2=R14=3.9K
Figure 575706DEST_PATH_IMAGE064
, R5=R17=3.3K , R6=R18=19.6K
Figure 452187DEST_PATH_IMAGE064
, R7=R19=46.8K , R8=R9=R10=R11=R12=R20=R21=R22=R23=R24=R25=R26=10K
Figure 98381DEST_PATH_IMAGE064

Claims (2)

1. 2 D chaotic circuit, it is characterized in that: by resistance R 1, R2, R3, R4, R and capacitor C 1, C2 and integrated operational amplifier A1 form the sinusoidal oscillation circuit of chaos circuit, in sinusoidal oscillation circuit, end ground connection and series resistance R1 after capacitor C 1 and resistance R 4 are in parallel, the other end and resistance R are in series, resistance R is connected with the positive pole of integrated operational amplifier A1, resistance R 1 is connected with the negative pole of integrated operational amplifier A1, resistance R is also by series capacitance C2, resistance R 3 is connected with the output H (s) of integrated operational amplifier A1, be connected with an end of resistance R 2 between the negative pole of resistance R 1 and integrated operational amplifier A1, the other end of resistance R 2 also is connected with the output H (s) of integrated operational amplifier A1; By resistance R 5, R6 and integrated operational amplifier A2 form the hysteresis circuit of chaos circuit, export positive and negative saturation voltage H (v), the negative pole of operational amplifier A 2 is connected between series capacitance C2 and the resistance R 3, the positive pole of operational amplifier A 2 is connected by resistance R 5 and is connected with the output H (s) of integrated operational amplifier A1, between the positive pole of operational amplifier A 2 and resistance R 5, be connected with an end of resistance R 6, the output of the other end operational amplifier A 2 of resistance R 6 is connected, between the negative pole of resistance R 1 and integrated operational amplifier A1, be connected with an end of resistance R 7, the other end of resistance R 7 is connected between the output of resistance R 6 and operational amplifier A 2, sinusoidal oscillation circuit is connected with the hysteresis circuit in the chaos circuit, resistance R 7 (v) feeds back to hysteresis loop comparator output saturation voltage H sinusoidal oscillation circuit output H (s), slowly regulates since 0
Figure 2011201174500100001DEST_PATH_IMAGE002
, circuit produces chaos.
2. 2 D chaotic secret signalling of making based on the described 2 D chaotic circuit of claim 1, it is characterized in that: chaotic secret communication system is made of the chaotic secret communication circuit, comprises the transmitting terminal circuit , channel and receiving terminal circuit ,
At the transmitting terminal circuit
Figure 2011201174500100001DEST_PATH_IMAGE008
In, end ground connection and series resistance R1 after capacitor C 1 and resistance R 4 are in parallel, the other end is connected with the positive pole of integrated operational amplifier A3, the output of integrated operational amplifier A3 connects its negative pole, an end that also connects resistance R i, the other end of resistance R i is connected with the positive pole of integrated operational amplifier A1, resistance R i is also by series capacitance C2, resistance R 3 is connected with the output H (s) of integrated operational amplifier A1, resistance R 1 is connected with the negative pole of integrated operational amplifier A1, between the negative pole of resistance R 1 and integrated operational amplifier A1, be connected with an end of resistance R 2, the other end of resistance R 2 also is connected with the output H (s) of integrated operational amplifier A1, the negative pole of integrated operational amplifier A2 is connected between series capacitance C2 and the resistance R 3, the positive pole of integrated operational amplifier A2 is connected by resistance R 5 and is connected with the output H (s) of integrated operational amplifier A1, between the positive pole of integrated operational amplifier A2 and resistance R 5, be connected with an end of resistance R 6, the output H of the other end integrated operational amplifier A2 of resistance R 6 (v) is connected, between the negative pole of resistance R 1 and integrated operational amplifier A1, be connected with an end of resistance R 7, the other end of resistance R 7 is connected the output H of resistance R 6 and integrated operational amplifier A2 (v), resistance R i is the positive pole of concatenation operation amplifier A4 also, the output of integrated operational amplifier A4 connects its negative pole, also connect an end of resistance R 8, need coded signal
Figure 2011201174500100001DEST_PATH_IMAGE010
Be connected to an end of resistance R 9, resistance R 8, the other end of R9 is parallel-connected to the negative pole of integrated operational amplifier A5, the plus earth of integrated operational amplifier A5, one end of resistance R 10 connects the output of integrated operational amplifier A5, resistance R 10 other ends are connected resistance R 8, between the negative pole of R9 and integrated operational amplifier A5, an end that is connected resistance R 11 between the output of resistance R 10 and integrated operational amplifier A5, the other end of resistance R 11 connects the negative pole of integrated operational amplifier A6, the plus earth of integrated operational amplifier A6, one end of resistance R 12 connects the output of integrated operational amplifier A6, the other end of resistance R 12 is connected between the negative pole of resistance R 11 and integrated operational amplifier A6, the positive pole that is connected integrated operational amplifier A7 between the output of resistance R 12 and integrated operational amplifier A6, directly be connected between the output of integrated operational amplifier A7 and the negative pole, an end that is connected resistance R i between the output of integrated operational amplifier A7 and the negative pole, the other end of resistance R i ' connects capacitor C in parallel 1 and resistance R 4, be connected between the output of integrated operational amplifier A7 and the negative pole and go back connecting channel, by channel output coded signal
Figure DEST_PATH_IMAGE012
Channel is to connect the transmitting terminal circuit
Figure 572491DEST_PATH_IMAGE004
Between the output of integrated operational amplifier A7 and the negative pole and receiving terminal circuit
Figure 551948DEST_PATH_IMAGE006
Resistance R 23 and resistance R ' between lead;
At receiving terminal circuit In, end ground connection and series resistance R13 after capacitor C 3 and resistance R 16 are in parallel, the other end is connected with the positive pole of integrated operational amplifier A10, the output of integrated operational amplifier A10 connects its negative pole, an end that also connects resistance R o, the other end of resistance R o is connected with the positive pole of integrated operational amplifier A8, resistance R o is also by series capacitance C4, resistance R 15 is connected with the output H (s) ' of integrated operational amplifier A8, resistance R 13 is connected with the negative pole of integrated operational amplifier A8, between the negative pole of resistance R 13 and integrated operational amplifier A8, be connected with an end of resistance R 14, the other end of resistance R 14 also is connected with the output H (s) ' of integrated operational amplifier A8, the negative pole of integrated operational amplifier A9 is connected between series capacitance C4 and the resistance R 15, the positive pole of integrated operational amplifier A9 is connected by resistance R 17 and is connected with the output H (s) of integrated operational amplifier A8, between the positive pole of integrated operational amplifier A9 and resistance R 17, be connected with an end of resistance R 18, the output of the other end operational amplifier A 9 of resistance R 18 is connected, between the negative pole of resistance R 13 and integrated operational amplifier A8, be connected with an end of resistance R 19, the other end of resistance R 19 be connected resistance R 18 and integrated operational amplifier A9 output H (v) ' between, resistance R o is the positive pole of concatenation operation amplifier A11 also, the output of integrated operational amplifier A11 connects its negative pole, also connect resistance R 20 1 ends, the other end of resistance R 20 connects the negative pole of integrated operational amplifier A12, the plus earth of integrated operational amplifier A12, one end of resistance R 21 connects the output of integrated operational amplifier A12, the other end of resistance R 21 connects between the negative pole of resistance R 20 and integrated operational amplifier A12, also be connected resistance R 22 1 ends between the output of resistance R 21 and integrated operational amplifier A12, need the signal of deciphering
Figure 602261DEST_PATH_IMAGE012
Be connected the resistance R 23 of series connection by channel, between the Ro ', resistance R o ' is connected with resistance R 16 1 ends with the capacitor C 3 of parallel connection, resistance R 22, the be connected in parallel negative pole of integrated operational amplifier A13 of the other end of R23, the plus earth of integrated operational amplifier A13, one end of resistance R 24 connects the output of integrated operational amplifier A13, the other end of resistance R 24 connects resistance R 22, between the negative pole of R23 and integrated operational amplifier A13, an end that is connected resistance R 25 between the output of resistance R 24 and integrated operational amplifier A13, the other end of resistance R 25 connects the negative pole of integrated operational amplifier A14, the plus earth of integrated operational amplifier A14, one end of resistance R 26 connects the output of integrated operational amplifier A14, resistance R 26 other ends connect between the negative pole of resistance R 25 and integrated operational amplifier A14, and the output of integrated operational amplifier A14 also sends out decrypted signal
Figure DEST_PATH_IMAGE014
CN2011201174500U 2011-04-20 2011-04-20 Two-dimensional chaos circuit and two-dimensional chaos secret communication system thereof Expired - Fee Related CN201985876U (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102142956A (en) * 2011-04-20 2011-08-03 河南化工职业学院 Two-dimensional chaotic circuit and two-dimensional chaotic privacy communication system thereof
CN110260987A (en) * 2019-06-29 2019-09-20 南京垚鑫电子有限公司 A kind of intelligent radio transmission temperature sensing device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102142956A (en) * 2011-04-20 2011-08-03 河南化工职业学院 Two-dimensional chaotic circuit and two-dimensional chaotic privacy communication system thereof
CN110260987A (en) * 2019-06-29 2019-09-20 南京垚鑫电子有限公司 A kind of intelligent radio transmission temperature sensing device
CN110260987B (en) * 2019-06-29 2020-11-20 南京垚鑫电子有限公司 Intelligent wireless transmission temperature sensing device

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