CN201859167U - Analog quantity acquisition converter - Google Patents

Analog quantity acquisition converter Download PDF

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Publication number
CN201859167U
CN201859167U CN2010206079828U CN201020607982U CN201859167U CN 201859167 U CN201859167 U CN 201859167U CN 2010206079828 U CN2010206079828 U CN 2010206079828U CN 201020607982 U CN201020607982 U CN 201020607982U CN 201859167 U CN201859167 U CN 201859167U
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CN
China
Prior art keywords
digital signal
chip
fifo
standard range
bus
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Expired - Lifetime
Application number
CN2010206079828U
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Chinese (zh)
Inventor
杨慧
彭旭锋
张鹏
王昕�
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Beijing Institute of Astronautical Systems Engineering
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Beijing Institute of Astronautical Systems Engineering
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Priority to CN2010206079828U priority Critical patent/CN201859167U/en
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Abstract

The utility model relates to an analog quantity acquisition converter which comprises n insulation acquisition circuits, an FPGA, an FIFO and a bus driving chip. Each insulation acquisition circuit is composed of a bleeder circuit, an emitter follower, an A/D and a bus insulation chip, wherein the bleeder circuit converts a non-standard range voltage to a standard range voltage. The emitter follower performs filtering to the standard range voltage. The A/D converts the analog voltage signal to a digital signal. The bus insulation chip insulates the front end and the back end of the received digital signal. The FPGA writes the insulated digital signal to the FIFO. The FIFO stores the digital signal received from the FPGA. The bus driving chip receives an outer command for outputting the digital signal stored in the FIFO to external equipment. The converter reduces a number of the used insulation chips and a number of the used cables thereby reducing the total volume and total mass of the measuring system and improving the reliability.

Description

A kind of analog acquisition transducer
Technical field
The utility model relates to a kind of analog acquisition transducer.
Background technology
Traditional analog quantity conversion module is made up of the multi-channel DC metering circuit.Because measuring system and external system need to isolate on electric, the isolation of the direct current signal three end isolated amplifiers that adopt are realized more.The BB3656 three end isolated amplifiers of direct current signal converter using TI company in the past are as isolating device.Because TI announced the BB3656 stopping production in 2008, and did not recommend to substitute chip to the user, cause tradition to use the direct current signal transducer of BB3656 chip to produce again.For the BB3656 three end isolated amplifiers before substituting, TH3656, the CGF-0711 of Changzhou Semiconductor Factory development of FY3656, the Wuxi Shi Wuchang development of northern device one factory development can be arranged at present for the homemade isolated amplifier of selecting for use.Because the BB3656 volume that tradition is used is big, weight is big, and can only measure one road analog quantity parameter, causes that analog quantity transducer volume is big, quality heavy, and the analog quantity parameter that collects need be given and far put the measurement that analog quantity parameter just can be finished in the unit.And homemade isolated amplifier does not also increase than BB3656 on volume, quality and function, and the supply cycle of homemade isolated amplifier is long, a little less than the productive capacity, be very necessary so design brand-new analog acquisition transducer.
The utility model content
The purpose of this utility model is to overcome the above-mentioned deficiency of prior art, a kind of analog acquisition transducer is provided, this transducer has reduced the usage quantity of isolating chip and the usage quantity of cable, thereby has dwindled the cumulative volume of measuring system and gross mass, enhancing reliability.
Above-mentioned purpose of the present utility model is achieved by following technical solution:
A kind of analog acquisition transducer comprises that the n road isolates Acquisition Circuit, FPGA, FIFO and bus driver chip, and each road isolates Acquisition Circuit by bleeder circuit, penetrate a grade follower, A/D and bus isolating chip and form, wherein:
Bleeder circuit: with non-standard range voltage transformation is standard range voltage, described standard range voltage is exported to penetrated a grade follower;
Penetrate a grade follower: receive the standard range voltage of bleeder circuit output, and carry out filtering, filtered analog voltage signal is exported to A/D;
A/D: will be converted into digital signal from penetrating the analog voltage signal that grade follower receives, and export to the bus isolating chip;
Bus isolating chip: the front and back end of the digital signal that receives is isolated, and export to FPGA;
FPGA: the digital signal after the isolation that will receive writes FIFO;
FIFO: store the digital signal that receives from FPGA, and export described digital signal to the bus driver chip;
Bus driver chip: receive external command, export the digital signal of storing among the FIFO to external unit.
In above-mentioned analog acquisition transducer, bleeder circuit is made up of resistance in series R1 and R2, and non-standard range voltage is transformed to standard range voltage through the dividing potential drop of resistance R 1 and R2.
In above-mentioned analog acquisition transducer, the model of A/D is MAX1167; The model of bus isolating chip is ADUM1401.
In above-mentioned analog acquisition transducer, also comprise the voltage isolation chip, be used for bus isolating chip rear and front end power supply power supply is isolated.
The utility model compared with prior art has following beneficial effect:
(1) the utility model analog acquisition transducer is integrated in n road isolation Acquisition Circuit, FPGA, FIFO and bus driver chip on the circuit board, and the A/D that adopts is the multichannel input, one tunnel output, thereby the usage quantity of minimizing isolating chip, reduced volume;
(2) the utility model analog acquisition transducer with traditional analog quantity transducer with far put the unit and integrate, reduced the cable usage quantity, thereby reduced the measuring system oeverall quality, strengthen reliability;
(3) data behind the utility model employing bus isolating chip isolated variable, thereby measuring system and external system are isolated, adopt the voltage isolation chip that bus isolating chip rear and front end power supply power supply is isolated simultaneously, thereby reach the effect of measuring system and external system power supply isolation.
Description of drawings
Fig. 1 is the structural representation of the utility model analog acquisition transducer;
Fig. 2 is the utility model bleeder circuit structural representation.
Embodiment
Below in conjunction with the drawings and specific embodiments the utility model is described in further detail:
Be illustrated in figure 1 as the structural representation of the utility model analog acquisition transducer, this analog acquisition transducer comprises that the n road isolates Acquisition Circuit, FPGA, FIFO and bus driver chip as seen from the figure, each road isolates Acquisition Circuit by bleeder circuit, penetrate a grade follower, A/D and bus isolating chip and form, and each road isolation Acquisition Circuit can be gathered conversion to four circuit-switched data.Because it is not that every road all isolates that external system is sent to the analog quantity parameter of measuring system, take the front end parameter analytical approach, the control system analog quantity parameter is divided into groups, analog quantity parameter altogether is divided into one group, same group parameter can be measured altogether, be for conversion into the standard range by bleeder circuit, enter then and penetrate a grade follow circuit filtering.
Be illustrated in figure 2 as the utility model bleeder circuit structural representation, bleeder circuit is made up of resistance in series R1 and R2, non-standard range voltage is transformed to standard range voltage through the dividing potential drop of resistance R 1 and R2, for example present embodiment is the voltage of 0~5V with the voltage transitions of 0~30V, is input to through R1 and penetrates a grade follower.
Select for use MAX1167 to carry out the A/D analog to digital conversion in the present embodiment, the output data model is that the bus isolating chip of ADUM 1401 is isolated the front and back end, by FPGA (model is XC2S50) control data being write among the FIFO (model is IDT7205), is that the bus driver chip output data of 54HC245 reads for other equipment or module by model.Thereby realize the analog quantity transducer and put far that the unit is integrated to be designed to a module, can be in reduction measuring system quality, volume minimizing cable usage quantity, the enhanced system reliability.
A/D in the present embodiment adopts MAX1167, and sampling rate is 200ksps, and this A/D is 4 tunnel inputs, and SPI serial output can satisfied under the multichannel initial conditions, realizes one tunnel output, thereby reduces the usage quantity of isolating chip, dwindles the module volume.
Bus isolating chip ADUM1401 is used for the data behind the isolated variable, thereby measuring system and external system are isolated, if but power supply is not isolated, then do not reach isolation effect, so need isolate to the power supply of bus isolating chip rear and front end power supply, adopt the DCR010505 isolating chip, this chip can go out one tunnel 5V voltage of isolating by the conversion of 5V voltage isolation, use for front-end circuit, the DCR010505 output current is 200mA, use n sheet DCR010505 independently isolates the Acquisition Circuit front-end circuit for the n of this equipment is individual and powers respectively, thereby reaches the effect of measuring system and external system isolation.
The real-time send mode of The data in the utility model, sampling resolution is 16, and sampled data is sent to other equipment by the FIFO buffer memory, has realized the collection of this frame, and this frame sends.
The content that is not described in detail in the utility model instructions belongs to this area professional and technical personnel's known technology.

Claims (5)

1. analog acquisition transducer is characterized in that: comprise that the n road isolates Acquisition Circuit, FPGA, FIFO and bus driver chip, each road isolates Acquisition Circuit by bleeder circuit, and penetrate a grade follower, A/D and bus isolating chip and form, wherein:
Bleeder circuit: with non-standard range voltage transformation is standard range voltage, described standard range voltage is exported to penetrated a grade follower;
Penetrate a grade follower: receive the standard range voltage of bleeder circuit output, and carry out filtering, filtered analog voltage signal is exported to A/D;
A/D: will be converted into digital signal from penetrating the analog voltage signal that grade follower receives, and export to the bus isolating chip;
Bus isolating chip: the front and back end of the digital signal that receives is isolated, and export to FPGA;
FPGA: the digital signal after the isolation that will receive writes FIFO;
FIFO: store the digital signal that receives from FPGA, and export described digital signal to the bus driver chip;
Bus driver chip: receive external command, export the digital signal of storing among the FIFO to external unit.
2. a kind of analog acquisition transducer according to claim 1, it is characterized in that: described bleeder circuit is made up of resistance in series R1 and R2, and non-standard range voltage is transformed to standard range voltage through the dividing potential drop of resistance R 1 and R2.
3. a kind of analog acquisition transducer according to claim 1 is characterized in that: the model of described A/D is MAX1167.
4. a kind of analog acquisition transducer according to claim 1 is characterized in that: the model of described bus isolating chip is ADUM1401.
5. a kind of analog acquisition transducer according to claim 1 is characterized in that: also comprise the voltage isolation chip, be used for bus isolating chip rear and front end power supply power supply is isolated.
CN2010206079828U 2010-11-12 2010-11-12 Analog quantity acquisition converter Expired - Lifetime CN201859167U (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103116054A (en) * 2013-01-25 2013-05-22 天津市松正电动汽车技术股份有限公司 Isolation voltage acquisition circuit
CN103279440A (en) * 2013-05-10 2013-09-04 北京宇航系统工程研究所 Bus communication method between single-machine modules
CN109541277A (en) * 2019-02-18 2019-03-29 新誉轨道交通科技有限公司 Full isolated DC voltage sample system and its working method
CN110133485A (en) * 2019-05-09 2019-08-16 中国航空工业集团公司西安航空计算技术研究所 A kind of BIT circuit of analog quantity acquisition circuit
CN112362960A (en) * 2021-01-14 2021-02-12 武汉海奥电气有限公司 High-speed high-precision large-dynamic-range electrical parameter measuring system and method

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103116054A (en) * 2013-01-25 2013-05-22 天津市松正电动汽车技术股份有限公司 Isolation voltage acquisition circuit
CN103279440A (en) * 2013-05-10 2013-09-04 北京宇航系统工程研究所 Bus communication method between single-machine modules
CN109541277A (en) * 2019-02-18 2019-03-29 新誉轨道交通科技有限公司 Full isolated DC voltage sample system and its working method
CN110133485A (en) * 2019-05-09 2019-08-16 中国航空工业集团公司西安航空计算技术研究所 A kind of BIT circuit of analog quantity acquisition circuit
CN110133485B (en) * 2019-05-09 2022-03-15 中国航空工业集团公司西安航空计算技术研究所 BIT circuit of analog quantity acquisition circuit
CN112362960A (en) * 2021-01-14 2021-02-12 武汉海奥电气有限公司 High-speed high-precision large-dynamic-range electrical parameter measuring system and method

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CX01 Expiry of patent term

Granted publication date: 20110608

CX01 Expiry of patent term