CN201247061Y - Multichannel synchronized signal collection device - Google Patents

Multichannel synchronized signal collection device Download PDF

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Publication number
CN201247061Y
CN201247061Y CNU2008203019813U CN200820301981U CN201247061Y CN 201247061 Y CN201247061 Y CN 201247061Y CN U2008203019813 U CNU2008203019813 U CN U2008203019813U CN 200820301981 U CN200820301981 U CN 200820301981U CN 201247061 Y CN201247061 Y CN 201247061Y
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CN
China
Prior art keywords
signal
chip microcomputer
daughter board
gate array
programmable gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CNU2008203019813U
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Chinese (zh)
Inventor
叶英
毋运龙
刘祥平
许�鹏
王贯明
崔玉萍
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Beijing Trans Bee Communication Engineering Technology Co Ltd
Beijing Municipal Engineering Research Institute
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Beijing Trans Bee Communication Engineering Technology Co Ltd
Beijing Municipal Engineering Research Institute
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Application filed by Beijing Trans Bee Communication Engineering Technology Co Ltd, Beijing Municipal Engineering Research Institute filed Critical Beijing Trans Bee Communication Engineering Technology Co Ltd
Priority to CNU2008203019813U priority Critical patent/CN201247061Y/en
Application granted granted Critical
Publication of CN201247061Y publication Critical patent/CN201247061Y/en
Anticipated expiration legal-status Critical
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Abstract

The utility model relates a multichannel synchronizing signal collector, wherein a collecting sub-plate is communicated with a system motherboard through a gang socket to get electricity, a single chip microcomputer main control circuit on the system motherboard is connected with 16 stands through a control or data bus, the single chip microcomputer main control circuit is connected with a signal of a USB controller, the USB controller is connected with a USB interface through a serial port which is connected with a computer, each collecting sub-plate is provided with a field programmable gate array circuit, the field programmable gate array circuit is connected with a signal of a synchronous dynamic random access memory through a parallel bus, the field programmable gate array circuit is connected with signals of 16 independent A/D converters through an SPI bus, and each A/D converter is provided with the interface which is connected with a sensor. The collector can reach 256 channels, solves the technical problems that signal collector channels are few, the precision is low, and each channel can not be synchronous easily, and is suitable for synchronous checking and collection of various data signals.

Description

The multi-channel synchronous signal picker
Technical field
The utility model relates to a kind of signal picker, particularly a kind of synchronous signal acquisition device.
Background technology
At present, known data acquisition unit normally port number is less, and the A/D conversion accuracy is lower, and the industrial collector that the triggering form is single is in the majority.Conventional seismic data collector is that 24 passages, 48 passages are in the majority, because the data acquisition unit passage is few, causes the development of 3-D seismics monitoring to be restricted and to restrict.
The utility model content
The purpose of this utility model provides a kind of multi-channel synchronous signal picker, solve that existing signal picker port number is few, precision is low, each passage is difficult to synchronous technical matters.
In order to remedy the deficiencies in the prior art, the utility model adopts following technical scheme:
A kind of multi-channel synchronous signal picker is characterized in that: be formed by connecting by system board and 16 collection daughter board plug-in cards, gather daughter board and be communicated with power taking by gang socket with system board;
The total control circuit of single-chip microcomputer, power supply, power light, serial ports, USB interface and wave point are arranged on the system board, the total control circuit of single-chip microcomputer is connected with deck with 16 by control/data bus, the total control circuit of single-chip microcomputer is connected with a USB controller signals, the USB controller be connected computer by serial and be connected with USB interface;
Gather daughter board for every a gang socket that is connected with system board is arranged, also has a field programmable gate array circuit FPGA (Field Programmable Gate Array), field programmable gate array circuit FPGA is connected with a Synchronous Dynamic Random Access Memory SDRAM (Synchronous Dynami crandomaccess memory) signal by parallel bus, field programmable gate array circuit FPGA has a signal input, by this signal input through spi bus with 16 independently the A/D converter signal be connected, gather for 16 and form 256 simulating signal input channels on the daughter board, each A/D converter all has an interface that is connected with sensor;
Said system motherboard and collection daughter board can adopt four layer printed circuit boards with independent bus plane and ground plane.
The total control circuit of above-mentioned single-chip microcomputer is a complex programmable logic device (CPLD) (ComplexProgrammable Logic Device) of realizing that signal drives.
Above-mentioned power supply can be a battery.
The wave point that can be connected with Computer signal in addition on the said system motherboard.
Compared with prior art the utlity model has following characteristics and beneficial effect:
The utility model can be realized the purpose of hyperchannel, high precision, high-speed synchronous signals collecting, has remedied that existing Data Acquisition Channel number is few, precision is low, each passage is difficult to synchronous deficiency.This collector is used with data acquisition software MHHC-O software and can realizes on-the-spot test, real time record, storage, demonstration test data and curve plotting etc. in addition.
The utility model has overcome that traditional collector port number is less, and the A/D conversion accuracy is lower, and the shortcoming that the triggering form is single has solved the technical matters of collector multi-channel high-accuracy high-speed synchronous acquired signal and deal with data.
The utility model adopts the card insert type structure, and collector is made of system board and collection daughter board, and 16 decks are arranged on the system board, can insert one respectively and gather daughter board, gathering on the daughter board for every has 16 road A/D ALT-CH alternate channels, thereby makes this collector can reach 256 passages, and is convenient to expansion and maintenance.Adopt single-chip microcomputer to carry out master control on the system board, and adopt CPLD that signal is driven, thereby guarantee that signal can correctly be transferred to each circuit unit on the collection daughter board.In order to reach high-precision requirement, not only selected 24 high-precision a/d converter for use, also taked following measure: select for use extremely low noise power supply chip to reduce system noise, select for use voltage reference source that very high degree of precision and minimum temperature float as the A/D transfer standard, select for use the high-quality tantalum electric capacity of low ESR to come filtering noise, the input simulating signal is carried out program control amplification and filtering, simulation part and numerical portion are separated and floor file respectively in the PCB design, adopt to have four layers of PCB of independent ground plane and bus plane to reduce ground wire and power lead impedance.Each passage of this collector all adopts independently A/D converter, and gathers with FPGA control, the characteristics that made full use of the FPGA high speed, walk abreast, thus realized that all passage high-speed synchronous ground have carried out data acquisition.Adopt powered battery, battery inserts by system board, gathers daughter board by gang socket power taking from the system board.The input simulating signal inserts by the aviation plug on the cabinet, be linked into each collection daughter board to inner by winding displacement, in gathering daughter board, carry out A/D conversion back and data transmission is arrived system board, and be transferred to computing machine by the serial ports on the system board, USB or ZigBee wave point by gang socket.
The utility model carries out synchronous data collection by 24 A/D converters of FPGA control hyperchannel, it is characterized in that: a system board and a plurality of collection daughter board are arranged, system board is connected by socket with the collection daughter board, there is a CPLD to realize that signal drives on the system board, gathering has a FPGA to realize parallel control on the daughter board, gathering on the daughter board for every has a plurality of independently 24 A/D ALT-CH alternate channels.
The utility model adopts powered battery, and battery inserts by system board, gathers daughter board by gang socket power taking from the system board; The input simulating signal inserts by the aviation plug on the cabinet, be linked into each collection daughter board to inner by winding displacement, in gathering daughter board, carry out A/D conversion back and data transmission is arrived system board, and be transferred to computing machine by the serial ports on the system board, USB or ZigBee wave point by gang socket.
System board and collection daughter board PCB adopt four laminates, have independent bus plane and ground plane.
The use that can match with data acquisition software MHHC-O of this collector.Like this, directly connect required sensor, computer realization on-the-spot test according to user's needs, data acquisition software MHHC-O software can reach computing machine with the setting of instrument by the RS232 interface simultaneously, in the time of test measurement data is reached Computer Storage.Also data in real time can be presented on the screen of computing machine.MHHC-O software can also be realized the remote control of computing machine to collector, by software instrument is provided with, and carries out operations such as data recording, can accomplish real-time video data or curve plotting etc.
The utility model can be used as the platform of various instrument research and development, it has one or many and triggers the characteristics that hyperchannel (having 256 passages also can expand) receives synchronously, have time, threshold value, the external world, multiple triggering form such as manual, possess the characteristics that hyperchannel, high precision, high-speed synchronous receive.Native system is made every effort to standardization, versatility when design, therefore can be used for other science detection range.
The utility model can be widely used in the earthquake record; The test of mine vibrations, the vibration of water conservancy project dam structure; The vibration-testing of road and bridge structural vibration and pulse of the earth signal; Precision temperature, moisture measurement, structure comfort test; Small-signal such as geology, sonar collection analysis; Electric power signal is gathered, frequency analysis; Geophysical logging, peg, sound wave and ultrasound wave, vibration monitoring, electromagnetic surveying, seismic method are surveyed and various industrial input collection.
Description of drawings
The utility model is described in more detail below in conjunction with accompanying drawing.
Fig. 1 is a system board modular structure block diagram.
Fig. 2 gathers daughter board modular structure block diagram.
Embodiment
Embodiment is referring to shown in Figure 1, and a kind of multi-channel synchronous signal picker is formed by connecting by system board and 16 collection daughter board plug-in cards, gathers daughter board and is communicated with power taking by gang socket with system board.System board and collection daughter board adopt four layer printed circuit boards with independent bus plane and ground plane.Gathering the daughter board front has 8 independently A/D ALT-CH alternate channels, and also there are 8 independently A/D ALT-CH alternate channels at the back side.A FPGA, SDRAM, sensor interface and a socket that is connected with system board are arranged.The input simulating signal inserts from sensor interface, carries out analog to digital conversion by each A/D ALT-CH alternate channel under the control of FPGA, and data storage is transferred to system board with data by socket when receiving data transfer command in SDRAM.
The total control circuit of single-chip microcomputer, power supply, power light, serial ports, USB interface and wave point are arranged on the system board, the total control circuit of single-chip microcomputer is connected with deck with 16 by control/data bus, the total control circuit of single-chip microcomputer is connected with a USB controller signals, the USB controller be connected computer by serial and be connected with USB interface.The total control circuit of above-mentioned single-chip microcomputer is a complex programmable logic device (CPLD) of realizing that signal drives.Above-mentioned power supply be battery or.
Referring to shown in Figure 2, system board has a single-chip microcomputer, a CPLD, a crystal oscillator, serial ports, USB and a ZigBee interface.Computing machine sends to system board by serial ports, USB or ZigBee interface with order, and system board arrives computing machine by serial ports, USB or ZigBee interface with data transmission.
Gather daughter board for every a gang socket that is connected with system board is arranged, also has a field programmable gate array circuit FPGA, field programmable gate array circuit FPGA is connected with a Synchronous Dynamic Random Access Memory SDRAM signal by parallel bus, field programmable gate array circuit FPGA has a signal input, by this signal input through spi bus with 16 independently the A/D converter signal be connected, gather for 16 and form 256 simulating signal input channels on the daughter board, each A/D converter all has an interface that is connected with sensor.24 high precision, low-power consumption A/D conversion chip ADS1255 that A/D converter can adopt TI company to produce, the wave point that can be connected with Computer signal in addition on the said system motherboard.
Main performance index of the present utility model:
Sampling rate: 2.5HZ~30KHZ;
A/D resolution: 24Bit high precision, low-power consumption A/D;
Input voltage range: but 0~5V, 0~10V, ± 5V, ± the 10V software setting;
Analog input channel: 16~256 passages can combination in any, and can expand, and maximum can reach 1024 passages;
Input impedance:〉1M Ω;
Sampling precision:<1uV;
Buffer memory capacity: 1MB/ passage;
Programme-controlled gain: 1,2,4,8,16,32,64 times;
Working temperature :-20~40 ℃;
Operating voltage: 6~12V;
The output data interface of standard: Segy formatted file;
Triggering mode; Wireless trigger, threshold triggers, STA/LTA trigger, STA-LTA touches, Time Triggered, procedure triggers (instantaneous acquiring);
Communication interface: serial ports, USB1.1 standard interface, ZigBee wave point;
Instrument box: 300 * 280 * 250mm; High-speed channel quantity can be selected, and cabinet can customize.
Gather daughter board, instrument system motherboard and battery and can be encapsulated in the cabinet, sensor interface and computer interface are arranged on the cabinet, be connected with computing machine with sensor.Data transmission can show each passage waveform by supporting acquisition software behind computing machine, can also store and analyze data.

Claims (5)

  1. [claim 1] a kind of multi-channel synchronous signal picker is characterized in that: be formed by connecting by system board and 16 collection daughter board plug-in cards, gather daughter board and be communicated with power taking by gang socket with system board;
    The total control circuit of single-chip microcomputer, power supply, power light, serial ports, USB interface and wave point are arranged on the system board, the total control circuit of single-chip microcomputer is connected with 16 decks by control/data bus, the total control circuit of single-chip microcomputer is connected with a USB controller signals, the USB controller be connected computer by serial and be connected with USB interface;
    Gather daughter board for every a gang socket that is connected with system board is arranged, also has a field programmable gate array circuit FPGA, field programmable gate array circuit FPGA is connected with a Synchronous Dynamic Random Access Memory SDRAM signal by parallel bus, field programmable gate array circuit FPGA has a signal input, by this signal input through spi bus with 16 independently the A/D converter signal be connected, gather for 16 and form 256 simulating signal input channels on the daughter board, each A/D converter all has an interface that is connected with sensor.
  2. [claim 2] multi-channel synchronous signal picker according to claim 1 is characterized in that: system board and collection daughter board adopt four layer printed circuit boards with independent bus plane and ground plane.
  3. [claim 3] multi-channel synchronous signal picker according to claim 1 is characterized in that: the total control circuit of above-mentioned single-chip microcomputer is a complex programmable logic device (CPLD) of realizing that signal drives.
  4. [claim 4] multi-channel synchronous signal picker according to claim 1, it is characterized in that: above-mentioned power supply is a battery.
  5. [claim 5] multi-channel synchronous signal picker according to claim 1 is characterized in that: the wave point that can be connected with Computer signal is arranged on the said system motherboard.
CNU2008203019813U 2008-08-29 2008-08-29 Multichannel synchronized signal collection device Expired - Lifetime CN201247061Y (en)

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Application Number Priority Date Filing Date Title
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Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102042000A (en) * 2009-10-12 2011-05-04 西安威尔罗根能源科技有限公司 Multichannel AD (Analog-to-Digital) concurrent conversion acoustic logger
CN103077258A (en) * 2012-12-30 2013-05-01 陕西海泰电子有限责任公司 Synchronous data acquisition card (DAC) with high speed
CN105844887A (en) * 2016-04-26 2016-08-10 中国石油大学(华东) 32-bit three-channel synchronous data acquisition device with wireless ad-hoc network function
CN106094025A (en) * 2016-06-23 2016-11-09 中国石油集团钻井工程技术研究院 A kind of signals collecting measured for VSP during drilling and storage device
CN108257446A (en) * 2018-03-29 2018-07-06 南昌墨泥软件有限公司 A kind of primary and secondary structure and the analog drive signal system for connecting film matrix keyboard
CN108269452A (en) * 2018-03-29 2018-07-10 南昌墨泥软件有限公司 One kind is based on primary and secondary structure and integrates encrypted analog drive signal processing system
CN108869331A (en) * 2018-05-04 2018-11-23 江苏欣皓测试技术有限公司 A kind of centrifugal pump vibration data acquisition device
CN113485634A (en) * 2021-07-05 2021-10-08 中国科学技术大学先进技术研究院 Signal acquisition device, data transmission method and signal reading device

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102042000A (en) * 2009-10-12 2011-05-04 西安威尔罗根能源科技有限公司 Multichannel AD (Analog-to-Digital) concurrent conversion acoustic logger
CN103077258A (en) * 2012-12-30 2013-05-01 陕西海泰电子有限责任公司 Synchronous data acquisition card (DAC) with high speed
CN103077258B (en) * 2012-12-30 2016-01-20 陕西海泰电子有限责任公司 High-speed synchronous data acquiring card
CN105844887A (en) * 2016-04-26 2016-08-10 中国石油大学(华东) 32-bit three-channel synchronous data acquisition device with wireless ad-hoc network function
CN105844887B (en) * 2016-04-26 2017-06-23 中国石油大学(华东) A kind of 32 triple channel synchronous data collection devices with wireless self-networking function
CN106094025A (en) * 2016-06-23 2016-11-09 中国石油集团钻井工程技术研究院 A kind of signals collecting measured for VSP during drilling and storage device
CN108257446A (en) * 2018-03-29 2018-07-06 南昌墨泥软件有限公司 A kind of primary and secondary structure and the analog drive signal system for connecting film matrix keyboard
CN108269452A (en) * 2018-03-29 2018-07-10 南昌墨泥软件有限公司 One kind is based on primary and secondary structure and integrates encrypted analog drive signal processing system
CN108869331A (en) * 2018-05-04 2018-11-23 江苏欣皓测试技术有限公司 A kind of centrifugal pump vibration data acquisition device
CN113485634A (en) * 2021-07-05 2021-10-08 中国科学技术大学先进技术研究院 Signal acquisition device, data transmission method and signal reading device
CN113485634B (en) * 2021-07-05 2024-04-05 合肥中科采象科技有限公司 Signal acquisition device, data transmission method and signal reading device

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Granted publication date: 20090527

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