CN204856469U - General signal acquisition driver - Google Patents
General signal acquisition driver Download PDFInfo
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- CN204856469U CN204856469U CN201520450298.6U CN201520450298U CN204856469U CN 204856469 U CN204856469 U CN 204856469U CN 201520450298 U CN201520450298 U CN 201520450298U CN 204856469 U CN204856469 U CN 204856469U
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Abstract
The utility model provides a general signal acquisition driver can provide signal excitation function to can carry out contrastive analysis to equipment under test's response, thereby improve test equipment's logic analysis level, improve maintenance efficiency. Every of this general signal acquisition driver gather the excitation card including main control unit and the collection front end module, acquisition and storage module, the excitation output module that are connected with main control unit respectively, encourage storage module and upper interface module, the input circuit who gathers in the front end module encourages the collection input that blocks as gathering, output protection circuit among the excitation output module is as the excitation output of gathering the excitation card, gathering the data that the collection of front end module obtained and sending into the acquisition and storage module, main control unit sends into excitation storage module through data transmission to the host computer of upper interface module with the record, the excitation waveform data that main control unit sent simultaneously, will encourage data output according to the control signal who comes from main control unit through excitation output module again.
Description
Technical field
The utility model relates to a kind of testing apparatus (circuit structure) with collection and incentive functions.
Background technology
Get more and more for kind at present, the various equipment under tests that technique becomes increasingly complex, the testing apparatus of function singleness (only for single known type) has been difficult to adapt to need of work, therefore along with the development of measuring technology and the appearance of all kinds equipment under test, require while signal processing and analysis is carried out to equipment under test, also can realize the analysis to its logic function.General testing apparatus only has signal processing and analysis function, cannot provide signal incentive functions, can not be analyzed the logic function of equipment under test, therefore just brings very large difficulty to the function knowing equipment under test well.
Utility model content
In order to solve above-mentioned prior art Problems existing, the utility model provides a kind of universal signal and gathers driver, signal incentive functions can be provided, and can be analyzed the response of equipment under test, thus change Passive Test is active testing, improve the logic analysis level of testing apparatus, improve maintenance efficiency.
Scheme of the present utility model is as follows:
Universal signal gathers driver, comprise at least one piece and gather incentive card, described collection incentive card comprises master controller and the collection front-end module be connected with master controller respectively, gathers memory module, encourages output module, encourages memory module and upper interface module; Described collection front-end module is primarily of the input circuit connected successively, comparer, DAC change-over circuit composition, and wherein input circuit is as the Gather and input end gathering incentive card; Described excitation output module is primarily of pumping signal latch cicuit and output protection circuit composition, and wherein output protection circuit is as the excitation output terminal gathering incentive card; Gather the data feeding collection memory module that front-end module collects, the data of record are transferred to host computer by upper interface module by master controller simultaneously, the excitation waveform data that master controller sends send into excitation memory module, then are exported by excited data by excitation output module according to the control signal carrying out autonomous controller.
On the basis of above scheme, the utility model also does following optimization to circuit structure further:
Gather on incentive card and also have additional excitation collection clock control module, this excitation gathers clock control module and master controller, gathers front-end module is connected and encourage output module all to have connection, connects and encourage the corresponding output collection clock of output module and encourage clock respectively to collection front-end module.
Gather in front-end module and be provided with acquisition buffer device between comparer and DAC change-over circuit; Also Stimulus Buffer is provided with in excitation output module.
Upper interface module adopts PCIE interface.
Gather incentive card and also comprise trigger control module, respectively with master controller, gathers front-end module and gathers memory module and be connected, for configuring the condition of collection beginning, thus make collection more flexibility.
Collection memory module comprises collection memory controller and acquired data storage device, by gathering the Implementing Memory Controllers normal storage memory module different with advanced storage two kinds.
The utility model has following beneficial effect:
Circuit structure is simple and clear, can arrange the collection incentive card of more than four pieces, and greatly, every platform universal signal collection driver can provide and be no less than 256 collections, excitation passage for acquisition channel and excitation number of channels.
By to measured piece output drive signal, change Passive Test is active testing.
The synchronous execution encouraging and gather can be realized, be convenient to two groups of data to be analyzed.
Utilize and gather memory controller, can store in advance collection signal, and the advanced step number that stores can be established.
Adopt PCIE technology to realize gathering the data transmission of incentive card, signal is stable at a high speed.
Accompanying drawing explanation
Fig. 1 is general collection exciter system structural representation of the present utility model.
Fig. 2 is the structural representation gathering incentive card in the utility model.
Embodiment
As shown in Figure 1, universal signal collection driver gathers incentive cards by four pieces and forms, and often opens card and comprises 64 acquisition channels and 64 excitation passages, four card common formation 256 acquisition channels and 256 excitation passages.Four cards are connected with PC respectively by 4 road PCIE interfaces.
Gather incentive card structure as shown in Figure 2, its input and output interface connects output and the input interface of measured piece respectively.Gather each main modular (circuit) in incentive card to run according to following mode of operation:
One, the collection front-end module gathering incentive card carries out data acquisition to measured piece.This module comprises DAC modular converter, comparator module and input circuit module.
Two, collection memory module is entered by gathering the signal sent here of front-end module, with synchronously carrying out of realizing that data acquisition and data store.This module is by gathering memory controller and acquired data storage device forms, and data storage is divided into normal storage and stores two kinds in advance.
Three, while image data, master controller realization condition judges (trigger pip that namely in Fig. 2, " trigger control module " sends) and starts to record image data;
Four, after the whole collection completing data and storage work, then by upper interface module, the data collected are transferred to host computer (PC) and carry out storing, process and analyzing.
The signals collecting function of above step completion system.
Five, after settling signal acquisition tasks, can send excitation waveform data to excitation memory module, this module is made up of excited data storer and excitation memory controller two functional blocks, according to control signal and clock signal, can send data to excitation passage;
Six, by excitation output module (realizing mainly through " Stimulus Buffer " in Fig. 2 and " output state "), excited data is outputted to the input end of measured piece.This module comprises output latch and output protection circuit two parts;
Seven, send after excited data to measured piece, then carry out signals collecting to measured piece and obtain synchronous image data, user can carry out labor to these data.
Gathering on incentive card and also comprise an excitation collection clock control module, gathering clock and excitation clock for exporting, and under " excitation-collection " pattern, complete synchronization motivationtheory clock and the work gathering clock, prevent the situation that excitation misplaces with collection; Complete the work of synchronous internal clock (clock of FPGA inside) and external clock (clock of measured piece), improve the clock drift phenomenon in gatherer process.
Claims (6)
1. universal signal gathers driver, it is characterized in that: comprise at least one piece and gather incentive card, described collection incentive card comprises master controller and the collection front-end module be connected with master controller respectively, gathers memory module, encourages output module, encourages memory module and upper interface module; Described collection front-end module is primarily of the input circuit connected successively, comparer, DAC change-over circuit composition, and wherein input circuit is as the Gather and input end gathering incentive card; Described excitation output module is primarily of pumping signal latch cicuit and output protection circuit composition, and wherein output protection circuit is as the excitation output terminal gathering incentive card; Gather the data feeding collection memory module that front-end module collects, the data of record are transferred to host computer by upper interface module by master controller simultaneously, the excitation waveform data that master controller sends send into excitation memory module, then are exported by excited data by excitation output module according to the control signal carrying out autonomous controller.
2. universal signal according to claim 1 gathers driver, it is characterized in that: described collection incentive card also comprises excitation and gathers clock control module, this excitation gathers clock control module and master controller, gathers front-end module is connected and encourage output module all to have connection, connects and encourage the corresponding output collection clock of output module and encourage clock respectively to collection front-end module.
3. universal signal according to claim 1 gathers driver, it is characterized in that: be provided with acquisition buffer device between comparer and DAC change-over circuit in described collection front-end module; Also Stimulus Buffer is provided with in described excitation output module.
4. universal signal according to claim 1 gathers driver, it is characterized in that: described upper interface module adopts PCIE interface.
5. universal signal according to claim 1 gathers driver, it is characterized in that: described collection incentive card also comprises trigger control module, respectively with master controller, gathers front-end module and gathers memory module and be connected, for configuring the condition of collection beginning.
6. universal signal according to claim 1 gathers driver, it is characterized in that: described collection memory module comprises collection memory controller and acquired data storage device, by gathering the Implementing Memory Controllers normal storage memory module different with advanced storage two kinds.
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108255657A (en) * | 2018-01-16 | 2018-07-06 | 中国北方车辆研究所 | Hardware reconfiguration signal driving source and the software layout method based on its realization |
CN109656152A (en) * | 2018-12-25 | 2019-04-19 | 西安翔迅科技有限责任公司 | One kind being based on numerically controlled engine import/exhaust door actuator emulation component system and method |
-
2015
- 2015-06-26 CN CN201520450298.6U patent/CN204856469U/en active Active
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108255657A (en) * | 2018-01-16 | 2018-07-06 | 中国北方车辆研究所 | Hardware reconfiguration signal driving source and the software layout method based on its realization |
CN109656152A (en) * | 2018-12-25 | 2019-04-19 | 西安翔迅科技有限责任公司 | One kind being based on numerically controlled engine import/exhaust door actuator emulation component system and method |
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