CN103116054A - Isolation voltage acquisition circuit - Google Patents

Isolation voltage acquisition circuit Download PDF

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Publication number
CN103116054A
CN103116054A CN2013100294937A CN201310029493A CN103116054A CN 103116054 A CN103116054 A CN 103116054A CN 2013100294937 A CN2013100294937 A CN 2013100294937A CN 201310029493 A CN201310029493 A CN 201310029493A CN 103116054 A CN103116054 A CN 103116054A
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China
Prior art keywords
connects
chip
pin
voltage
voltage source
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Pending
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CN2013100294937A
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Chinese (zh)
Inventor
何斌
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Tianjin Santroll Electric Automobile Technology Co Ltd
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Tianjin Santroll Electric Automobile Technology Co Ltd
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Priority to CN2013100294937A priority Critical patent/CN103116054A/en
Publication of CN103116054A publication Critical patent/CN103116054A/en
Pending legal-status Critical Current

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Abstract

The invention discloses an isolation voltage acquisition circuit which comprises an AD (analog-digital) conversion chip U1, a digital isolation coupling chip U2, and a single-chip microcomputer U3. A plurality of analog signals are connected to the AD conversion chip. The single-chip microcomputer U3 sends a command from the digital isolation coupling chip U2 to the AD conversion chip U1. The AD conversion chip U1 selects a certain analog signal to be sampled according to the command, converts the analog signal into a digital signal, and transmits the converted digital signal to the digital isolation coupling chip U2, and the signal is output to the voltage acquisition end single-chip microcomputer U3 for voltage sampling by means of digital isolation coupling. The isolation voltage acquisition circuit high in acquisition precision and uniformity and lower in cost is provided to overcome the defects of poor uniformity, low precision and high cost in the existing analog isolation coupling circuit.

Description

A kind of isolation voltage Acquisition Circuit
Technical field
The invention belongs to the voltage acquisition field, be specifically related to a kind of isolation voltage sample circuit that adopts digital isolation coupling mode.
Background technology:
in electronic circuit, for large voltage, the collection of large electric current etc., usually need to accomplish Acquisition Circuit and by electrical isolation between Acquisition Circuit, this gathers with regard to needs isolation Acquisition Circuit, by the isolation acquisition chip, complete Acquisition Circuit and by the power end of Acquisition Circuit with reference to the electrical isolation of ground end, traditional isolation sample circuit is to realize the isolation sampling by simulation isolation coupling chip, not fixed value due to the coupling multiple of simulation isolation coupling chip but be probable value in an interval, coupling output is also a probable value in the interval, rather than fixed value that can anticipation, therefore adopt the circuit consistance of simulation isolation coupling chip relatively poor.in the production of reality, adopt two products of the same circuit structure of simulation coupling chip, the result of voltage acquisition is but not identical, each product is many calibrations again that will carrying out property circuit parameter in process of production, to guarantee the consistance of each properties of product and parameter, this production efficiency that has just reduced greatly product has also reduced the performance of product, poor and then cause the voltage acquisition precision of product not high due to consistance, and the cost of simulation isolation acquisition chip is higher, also further embodied its drawback in high volume production process, therefore tradition isolation Acquisition Circuit need to be improved design.
Summary of the invention:
The objective of the invention is to overcome deficiency of the prior art, by using the AD chip that simulating signal is transformed digital signal, and then carry out isolation coupling by digital isolation coupling chip, and then realize the isolation collection of voltage, thereby provide a kind of circuit high conformity, precision is high, cost is low isolation sampling A/D chip.
Its technical scheme is:
Comprise AD conversion chip U1, digital isolation coupling chip U2, single-chip microcomputer U3; Some roads simulating signal access AD conversion chip U1, single-chip microcomputer U3 sends instruction through digital isolation coupling chip U2 to AD conversion chip U1, AD conversion chip U1 is according to a certain road simulating signal of the required sampling of Instruction Selection and be converted into digital signal, the digital signal that is converted to is exported to digital isolation coupling chip U2, the single-chip microcomputer U3 that the mode by digital isolation coupling exports the voltage acquisition end to carries out voltage acquisition again.
One end of the first resistance R 1 connects the FS pin of the U1 of the first voltage source V CC1, other end connection AD conversion chip; One end of the first capacitor C 1 connects the VCC pin of the first voltage source V CC1, AD conversion chip, and another termination first is with reference to ground GND1; One end of the second resistance R 2 connects the first voltage source V CC1, and the other end connects the INT pin of AD conversion chip U1; One end of the 3rd resistance R 3 connects the first voltage source V CC1, and the other end connects the PWDN pin of AD conversion chip U1; One end of the 4th resistance R 4 connects the first voltage source V CC1, and the other end connects the CSTART pin of AD conversion chip U1; One end of the 5th resistance R 5 connects the first voltage source V CC1, and the other end connects the VREF+ pin of AD conversion chip U1; One end of the 6th resistance R 6 connects the first voltage source V CC1, and the other end connects the SDO pin of AD conversion chip U1; The VREF-pin of AD conversion chip U1 connects first with reference to ground GND1; The GDN pin of AD conversion chip U1 connects first with reference to ground GND1; The VREF+ pin of AD conversion chip U1 connects an end of the 8th resistance R 8, the negative electrode of voltage reference source T1, the other end of the 8th resistance R 8 connects the reference utmost point of voltage reference source T1, an end of the 9th resistance R 9, the other end of the 9th resistance R 9 connects first with reference to ground GND1, and the anode of voltage reference source T1 connects first with reference to ground GND1; Some roads simulating signal connects the analog input pin of AD conversion chip U1 separately; The SDI pin of AD conversion chip U1 connects the OUTA pin of digital isolation coupling chip U2; The SCLK pin of AD conversion chip U1 connects the OUTB pin of digital isolation coupling chip U2; The CS pin of AD conversion chip U1 connects the OUTC pin of digital isolation coupling chip U2; The SDO pin of AD conversion chip U1 connects the IND pin of digital isolation coupling chip U2; One end of the 7th resistance R 7 connects the first voltage source V CC1, and the other end connects the EN2 pin of digital isolation coupling chip U2; The VCC1 pin of numeral isolation coupling chip U2 connects second voltage source VCC2; The VCC2 pin of numeral isolation coupling chip U2 connects an end of the first voltage source V CC1, the second capacitor C 2, another termination first reference ground GND1 of the second capacitor C 2; The GND2 pin of numeral isolation coupling chip U2 connects first with reference to ground GDN1; The VCC1 pin of numeral isolation coupling chip U2 connects an end of second voltage source VCC2, the 3rd capacitor C 3, and another termination second of the 3rd capacitor C 3 is with reference to ground GDN2; INA pin, INB pin, INC pin, the OUTD of numeral isolation coupling chip U2 is connected to four pins of single-chip microcomputer U3 separately; The GND1 pin of numeral isolation coupling chip U2 connects second with reference to ground GDN2; One end of the tenth resistance R 10 connects second voltage source VCC2, and the other end connects the EN1 pin of digital isolation coupling chip U2; One end of the 11 resistance R 11 connects second voltage source VCC2, and the other end connects the INC pin of digital isolation coupling chip U2; One end of the 12 resistance R 12 connects second voltage source VCC2, and the other end connects the INB pin of digital isolation coupling chip U2; One end of the 13 resistance R 13 connects second voltage source VCC2, and the other end connects the INA pin of digital isolation coupling chip U2.
Some roads simulating signal is voltage signal to be collected.
The mxm. of the operating voltage of numeral isolating chip U2 is the large value in the voltage of the voltage of the first voltage source V CC1 and second voltage source VCC2, and the minimum of operating voltage is the medium and small value of voltage of voltage and the second voltage source VCC2 of the first voltage source V CC1.
Electrical isolation between the first voltage source V CC1 and second voltage source VCC2; Described first with reference to electrical isolation between ground GND1 and the second reference ground GND2.
Some roads simulating signal access AD conversion chip U1, single-chip microcomputer U3 sends instruction to AD sampling A/D chip U1 selection one tunnel simulating signal and carries out simulating signal to the conversion of digital signal, the processing time of the signal of the command time of single-chip microcomputer U3 and AD conversion chip U1 conversion each time, single-chip microcomputer U3 realized that by continuous transmission instruction AD conversion chip U1 is to the voltage transitions of some roads simulating signal at Microsecond grade.
Than traditional isolation voltage Acquisition Circuit, the present invention has significant advantage and beneficial effect, is embodied as:
1. this isolation voltage Acquisition Circuit adopts the AD conversion chip that analog voltage signal is converted to digital signal, the precision of the conversion of AD conversion chip is high and without the consistance defective, can guarantee simultaneously consistance and the precision of circuit, circuit and then carry out isolation coupling by digital isolation coupling chip, the coupling multiple of numeral isolation coupling chip is fixed value, so precision and consistance are good, further guaranteed consistance and the precision of voltage acquisition.
2. the manufacturing cost sum of the digital isolation coupling chip of this isolation voltage Acquisition Circuit employing and AD conversion chip is significantly less than the manufacturing cost of simulation coupling chip, thereby has reduced the production cost of this isolation Acquisition Circuit.
3. traditional simulation isolation acquisition mode, isolate the input end of acquisition chip and usually can only support one tunnel input, therefore will realize that the plurality of voltages collection needs a plurality of simulation isolating chips due to simulation; And because the AD conversion chip has a plurality of analog signal interfaces, by multichannel voltage signal access to be collected AD conversion chip, send continuously the voltage isolation collection that just can realize multichannel for the routing instruction of some roads voltage signal to be collected by single-chip microcomputer again, thereby further simplified circuit and reduced the manufacturing cost of circuit.
Description of drawings
Fig. 1 is the circuit structure diagram of isolation voltage Acquisition Circuit of the present invention.
Embodiment
Narrate the specific embodiment of the present invention below in conjunction with accompanying drawing; below in conjunction with accompanying drawing, the embodiment of the present invention is further described; below just exemplary about the description of embodiments of the present invention; the claimed theme that is not meant to limit the present invention; other variations in the claim protection domain for embodiment described in the invention also exists all belong to the theme that will protect required for the present invention.
As accompanying drawing 1, U1 is that AD conversion chip, U2 are that digital isolation coupling chip, U3 are single-chip microcomputer, some roads simulating signal access AD conversion chip U1, single-chip microcomputer U3 sends instruction through digital isolation coupling chip U2 to AD conversion chip U1, AD conversion chip U1 is according to a certain road simulating signal of the required sampling of Instruction Selection and be converted into digital signal, the digital signal that is converted to is exported to digital isolation coupling chip U2, the single-chip microcomputer U3 that the mode by digital isolation coupling exports the voltage acquisition end to carries out voltage acquisition again.
One end of the first resistance R 1 connects the FS pin of the U1 of the first voltage source V CC1, other end connection AD conversion chip; One end of the first capacitor C 1 connects the VCC pin of the first voltage source V CC1, AD conversion chip, and another termination first is with reference to ground GND1; One end of the second resistance R 2 connects the first voltage source V CC1, and the other end connects the INT pin of AD conversion chip U1; One end of the 3rd resistance R 3 connects the first voltage source V CC1, and the other end connects the PWDN pin of AD conversion chip U1; One end of the 4th resistance R 4 connects the first voltage source V CC1, and the other end connects the CSTART pin of AD conversion chip U1; One end of the 5th resistance R 5 connects the first voltage source V CC1, and the other end connects the VREF+ pin of AD conversion chip U1; One end of the 6th resistance R 6 connects the first voltage source V CC1, and the other end connects the SDO pin of AD conversion chip U1; The VREF-pin of AD conversion chip U1 connects first with reference to ground GND1; The GDN pin of AD conversion chip U1 connects first with reference to ground GND1; The VREF+ pin of AD conversion chip U1 connects an end of the 8th resistance R 8, the negative electrode of voltage reference source T1, the other end of the 8th resistance R 8 connects the reference utmost point of voltage reference source T1, an end of the 9th resistance R 9, the other end of the 9th resistance R 9 connects first with reference to ground GND1, and the anode of voltage reference source T1 connects first with reference to ground GND1; Some roads simulating signal connects the analog input pin of AD conversion chip U1 separately; The SDI pin of AD conversion chip U1 connects the OUTA pin of digital isolation coupling chip U2; The SCLK pin of AD conversion chip U1 connects the OUTB pin of digital isolation coupling chip U2; The CS pin of AD conversion chip U1 connects the OUTC pin of digital isolation coupling chip U2; The SDO pin of AD conversion chip U1 connects the IND pin of digital isolation coupling chip U2; One end of the 7th resistance R 7 connects the first voltage source V CC1, and the other end connects the EN2 pin of digital isolation coupling chip U2; The VCC1 pin of numeral isolation coupling chip U2 connects second voltage source VCC2; The VCC2 pin of numeral isolation coupling chip U2 connects an end of the first voltage source V CC1, the second capacitor C 2, another termination first reference ground GND1 of the second capacitor C 2; The GND2 pin of numeral isolation coupling chip U2 connects first with reference to ground GDN1; The VCC1 pin of numeral isolation coupling chip U2 connects an end of second voltage source VCC2, the 3rd capacitor C 3, and another termination second of the 3rd capacitor C 3 is with reference to ground GDN2; INA pin, INB pin, INC pin, the OUTD of numeral isolation coupling chip U2 is connected to four pins of single-chip microcomputer U3 separately; The GND1 pin of numeral isolation coupling chip U2 connects second with reference to ground GDN2; One end of the tenth resistance R 10 connects second voltage source VCC2, and the other end connects the EN1 pin of digital isolation coupling chip U2; One end of the 11 resistance R 11 connects second voltage source VCC2, and the other end connects the INC pin of digital isolation coupling chip U2; One end of the 12 resistance R 12 connects second voltage source VCC2, and the other end connects the INB pin of digital isolation coupling chip U2; One end of the 13 resistance R 13 connects second voltage source VCC2, and the other end connects the INA pin of digital isolation coupling chip U2.
Some roads simulating signal is voltage signal to be collected.
The mxm. of the operating voltage of numeral isolating chip U2 is the large value in the voltage of the voltage of the first voltage source V CC1 and second voltage source VCC2, and the minimum of operating voltage is the medium and small value of voltage of voltage and the second voltage source VCC2 of the first voltage source V CC1.
Electrical isolation between the first voltage source V CC1 and second voltage source VCC2; Described first with reference to electrical isolation between ground GND1 and the second reference ground GND2.
The pin that has annexation between single-chip microcomputer U3 and digital isolation coupling chip U2 is that SDO pin or I/O pin all can, and the fundamental characteristics of the above-mentioned pin of single-chip microcomputer is known by those skilled in the art, be illustrative simplicity, the concrete pinout of single-chip microcomputer U3 does not indicate.
some roads simulating signal access AD conversion chip U1, show as in the drawings IN1, IN2, IN3, some roads such as IN4 signal is connected to the analog input pin A0 of AD chip U1 separately, A1, A2, the pins such as A3, the concrete way of simulating signal is determined by the way of the simulating signal of required collection in actual conditions, therefore indicate with suspension points in the drawings, single-chip microcomputer U3 sends instruction to AD sampling A/D chip U1 selection one tunnel simulating signal and carries out simulating signal to the conversion of digital signal, the processing time of the signal of the command time of single-chip microcomputer U3 and AD conversion chip U1 conversion each time is at Microsecond grade, single-chip microcomputer U3 realizes that by continuous transmission instruction AD conversion chip U1 is to the voltage transitions of some roads simulating signal.
The isolation coupling mode that isolation coupling chip U2 is is optically-coupled or magnetic coupling.
For being one exemplary embodiment of the present invention; should be understood to is wherein a certain demonstrative example in the protection domain of claims of the present invention; have the directiveness effect that those skilled in the art is realized corresponding technical scheme, but not limitation of the invention.

Claims (6)

1. isolation voltage Acquisition Circuit, comprise AD conversion chip U1, digital isolation coupling chip U2, single-chip microcomputer U3, it is characterized in that: some roads simulating signal access AD conversion chip U1, single-chip microcomputer U3 sends instruction through digital isolation coupling chip U2 to AD conversion chip U1, AD conversion chip U1 is according to a certain road simulating signal of the required sampling of Instruction Selection and be converted into digital signal, the digital signal that is converted to is exported to digital isolation coupling chip U2, the single-chip microcomputer U3 that the mode by digital isolation coupling exports the voltage acquisition end to carries out voltage acquisition again.
2. isolation voltage Acquisition Circuit according to claim 1, is characterized in that: the FS pin that end connection first a voltage source V CC1 of described the first resistance R 1, the other end connect the U1 of AD conversion chip; One end of the first capacitor C 1 connects the VCC pin of the first voltage source V CC1, AD conversion chip, and another termination first is with reference to ground GND1; One end of the second resistance R 2 connects the first voltage source V CC1, and the other end connects the INT pin of AD conversion chip U1; One end of the 3rd resistance R 3 connects the first voltage source V CC1, and the other end connects the PWDN pin of AD conversion chip U1; One end of the 4th resistance R 4 connects the first voltage source V CC1, and the other end connects the CSTART pin of AD conversion chip U1; One end of the 5th resistance R 5 connects the first voltage source V CC1, and the other end connects the VREF+ pin of AD conversion chip U1; One end of the 6th resistance R 6 connects the first voltage source V CC1, and the other end connects the SDO pin of AD conversion chip U1; The VREF-pin of AD conversion chip U1 connects first with reference to ground GND1; The GDN pin of AD conversion chip U1 connects first with reference to ground GND1; The VREF+ pin of AD conversion chip U1 connects an end of the 8th resistance R 8, the negative electrode of voltage reference source T1, the other end of the 8th resistance R 8 connects the reference utmost point of voltage reference source T1, an end of the 9th resistance R 9, the other end of the 9th resistance R 9 connects first with reference to ground GND1, and the anode of voltage reference source T1 connects first with reference to ground GND1; Some roads simulating signal connects the analog input pin of AD conversion chip U1 separately; The SDI pin of AD conversion chip U1 connects the OUTA pin of digital isolation coupling chip U2; The SCLK pin of AD conversion chip U1 connects the OUTB pin of digital isolation coupling chip U2; The CS pin of AD conversion chip U1 connects the OUTC pin of digital isolation coupling chip U2; The SDO pin of AD conversion chip U1 connects the IND pin of digital isolation coupling chip U2; One end of the 7th resistance R 7 connects the first voltage source V CC1, and the other end connects the EN2 pin of digital isolation coupling chip U2; The VCC1 pin of numeral isolation coupling chip U2 connects second voltage source VCC2; The VCC2 pin of numeral isolation coupling chip U2 connects an end of the first voltage source V CC1, the second capacitor C 2, another termination first reference ground GND1 of the second capacitor C 2; The GND2 pin of numeral isolation coupling chip U2 connects first with reference to ground GDN1; The VCC1 pin of numeral isolation coupling chip U2 connects an end of second voltage source VCC2, the 3rd capacitor C 3, and another termination second of the 3rd capacitor C 3 is with reference to ground GDN2; INA pin, INB pin, INC pin, the OUTD of numeral isolation coupling chip U2 is connected to four pins of single-chip microcomputer U3 separately; The GND1 pin of numeral isolation coupling chip U2 connects second with reference to ground GDN2; One end of the tenth resistance R 10 connects second voltage source VCC2, and the other end connects the EN1 pin of digital isolation coupling chip U2; One end of the 11 resistance R 11 connects second voltage source VCC2, and the other end connects the INC pin of digital isolation coupling chip U2; One end of the 12 resistance R 12 connects second voltage source VCC2, and the other end connects the INB pin of digital isolation coupling chip U2; One end of the 13 resistance R 13 connects second voltage source VCC2, and the other end connects the INA pin of digital isolation coupling chip U2.
3. according to claim 1 or ionization voltage Acquisition Circuit claimed in claim 2, it is characterized in that: the mxm. of the operating voltage of described digital isolating chip U2 is the large value in the voltage of the voltage of the first voltage source V CC1 and second voltage source VCC2, and the minimum of operating voltage is the medium and small value of voltage of voltage and the second voltage source VCC2 of the first voltage source V CC1.
4. according to claim 1 or ionization voltage Acquisition Circuit claimed in claim 2, it is characterized in that: described some roads simulating signal is voltage signal to be collected.
5. it is characterized in that: electrical isolation between described the first voltage source V CC1 and second voltage source VCC2 according to claim 1 or ionization voltage Acquisition Circuit claimed in claim 2; Described first with reference to electrical isolation between ground GND1 and the second reference ground GND2.
6. according to claim 1 or ionization voltage Acquisition Circuit claimed in claim 2, it is characterized in that: described some roads simulating signal access AD conversion chip U1, single-chip microcomputer U3 sends instruction to AD sampling A/D chip U1 selection one tunnel simulating signal and carries out simulating signal to the conversion of digital signal, the processing time of the signal of the command time of single-chip microcomputer U3 and AD conversion chip U1 conversion each time, single-chip microcomputer U3 realized that by continuous transmission instruction AD conversion chip U1 is to the voltage transitions of some roads simulating signal at Microsecond grade.
CN2013100294937A 2013-01-25 2013-01-25 Isolation voltage acquisition circuit Pending CN103116054A (en)

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CN112858756A (en) * 2021-03-02 2021-05-28 广州小鹏汽车科技有限公司 Current testing device, current testing method and electronic equipment

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Application publication date: 20130522