CN206077361U - Comparator module and gradual approaching A/D converter - Google Patents
Comparator module and gradual approaching A/D converter Download PDFInfo
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- CN206077361U CN206077361U CN201621138870.6U CN201621138870U CN206077361U CN 206077361 U CN206077361 U CN 206077361U CN 201621138870 U CN201621138870 U CN 201621138870U CN 206077361 U CN206077361 U CN 206077361U
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Abstract
This utility model is related to a kind of comparator module and gradual approaching A/D converter.The comparator module is applied in gradual approaching A/D converter, for the first sampled signal of the first input signal of input to gradual approaching A/D converter is compared with the first reference signal, to obtain comparison signal.Comparator module includes：First comparator, an input are input into the first sampled signal, and another input is input into the first reference signal, exports the first comparison signal；Phase inverter module, is connected to the outfan of first comparator, is input into the first comparison signal, exports comparison signal.According to embodiment of the present utility model, by the structure that comparator module is improved to comparator and phase inverter block coupled in series, the running voltage and power consumption of comparator module in successive approximation modulus change-over circuit are reduced, successive approximation modulus change-over circuit normal work in the case where system power supply is very low is enable.
Description
Technical field
This utility model is related to analogue layout field, more particularly to a kind of comparator module and successive approximation
Analog-digital converter.
Background technology
Gradual approaching A/D converter (SAR ADC) is widely used in requirement low-voltage, low-power consumption, and to conversion speed
Less demanding application scenario.
For example, in passive radio frequency identification (passive RFID) application, the analogue signal such as measurement humidity, humidity, light, all
Need to use analog-digital converter (ADC), due to passive RFID system power supply capacity it is weak, it is desirable to ADC running voltages and power consumption are enough
It is low, it is therefore desirable to low-voltage and low-power consumption but not high to ADC conversion speed requirements, the conversion of successive approximation modulus is usually used
Device structure.
However, the gradual approaching A/D converter of prior art generally adopts multilevel comparator cascade enough to reach
Gain, causes that analog-digital converter required voltage is higher, and power consumption is larger, it is impossible to the normal work in the case where system power supply is very low
Make.
Utility model content
Technical problem
In view of this, the utility model proposes a kind of comparator module and gradual approaching A/D converter, by improving
The structure of comparator module, reduces the running voltage and power consumption of comparator module in successive approximation modulus change-over circuit,
Enable successive approximation modulus change-over circuit normal work in the case where system power supply is very low.
Solution
According to one side of the present utility model, there is provided a kind of comparator module, the comparator module be applied to by
In secondary approach type analog-digital converter, for the first sampling by the first input signal of input to gradual approaching A/D converter
Signal is compared with the first reference signal, to obtain comparison signal.The comparator module includes：
First comparator, one input of the first comparator are input into first sampled signal, another input input
First reference signal, exports the first comparison signal；
Phase inverter module, the phase inverter module are connected to the outfan of the first comparator, are input into first ratio
Compared with signal, the comparison signal is exported.
In a kind of possible implementation, the gradual approaching A/D converter includes：
Sampling and keep module, is input into the first input signal, exports the first sampled signal；
The comparator module, is connected to the outfan of the sampling and keep module, one input of the comparator module
First sampled signal is input into, first reference signal of another input input from D/A converter module, output compare letter
Number；
Latch module, is connected to the outfan of the comparator module, and the latch module input is described to compare letter
Number, output latch signal；
Approach by inchmeal Logic control module, is connected to the outfan of the latch module, the Approach by inchmeal logic control
Molding block is input into the latch signal, exports digital logic signal；
D/A converter module, is connected respectively to the outfan and the comparator mould of the Approach by inchmeal Logic control module
Another input of block, one input of D/A converter module input initial reference signal, another input are input into the number
Word logical signal, exports first reference signal.
In a kind of possible implementation, the first comparator includes：The first transistor, transistor seconds, the 3rd
Transistor, first resistor and second resistance,
Wherein, the grid of the first transistor is input into first sampled signal, and the source electrode of the first transistor connects
The drain electrode of the third transistor is connected to, the drain electrode of the first transistor is connected to one end of the first resistor；
The grid of the transistor seconds is input into first reference signal, and the source electrode of the transistor seconds is connected to institute
The drain electrode of third transistor is stated, the drain electrode of the transistor seconds is connected to one end of the second resistance, the second resistance
One end export first comparison signal；
The other end of the other end of the first resistor and the second resistance is connected to supply voltage；
The source ground of the third transistor.
In a kind of possible implementation, the phase inverter module includes the multiple phase inverter connected.
In a kind of possible implementation, between the first comparator and the phase inverter module, the phase inverter
Coupled capacitor is in series with respectively between multiple phase inverter of module.
In a kind of possible implementation, the structure of multiple phase inverter of the phase inverter module is identical.
In a kind of possible implementation, the first transistor, the transistor seconds and the third transistor
For nmos pass transistor.
In a kind of possible implementation, the first transistor, the transistor seconds and the third transistor
For enhancement mode nmos pass transistor.
According to another aspect of the present utility model, there is provided a kind of gradual approaching A/D converter, for will be input into
First input signal of the gradual approaching A/D converter is converted to digital logic signal.The successive approximation modulus turns
Parallel operation includes comparator module as above.
Beneficial effect
According to embodiment of the present utility model, by comparator module is improved to comparator with phase inverter block coupled in series
Structure, reduces the running voltage and power consumption of comparator module in successive approximation modulus change-over circuit, makes successive approximation
Analog to digital conversion circuit can in the case where system power supply is very low normal work.
According to below with reference to the accompanying drawings to detailed description of illustrative embodiments, further feature of the present utility model and aspect will
It is made apparent from.
Description of the drawings
Comprising in the description and accompanying drawing and the description of the part that constitutes description together illustrates this practicality newly
The exemplary embodiment of type, feature and aspect, and for explaining principle of the present utility model.
Fig. 1 is the signal of the successive approximation modulus change-over circuit according to one exemplary embodiment of this utility model
Figure.
Fig. 2 is the block diagram of the comparator module according to one exemplary embodiment of this utility model.
Fig. 3 is the structural representation of the comparator module according to one exemplary embodiment of this utility model.
Fig. 4 is the structural representation of the first comparator according to one exemplary embodiment of this utility model.
Fig. 5 is the structural representation of the phase inverter according to one exemplary embodiment of this utility model.
Specific embodiment
Various exemplary embodiments of the present utility model, feature and aspect are described in detail below with reference to accompanying drawing.In accompanying drawing
Identical reference represents the same or analogous element of function.Although the various aspects of embodiment are shown in the drawings,
It is unless otherwise indicated, it is not necessary to accompanying drawing drawn to scale.
Special word " exemplary " means " being used as example, embodiment or illustrative " here.Here as " exemplary "
Illustrated any embodiment is should not necessarily be construed as preferred or advantageous over other embodiments.
In addition, in order to better illustrate this utility model, give in specific embodiment below numerous concrete
Details.It will be appreciated by those skilled in the art that not having some details, this utility model can equally be implemented.In some realities
In example, for method well known to those skilled in the art, means, element and circuit are not described in detail, in order to highlight this reality
With new purport.
Embodiment 1
Fig. 1 is the schematic diagram of the successive approximation modulus change-over circuit according to an exemplary embodiment.Fig. 2 is basis
The schematic diagram of the comparator module shown in one exemplary embodiment of this utility model.
According to the comparator module of exemplary embodiment of the present utility model can apply to it is for example as shown in Figure 1 gradually
In approach type analog-digital converter, for the first of the first input signal AIN of input to gradual approaching A/D converter is adopted
Sample signal VPI1 is compared with the first reference signal VNI1, to obtain comparison signal COUT.But those skilled in the art should
Understand, this utility model is not limited thereto, can be applied to the comparator module of exemplary embodiment of the present utility model
In various gradual approaching A/D converters well known in the art, the concrete structure of gradual approaching A/D converter is not limited to figure
Shown in 1.
As shown in Fig. 2 the comparator module 12 includes：First comparator 121, the first comparator 121 1 are input into
End input first sampled signal VPI1, another input are input into first reference signal VNI1, and letter is compared in output first
Number VO1；Phase inverter module 122, the phase inverter module 122 are connected to the outfan of the first comparator 121, and input is described
First comparison signal VO1, exports the comparison signal COUT.
The embodiment is reduced and is compared by comparator module to be improved to the structure of comparator and phase inverter block coupled in series
The running voltage and power consumption of device module, enables successive approximation modulus change-over circuit normal in the case where system power supply is very low
Work.
In a kind of possible implementation, as shown in figure 1, the gradual approaching A/D converter can include：
Sampling and keep module 11, is input into the first input signal AIN, exports the first sampled signal VPI1；
Comparator module 12, is connected to the outfan of the sampling and keep module 11, and the comparator module 12 1 is input into
End input first sampled signal VPI1, first reference signal of another input input from D/A converter module 15
VNI1, exports comparison signal COUT；
Latch module 13, is connected to the outfan of the comparator module 12, and the latch module 13 is input into described
Comparison signal COUT, output latch signal DOUT；
Approach by inchmeal Logic control module 14, is connected to the outfan of the latch module 13, and the Approach by inchmeal is patrolled
Collect control module 14 and be input into the latch signal DOUT, export digital logic signal DATA [N-1：0]；
D/A converter module 15, is connected respectively to the outfan of the Approach by inchmeal Logic control module 14 and the comparison
Another input of device module 12,15 1 input of D/A converter module input initial reference signal VREF, another input
The end input digital logic signal DATA [N-1：0], export first reference signal VNI1.
Wherein, N is the integer more than or equal to 2.
For example, in a system clock cycle, sampling and keep module 11 can be to the first input signal of input
AIN is sampled, and exports the first sampled signal VPI1.First sampled signal VPI1 is input to 12 1 inputs of comparator module
End；Approach by inchmeal Logic control module 14 is by its digital logic signal DATA [N-1：0] highest significant position (MSB) DATA [N-
1] 1 is set to, output to D/A converter module 15；D/A converter module 15 obtains initial reference signal VREF, according to initial ginseng
Examine signal VREF and highest significant position DATA [N-1] and export the first reference signal VNI1 (numerical values recited is 1/2VREF), be input to
Comparator module 12 another input.
In a kind of possible implementation, comparator module 12 compares the first sampled signal VPI1 and the first reference signal
The size of VNI1.If the first sampled signal VPI1 is more than or equal to the first reference signal VNI1, comparator module 12 is exported
Comparison signal COUT cause digital logic signal DATA [N-1：0] highest significant position (MSB) DATA [N-1] is fixed as 1；Such as
Really the first sampled signal VPI1 is less than the first reference signal VNI1, then the comparison signal COUT of the output of comparator module 12 makes total
Word logical signal DATA [N-1：0] highest significant position (MSB) DATA [N-1] is fixed as 0.
In a kind of possible implementation, in next system clock cycle, Approach by inchmeal Logic control module 14
By its digital logic signal DATA [N-1：0] secondary high significance bit DATA [N-2] is set to 1.If highest significant position DATA [N-
1] it is 1, then the first reference signal VNI1 is output as VNI1=3/4VREF；If highest significant position DATA [N-1] is 0, first
Reference signal VNI1 is output as VNI1=1/4VREF.Now, comparator module 12 compares the first sampled signal VPI1 and again
The size of one reference signal VNI1.If the first sampled signal VPI1 is more than or equal to the first reference signal VNI1, comparator
The comparison signal COUT of the output of module 12 causes digital logic signal DATA [N-1：0] secondary high significance bit DATA [N-2] is fixed
For 1；If the first sampled signal VPI1 is less than the first reference signal VNI1, the comparison signal COUT of the output of comparator module 12
So that digital logic signal DATA [N-1：0] secondary high significance bit DATA [N-2] is fixed as 0.
In a kind of possible implementation, in follow-up system clock cycle, number is determined in the manner described above one by one
Word logical signal DATA [N-1：0] other significance bits, until lowest order (LSB) DATA [0] of digital logic signal, output is most
Digital logic signal DATA [the N-1 for determining eventually：0].So as to export in each system clock cycle in comparator module 12
In the case of comparison signal COUT is correct, accurate digital logic signal DATA [N-1 can be obtained：0].Comparator module 12
Running voltage determine the minimum running voltage of gradual approaching A/D converter, the operating current of comparator module 12 is determined
The power consumption of gradual approaching A/D converter.
In this way, analog digital conversion can be gradually compared to, realizes successive approximation modulus change-over circuit,
Improve the accuracy of the digital logic signal after conversion.
Fig. 3 is the structural representation of the comparator module 12 according to one exemplary embodiment of this utility model.
In a kind of possible implementation, the phase inverter module 122 can include multiple phase inverter of series connection.So
And, this utility model does not limit the quantity of the multiple phase inverter in phase inverter module 122, those skilled in the art can according to by
The demands such as the power consumption of secondary approach type analog-digital converter, gain are selecting the quantity of phase inverter.
In a kind of possible implementation, the structure of multiple phase inverter of the phase inverter module 122 can be with identical.So
And, this utility model does not limit the species of the multiple phase inverter in phase inverter module 122, those skilled in the art can according to by
The demands such as the power consumption of secondary approach type analog-digital converter, gain are selecting the species of phase inverter.
In a kind of possible implementation, between the first comparator 121 and the phase inverter module 122, described
Coupled capacitor is in series between multiple phase inverter of phase inverter module 122 respectively can.Coupled capacitor can transmit AC signal
And separate direct current signal, so as in the case where the transmission of AC signal is ensured, reduce the overall power of comparator module 12.
For example, as shown in figure 3, first comparator 121 and the first phase inverter 1221, the second phase inverter can be adopted
1222 and the 3rd phase inverter 1223 three phase inverter series connection (cascade) illustrating according to embodiment of the present utility model.Its
In, the first electric capacity C1 is provided between first comparator 121 and the first phase inverter 1221；First phase inverter 1221 and the second paraphase
The second electric capacity C2 is provided between device 1222；The 3rd electric capacity is provided between second phase inverter 1222 and the 3rd phase inverter 1223
C3。
In a kind of possible implementation, an input of first comparator 121 is input into first sampled signal
VPI1, another input are input into first reference signal VNI1, export the first comparison signal VO1；First comparison signal VO1 Jing
After by the first electric capacity C1, as the second input signal VI2, the input of the first phase inverter 1221, the first phase inverter are input to
The second output signal VO2 after 1221 outfan output paraphase；After second output signal VO2 is via the second electric capacity C2, as
3rd input signal VI3, is input to the input of the second phase inverter 1222, after the outfan output paraphase of the second phase inverter 1222
The 3rd output signal VO3；After 3rd output signal VO3 is via the 3rd electric capacity C3, as the 4th input signal VI4, it is input to
The input of the 3rd phase inverter 1223, the outfan of the 3rd phase inverter 1223 export the comparison signal COUT.
In this way, 1 grade of comparator is cascaded with multistage phase inverter, and coupling electricity is set between all parts
Hold, in the case where the gain of comparator module 12 is ensured, reduce the power consumption of comparator module 12.
Fig. 4 is the structural representation of the first comparator 121 according to one exemplary embodiment of this utility model.As schemed
Shown in 4, in a kind of possible implementation, the first comparator 121 may include：The first transistor NN1, transistor seconds
NN2, third transistor NBN, first resistor RN1 and second resistance RN2.Wherein, the grid input of the first transistor NN1
First sampled signal VPI1, the source electrode of the first transistor NN1 are connected to the drain electrode of third transistor NBN, institute
The drain electrode for stating the first transistor NN1 is connected to one end of first resistor RN1；The grid input of the transistor seconds NN2
First reference signal VNI1, the source electrode of the transistor seconds NN2 are connected to the drain electrode of third transistor NBN, institute
The drain electrode for stating transistor seconds NN2 is connected to one end of second resistance RN2, one end output institute of second resistance RN2
State the first comparison signal VO1；The other end of the other end of first resistor RN1 and second resistance RN2 is connected to power supply
Voltage VDD；The source ground GND of third transistor NBN, the grid of third transistor NBN can connect reference voltage.
In a kind of possible implementation, the first transistor NN1, the transistor seconds NN2 and the described 3rd
Transistor NBN can be nmos pass transistor.
In a kind of possible implementation, the first transistor NN1, the transistor seconds NN2 and the described 3rd
Transistor NBN can be enhancement mode nmos pass transistor.
For example, in the structure using first comparator 121 as shown in Figure 4, just to enable first comparator 121
Often work, minimum running voltage VDD is needed more than (VTHNN1+VDSATNBN) or (VTHNN2+VDSATNBN), wherein VTHNN1Represent first
The threshold voltage absolute value of transistor NN1, VTHNN2Represent the threshold voltage absolute value of transistor seconds NN2, VDSATNBNRepresent the
The source and drain saturation voltage of three transistor NBN.
In this way so that the required voltage of the normal work of first comparator 121 is relatively low, reduces comparator
The running voltage of module 12.
Fig. 5 is the structural representation of the phase inverter according to one exemplary embodiment of this utility model.
A kind of a certain phase inverter (such as the first phase inverter in possible implementation, in phase inverter module 122
1221) structure as shown in Figure 5 can be adopted.The phase inverter can include：4th transistor P21 and the 5th transistor N21.Its
In, the grid of the 4th transistor P21 is connected to the grid of the 5th transistor N21, is input into the second input signal VI2；4th crystal
The source electrode of pipe P21 is connected to the drain electrode of the 5th transistor N21, exports the second output signal VO2；The drain electrode of the 4th transistor P21
Meet supply voltage VDD；The source ground GND of the 5th transistor N21.
In a kind of possible implementation, the 4th transistor P21 can be enhancement mode PMOS transistor, the 5th transistor
N21 can be enhancement mode nmos pass transistor.To enable 1221 normal work of the first phase inverter, minimum running voltage (power supply electricity
Pressure) VDD needed more than (VTHN21+VTHP21), wherein VTHN21Represent the threshold voltage absolute value of the 5th transistor N21, VTHP21Represent
The threshold voltage absolute value of the 4th transistor P21.
In a kind of possible implementation, the first phase inverter 1221, the second phase inverter 1222 and the 3rd phase inverter 1223
Three phase inverter can adopt structure as shown in Figure 5 so that the power consumption of multiple phase inverter of phase inverter module 122 is very
It is low, it is close to 0.
In this way so that the running voltage and power consumption of phase inverter module 122 is relatively low, and then reduces comparator
The running voltage and power consumption of module 12.
It will be understood by those skilled in the art that the basic structure of first comparator and phase inverter is not limited to shown in Fig. 4 and Fig. 5,
And can be the comparator and phase inverter using other structures well known by persons skilled in the art.
In a kind of possible implementation, a kind of Approach by inchmeal is also provided according to exemplary embodiment of the present utility model
Pattern number converter, for the first input signal of input to the gradual approaching A/D converter is converted to Digital Logic
Signal.The gradual approaching A/D converter includes comparator module as above.The gradual approaching A/D converter
Structure can be found in shown in Fig. 1.
The embodiment reduces the running voltage and power consumption of comparator module by improving the structure of comparator module,
Gradual approaching A/D converter low voltage operating and low power capabilities under atmospheric processes are solved the problems, such as, successive approximation is made
Analog to digital conversion circuit can be realized to analogue signals such as temperature, humidity in the low-voltages such as RF identification, low-power consumption application
Measurement.
The above, specific embodiment only of the present utility model, but protection domain of the present utility model do not limit to
In this, any those familiar with the art can readily occur in change in the technical scope that this utility model is disclosed
Or replace, should all cover within protection domain of the present utility model.Therefore, protection domain of the present utility model should be with the power
The protection domain that profit is required is defined.
Claims (9)
1. a kind of comparator module, the comparator module are applied in gradual approaching A/D converter, for will be input into
First sampled signal of the first input signal of gradual approaching A/D converter is compared with the first reference signal, to obtain
Comparison signal, it is characterised in that the comparator module includes：
First comparator, one input of the first comparator are input into first sampled signal, and another input input is described
First reference signal, exports the first comparison signal；
Phase inverter module, the phase inverter module are connected to the outfan of the first comparator, and letter is compared in input described first
Number, export the comparison signal.
2. comparator module according to claim 1, it is characterised in that the gradual approaching A/D converter includes：
Sampling and keep module, is input into the first input signal, exports the first sampled signal；
The comparator module, is connected to the outfan of the sampling and keep module, the input of one input of the comparator module
First sampled signal, another input input export comparison signal from the first reference signal of D/A converter module；
Latch module, is connected to the outfan of the comparator module, and the latch module is input into the comparison signal, defeated
Go out latch signal；
Approach by inchmeal Logic control module, is connected to the outfan of the latch module, the Approach by inchmeal logic control mould
Block is input into the latch signal, exports digital logic signal；
D/A converter module, is connected respectively to the outfan and the comparator module of the Approach by inchmeal Logic control module
Another input, one input of D/A converter module input initial reference signal, another input are input into the numeral and patrol
Signal is collected, first reference signal is exported.
3. comparator module according to claim 1 and 2, it is characterised in that the first comparator includes：First crystal
Pipe, transistor seconds, third transistor, first resistor and second resistance,
Wherein, the grid of the first transistor is input into first sampled signal, and the source electrode of the first transistor is connected to
The drain electrode of the third transistor, the drain electrode of the first transistor are connected to one end of the first resistor；
The grid of the transistor seconds is input into first reference signal, and the source electrode of the transistor seconds is connected to described the
The drain electrode of three transistors, the drain electrode of the transistor seconds are connected to one end of the second resistance, and the one of the second resistance
End output first comparison signal；
The other end of the other end of the first resistor and the second resistance is connected to supply voltage；
The source ground of the third transistor.
4. comparator module according to claim 1 and 2, it is characterised in that it is many that the phase inverter module includes connecting
Individual phase inverter.
5. comparator module according to claim 4, it is characterised in that the first comparator and the phase inverter module
Between, be in series with coupled capacitor respectively between multiple phase inverter of the phase inverter module.
6. comparator module according to claim 4, it is characterised in that the knot of multiple phase inverter of the phase inverter module
Structure is identical.
7. comparator module according to claim 3, it is characterised in that the first transistor, the transistor seconds
And the third transistor is nmos pass transistor.
8. comparator module according to claim 3, it is characterised in that the first transistor, the transistor seconds
And the third transistor is enhancement mode nmos pass transistor.
9. a kind of gradual approaching A/D converter, is input into for being input into the first of the gradual approaching A/D converter
Signal is converted to digital logic signal, it is characterised in that the gradual approaching A/D converter is included as in claim 1-8
Comparator module described in any one.
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| CN106330182A (en) * | 2016-10-19 | 2017-01-11 | 上海晟矽微电子股份有限公司 | Comparator module and successive approximation analog-to-digital converter |
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| CN106330182A (en) * | 2016-10-19 | 2017-01-11 | 上海晟矽微电子股份有限公司 | Comparator module and successive approximation analog-to-digital converter |
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