CN201820383U

CN201820383U - FPGA (field programmable gate array) teaching system

Info

Publication number: CN201820383U
Application number: CN 201020531287
Authority: CN
Inventors: 贺敬凯; 王瑞春; 潘晓宁; 周志文; 张跃宗
Original assignee: Shenzhen Institute of Information Technology
Current assignee: Shenzhen Institute of Information Technology
Priority date: 2010-09-16
Filing date: 2010-09-16
Publication date: 2011-05-04
Anticipated expiration: 2020-09-16

Abstract

The utility model relates to an FPGA (field programmable gate array) teaching system comprising an FPGA as well as an input device, an output device and a bus interface which are respectively connected with the FPGA, wherein the input device comprises a matrix keyboard and a standard keyboard interface which are respectively connected with the FPGA; the output device comprises a nixie tube, an LED (light-emitting diode) lamp, a liquid crystal display interface, a standard display device interface and a speaker which are respectively connected with the FPGA; and the bus interface comprises a network interface, a serial port, an I2C (inter-integrated circuit) bus interface, a monobus interface and an SPI (serial peripheral interface) bus interface which are respectively connected with the FPGA. By implementing the technical scheme of the utility model, hardware is simple in structure and low in cost; a circuit design experimental project completed by hardware description language can be intuitively showed; and the confidence of learning the FPGA of beginners can be further enhanced.

Description

A kind of FPGA tutoring system

Technical field

The utility model relates to control technology, more particularly, relates to a kind of FPGA tutoring system.

Background technology

FPGA(Field-Programmable Gate Array, field programmable gate array) be the product that on the basis of programming devices such as PAL, GAL, CPLD, further develops.It occurs as a kind of semi-custom circuit in special IC (ASIC) field, has both solved the deficiency of custom circuit, has overcome the limited shortcoming of original programming device gate circuit number again.

In the FPGA tutoring system, the circuit design of being finished with hardware description language (Verilog or VHDL) through simple comprehensive and layout, is burned onto on the FPGA apace and tests usually.

FPGA applied talent's demand is big especially at present, and traditional FPGA tutoring system experimental box normally, hardware configuration is very complicated, and can not represent the circuit design experimental project of being finished with hardware description language intuitively, often make the beginner forbidding, have no way of doing it, lose the confidence of study FPGA; In addition, such experimental box is expensive usually, and several thousand yuan at least, several ten thousand yuan at most.

The utility model content

The technical problems to be solved in the utility model is, at the above-mentioned FPGA tutoring system hardware configuration complexity of prior art, expensive defective, provides a kind of hardware configuration simple, low-cost FPGA tutoring system.

The technical scheme that its technical matters that solves the utility model adopts is: construct a kind of FPGA tutoring system, comprise FPGA, also comprise the input equipment, output device and the bus interface that are connected with described FPGA respectively.

In FPGA tutoring system described in the utility model, described input equipment comprises matrix keyboard, the QWERTY keyboard interface that is connected with described FPGA respectively.

In FPGA tutoring system described in the utility model, described matrix keyboard is the 8*8 matrix keyboard.

In FPGA tutoring system described in the utility model, described output device comprises charactron, LED lamp, LCD interface, standard indicator interface, the loudspeaker that is connected with described FPGA respectively.

In FPGA tutoring system described in the utility model, described bus interface comprises network interface, serial port, the I that is connected with described FPGA respectively ²C bus interface, single bus interface, spi bus interface.

Implement FPGA tutoring system of the present utility model, hardware configuration is simple, cost is low, and can represent the circuit design experimental project of being finished with hardware description language intuitively, has strengthened the confidence that the beginner learns FPGA.

Description of drawings

The utility model is described in further detail below in conjunction with drawings and Examples, in the accompanying drawing:

Fig. 1 is the logical diagram of the utility model FPGA tutoring system embodiment one;

Fig. 2 is the logical diagram of the utility model FPGA tutoring system embodiment two.

Embodiment

As shown in Figure 1, in the logical diagram of FPGA tutoring system embodiment one of the present utility model, this FPGA tutoring system comprises FPGA 100, input equipment 200, output device 300 and bus interface 400.Wherein, input equipment 200, output device 300 and bus interface 400 are connected with FPGA 100 respectively.

In the logical diagram of the FPGA tutoring system embodiment two of the present utility model shown in Fig. 2, this FPGA tutoring system comprises FPGA 100, input equipment 200, output device 300 and bus interface 400.Wherein, input equipment 200 comprises QWERTY keyboard interface 201 and the matrix keyboard 202 that is connected with described FPGA 100 respectively.For example, a QWERTY keyboard is inserted this FPGA tutoring system by this QWERTY keyboard interface 201, to realize the input of information.Matrix keyboard 202 is 8*8 matrix keyboards.Output device 300 comprises charactron 301, LED lamp 302, LCD interface 303, standard indicator interface 304, the loudspeaker 305 that is connected with FPGA 100 respectively.The quantity of charactron 301 can be 8, represents the result of experimental project with the demonstration of 8 charactrons.LED lamp 302 can be 8 LED running lamps, represents the result of experimental project with the light on and off of 8 LED running lamps.Bus interface 400 comprises network interface 401, serial port 402, the I that is connected with FPGA 100 respectively ² C bus interface 403, single bus interface 404, spi bus interface 405.

The experimental project that this FPGA tutoring system can be developed specifically comprises: running lamp project, charactron scan item, music playing project, digital stopwatch and digital clock project, coded lock project, data acquisition project, beverage Vending Machine project, I ²C device control project, SPI device control project, single wire bus device control project, serial port protocol project, network interface agreement project or the like.Based on the project of these peripheral hardwares, can in teaching, carry out the teaching of project formula; Simultaneously also high-caliber system design can be realized in FPGA, as the platform of studying FPGA in depth.

To specify this FPGA tutoring system with " running lamp project " and " music playing project " below be how to realize teaching, represents design concept with form more intuitively.

One, running lamp project:

Experiment purpose: by experiment, make the experimenter grasp technology and method that the use hardware description language is realized simple I/O device.

Performing step:

(1) adopts hardware description language, the fixed system frequency in the hardware is carried out frequency division, obtain the frequency of 1Hz;

(2) adopt the behavior modeling, obtain the hardware logic that 1Hz changes a port high-low level state, the output of these hardware logics will be used to drive 8 LED running lamps, and this hardware logic will satisfy the specific requirement of lamp project;

(3) with above-mentioned hardware logic, at specific FPGA and relevant hardware environment, carry out the pin locking, the hardware logic that so just will adopt hardware description language to write is changed the hardware for reality;

(4) because actual FPGA hardware pin is connected with 8 LED running lamps, turn round so promptly drive the mode that lamp sets according to logic after the FPGA work;

(5) in above-mentioned design, can also from multiple LED running lamp pattern, select by QWERTY keyboard or 8*8 matrix keyboard.

Experimental result: the experimenter can observe the light on and off of 8 LED running lamps intuitively with eyes.

Two, music playing project:

Experiment purpose: by experiment, the experimenter is grasped use hardware description language to realize technology and method than complex devices.

Performing step:

(1) frequency of each tone at first definite music numerical notation;

(2) adopt hardware description language, the fixed system frequency in the hardware is carried out frequency division, obtain the frequency of each tone;

(3) adopt the behavior modeling, by the duration ratio of each tone of stipulating in the numbered musical notation, continue this frequency of output, this output will be used to drive loudspeaker;

(4) with above-mentioned hardware logic, at specific FPGA and relevant hardware environment, carry out the pin locking, the hardware logic that so just will adopt hardware description language to write is changed the hardware for reality;

(5) because actual FPGA hardware pin is connected with the loudspeaker lamp, play interesting to listen to music according to numbered musical notation so promptly drive loudspeaker behind the FPGA workpiece;

(6) in above-mentioned design, can also from multiple melody, select a head or many head to play by QWERTY keyboard or 8*8 matrix keyboard.

Experimental result: the experimenter can enjoy the music of loudspeaker plays intuitively with ear.

The above is a preferred embodiment of the present utility model only, is not limited to the utility model, and for a person skilled in the art, the utility model can have various changes and variation.All within spirit of the present utility model and principle, any modification of being done, be equal to replacement, improvement etc., all should be included within the claim scope of the present invention.

Claims

1. a FPGA tutoring system comprises FPGA, it is characterized in that, also comprises the input equipment, output device and the bus interface that are connected with described FPGA respectively.

2. FPGA tutoring system according to claim 1 is characterized in that, described input equipment comprises matrix keyboard, the QWERTY keyboard interface that is connected with described FPGA respectively.

3. FPGA tutoring system according to claim 2 is characterized in that, described matrix keyboard is the 8*8 matrix keyboard.

4. FPGA tutoring system according to claim 1 is characterized in that, described output device comprises charactron, LED lamp, LCD interface, standard indicator interface, the loudspeaker that is connected with described FPGA respectively.

5. FPGA tutoring system according to claim 1 is characterized in that, described bus interface comprises network interface, serial port, the I that is connected with described FPGA respectively ²C bus interface, single bus interface, spi bus interface.