CN201733280U - Power amplifier with RF (radio frequency) CASCODE structure and increased linearity as well as power attaching efficiency - Google Patents

Abstract

The utility model discloses a power amplifier with an RF (radio frequency) Cascode structure and increased linearity as well as power attaching efficiency, which comprises a Cascode structure, an input matching network and an output matching network. The Cascode structure is composed of a common-emitter input transistor and a common-base output transistor, the input matching network is connected between a signal input port of the power amplifier and a base electrode of the input transistor, the output matching network is connected between a collector electrode of the output transistor and a signal output port of the power amplifier, and the base electrode of the output transistor is connected with an RLC serial-parallel resonance network which can increase fundamental frequency signal gains and restrain input of secondary harmonic signals. The utility model utilizes the RLC serial-parallel network to increase fundamental wave gains and restrain the harmonic signals, so as to obviously increase the linearity and power attaching efficiency of the power amplifier with the Cascode structure under the condition of not increasing static power consumption of the power amplifier, thereby effectively increasing the gain bandwidth product of the amplifier with the Cascode structure.

Description

The radio frequency CASCODE structure power amplifier that the linearity and power added efficiency improve

Technical field

The utility model relates to radio frequency Cascode (cascode) the structure power amplifier of a kind of high linearity, high power added efficiency, belongs to technical field of radio frequency integrated circuits.

Background technology

Typical wireless transmission device uses radio frequency (RF) power amplifier to amplify the signal of outwards launching by antenna.It is amplified to desired power with modulated band signal, can receive satisfied signal level in order to guarantee the receiver in the overlay area, but can not too disturb the communication of adjacent channel, need improve the linearity of power amplifier as best one can; In order to improve emission system, reduce the volume of communication equipment simultaneously, also need to use high efficiency power amplifier rate of energy.Yet the signal of high efficiency power amplifier tends to produce nonlinear distortion after by radio frequency amplifier, causes spectral re-growth, disturbs adjacent channel, causes the mis-behave of communication system.Therefore, address this problem, these two leading indicators of balanced radio frequency power amplifier linearity and efficient must adopt linearization technique to improve the nonlinear characteristic of high efficiency power amplifier as much as possible.

At present, the linearization technique of RF amplifier mainly contains feedback linearization, feedforward linearized and this three big main flow of predistortion.But, all there is certain limitation in these schemes, for example: the stability problem that degeneration factor is intrinsic, the operating frequency of signal can be reduced to fundamental frequency from radio frequency effectively although adopt the modulation feedback, but the signal lag that exists in the transmission system has limited the maximum bandwidth that allows transmission signals, this point has fundamentally limited the transmission of feedback technique to broadband signal, can't adapt to the wireless transmission requirement of following two-forty, wide bandwidth.Feedforward linearized technology can be handled the signal of any bandwidth, is fit to broadband application, but its maximum difficult point is to keep the amplitude between the different components and the coupling fully of phase characteristic, and can reduce the efficient of power amplifier.The pre-distortion method circuit is simple, operating frequency is high, unconditional stability, is applicable to any modulation signal, is more satisfactory linearization technique, but tends to increase the complexity of circuit.

Summary of the invention

The utility model purpose is: proposed a kind of novel structure at the Cascode structural circuit and improved the linearity and efficient, compared with above-mentioned several method, circuit structure is simpler, and can effectively improve the gain bandwidth product of power amplifier.

The technical solution of the utility model is: the radio frequency Cascode structure power amplifier that a kind of linearity and power added efficiency improve, comprise the Cascode structure that the output transistor by the input transistors of cascode and cobasis constitutes, from the signal input port of power amplifier to the input matching network that connects the base stage of described input transistors, and from the collector electrode of described output transistor to the output matching network that connects the signal output port of power amplifier, the base stage of described output transistor is connected with the RLC series parallel resonance network that improves the fundamental frequency signal gain and suppress the second harmonic signal input.

In the foregoing circuit structure, input transistors amplifies the signal of input, and the cobasis power tube is superimposed on the cascode power tube, obtains high output impedance when reducing Miller capacitance effect, further amplifying signal.Described RLC series parallel resonance network can effectively improve the Cascode circuit to the gain of fundamental frequency signal and suppress the gain of Cascode circuit to second harmonic signal.Input, output matching network are finished impedance matching, to realize the maximum power transfer of signal source to load.

Further, in above-mentioned radio frequency Cascode structure power amplifier, described RLC series parallel resonance network comprises from the base stage of output transistor to the 4th electric capacity and fundamental frequency series resonance network in parallel the ground.

Further, in above-mentioned radio frequency Cascode structure power amplifier, described fundamental frequency series resonance network comprises from described output transistor to the 3rd electric capacity, inductance and the resistance of connecting the ground.When this Cascode structure power amplifier is used as The Wide-Band Design, the series resonant circuit of forming by the 3rd electric capacity, inductance and resistance in this RLC series parallel resonance network, can be used as a high-frequency loss compensating circuit, the 3rd electric capacity, inductance and resistance respectively as confinement element producing near the gain peak the high-end operating frequency of amplifier 3-dB bandwidth, thereby amplifier bandwidth is expanded.

The utility model has the advantages that:

1. the utility model circuit can effectively strengthen gain of Cascode structure power amplifier first-harmonic and harmonic wave inhibition, and improves power added efficiency.

2. RLC series parallel resonance network technology of the present utility model can be used for suppressing the nth harmonic signal, and the use that can combine with other technology is widely used, and has strengthened the flexibility of Designing power amplifier well.

3. linearization technique of the present utility model not only can improve the linearity, can also effectively improve Cascode structure power amplifier gain bandwidth product, than other amplifiers (as common-emitter amplifier CE, common collector follow grounded emitter amplifier CC_CE, common collector is followed cascode amplifier CC_CAS etc.) can obtain bigger bandwidth.

4. device is few, simple in structure in the utility model circuit, has saved chip area and production cost greatly.

Description of drawings

Below in conjunction with drawings and Examples the utility model is further described:

Fig. 1 is general Cascode structure power amplifier schematic diagram;

Fig. 2 is the schematic diagram of the utility model specific embodiment;

Fig. 3 is the utility model specific embodiment principle Analysis schematic diagram;

Fig. 4 is that relation compares schematic diagram between the utility model specific embodiment and general Cascode structure power amplifier added efficiency and the input power;

Fig. 5 a is the schematic diagram that the utility model specific embodiment power gain frequency characteristic changes with inductance in the RLC series parallel resonance network;

Fig. 5 b is the schematic diagram of the utility model specific embodiment power gain frequency characteristic with resistance variations in the RLC series parallel resonance network;

Fig. 5 c is the schematic diagram of the utility model specific embodiment power gain frequency characteristic with capacitance variations in the RLC series parallel resonance network;

Fig. 6 is the utility model embodiment and the comparison schematic diagram of general Cascode structure booster output gain with the frequency f variation relation.

Wherein: 1 input matching network; The 2Cascode structure; 3 output matching networks; 4 fundamental frequency series resonance networks; 5RLC series parallel resonance network; The small-signal model of 6 output transistors; The Q1 input transistors; The Q2 output transistor; C1 first electric capacity; C2 second electric capacity; C3 the 3rd electric capacity; C4 the 4th electric capacity; The L1 inductance; R1 resistance.

Embodiment

Embodiment: be illustrated in figure 1 as the circuit structure diagram of Cascode structure power amplifier general in the prior art, comprise Cascode structure 2 that the output transistor Q2 by the input transistors Q1 of cascode and cobasis constitutes, from the signal input port of power amplifier to the input matching network 1 that connects the base stage of described input transistors Q1 and from the collector electrode of described output transistor Q2 to the output matching network 3 that connects the signal output port of power amplifier.Wherein input matching network 1 is made of first capacitor C 1 and input matching circuit, and output matching network 3 is made of second capacitor C 2 and output matching circuit.Input signal arrives the base stage of input transistors Q1 by first capacitor C 1 and input matching circuit, the grounded emitter of input transistors Q1, collector electrode is connected to the emitter of output transistor Q2, and input transistors Q1 and output transistor Q2 form the Cascode structure.Signal enters from input, is amplified by input transistors Q1 after first capacitor C, the 1 filtering DC component that is coupled.Along with the increase of input signal, the non-linear effect of input transistors Q1 is more and more obvious, and the output signal of input transistors Q1 collector electrode comprises abundant harmonic component, makes signal that bigger distortion take place.The shared proportion maximum of second harmonic in the harmonic component of input transistors Q1 collector electrode output signal.

As shown in Figure 2, be the radio frequency Cascode structure power amplifier that a kind of linearity of the present utility model and power added efficiency improve, be connected with RLC series parallel resonance network 5 in the base stage of the output transistor Q2 of existing C ascode structure.Described RLC series parallel resonance network 5 comprises that from the base stage of output transistor Q2 to the 4th capacitor C 4 and fundamental frequency series resonance network 4 in parallel the ground, this network resonance is at the second harmonic frequency point.Described fundamental frequency series resonance network comprises that from described output transistor Q2 to the 3rd capacitor C 3, inductance L 1 and the resistance R 1 of connecting the ground, this network resonance is in the operating frequency of amplifier.Therefore, described RLC series parallel resonance network 5 can effectively improve the Cascode circuit to the gain of fundamental frequency signal and suppress its gain to second harmonic signal.

The small-signal model 6 of present embodiment output transistor as shown in Figure 3, output transistor Q2 collector electrode output current is by mutual conductance g _mWith r _{Be '}, r _{Bb '}Last institute gets voltage u _BeDecision is at g _mUnder the situation about remaining unchanged, u _BeSize determined the size that voltage-controlled current source is current generated.R as seen from the figure _{Be '}, r _{Bb '}Series connection is carried out dividing potential drop, r with the equiva lent impedance of RLC series parallel resonance network 5 to the AC signal of amplifying through input transistors Q1 _{Be '}With r _{Bb '}It is u that last institute gets voltage _Be

For fundamental frequency signal, the fundamental frequency series resonance network resonance in the RLC series parallel resonance network 5, its impedance is a minimum value---the resistance of resistance R 1.At this moment, what the equivalence of second harmonic series resonant network was a resistance R 1 with the 3rd capacitor C 3 is in parallel, because the resistance of resistance R 1 is far smaller than the size of the 3rd capacitor C 3 reactance, the impedance of this network is mainly by the resistance size decision of resistance R 1.Because second harmonic series resonant network equiva lent impedance diminishes u _BeBe improved, so increase the gain that has improved fundamental signal by the fundamental current of output transistor Q2 collector electrode output.

For second harmonic signal, RLC series parallel resonance network resonance, this network equivalent impedance is a maximum.At this moment, u _BeReduce.So the harmonic current by the output of output transistor Q2 collector electrode reduces, harmonic signal is inhibited.In addition, guaranteeing under the situation of fundamental frequency series resonance network resonance at fundamental signal, adjust the value of inductance L 1, the 3rd capacitor C 3 and the 4th capacitor C 4, can make second harmonic series resonant network parallel resonance, thereby suppress the gain of nth harmonic signal in required nth harmonic frequency.The formula that the network of inhibition nth harmonic signal will satisfy is:

$\left\{\begin{array}{c}2\mathrm{\&pi;}{f}_0{\mathrm{<figure-callout\; id="1"\; label="L"\; filenames="HSA00000105916900051.png,HSA00000105916900052.png"\; state="\{\{state\}\}">L</figure-callout>}}_1=\frac{1}{2\mathrm{\&pi;}{f}_0{\mathrm{<figure-callout\; id="3"\; label="C"\; filenames="HSA00000105916900021.png"\; state="\{\{state\}\}">C</figure-callout>}}_3}\\ 2\mathrm{\&pi;}{f}_n{L}_1-\frac{1}{2\mathrm{\&pi;}{\mathrm{<figure-callout\; id="3"\; label="f\; n\; C"\; filenames="HSA00000105916900021.png"\; state="\{\{state\}\}">f</figure-callout>}}_n{C}_{}{}_3}=\frac{1}{2\mathrm{\&pi;}{\mathrm{<figure-callout\; id="2"\; label="f\; n\; C"\; filenames="HSA00000105916900021.png,HSA00000105916900061.png"\; state="\{\{state\}\}">f</figure-callout>}}_n{C}_{}{}_2}\end{array}\right.$

In this formula, fo is a fundamental frequency, and fn is the nth harmonic frequency.

Fig. 4 is the analogous diagram of comparing embodiment and general Cascode structure booster output added efficiency (PAE).Can find out obviously that from figure the power added efficiency of the utility model embodiment power amplifier obtains the improvement of certain degree.

In addition, owing to obtained high output impedance when reducing the Miller capacitance effect, Cascode structure amplifier itself just can be regarded a wide-band amplifier as, so the utility model embodiment can also be used for the design of wideband power amplifer.The series resonant circuit of forming by inductance L 1, the 3rd capacitor C 3, resistance R 1 in the RLC series parallel resonance network, can be used as a high-frequency loss compensating circuit, inductance L 1, the 3rd capacitor C 3, resistance R 1 respectively as confinement element producing near the gain peak the high-end operating frequency of amplifier 3-dB bandwidth, thereby amplifier bandwidth is expanded.

Fig. 5 (a) is depicted as by Computer Simulation to Fig. 5 (c), and the amplifier gain frequency characteristic that obtains is with loss compensating circuit R, L, the situation of change of C and optimal selection scope thereof.Wherein the coordinate x axle of figure (a) and (b), (c) is a normalized frequency, and value is:

$x=\mathrm{\&omega;}/{\mathrm{\&omega;}}_o=\mathrm{\&omega;}\frac{C_{\mathrm{\&pi;}}}{g_m}$

The longitudinal axis is the amplifier gain compensation, and value is:

Fig. 6 is that amplifier S21 parameter measurement was compared when RLC series parallel resonance network was as the high-frequency loss compensating circuit in general Cascode structure power amplifier and this example, the result contrasts as can be known, and the cascode amplifier bandwidth has been increased to 22GHz from 6GHz after employing the utility model case technology.Proved that well the theory that the cascode amplifier bandwidth that adopts the utility model case technology gets a promotion is correct.

In sum, the utility model utilizes the RLC series-parallel network to the enhancing of first-harmonic gain with to the inhibition of harmonic signal, under the situation that does not increase the power amplifier quiescent dissipation, significantly improve the linearity and the power added efficiency of Cascode structure power amplifier, and effectively improved the gain bandwidth product of Cascode structure wideband power amplifer.

Claims (3)

1. the radio frequency Cascode structure power amplifier that improves of the linearity and power added efficiency, comprise the Cascode structure (2) that the output transistor (Q2) by the input transistors (Q1) of cascode and cobasis constitutes, from the signal input port of power amplifier to the input matching network (1) that connects the base stage of described input transistors (Q1), and from the collector electrode of described output transistor (Q2) to the output matching network (3) that connects the signal output port of power amplifier, it is characterized in that: the base stage of described output transistor (Q2) is connected with the RLC series parallel resonance network (5) that improves the fundamental frequency signal gain and suppress the second harmonic signal input.

2. the radio frequency Cascode power amplifier that the linearity according to claim 1 and power added efficiency improve is characterized in that: described RLC series parallel resonance network (5) comprises that base stage from output transistor (Q2) is to the 4th electric capacity (C4) and fundamental frequency series resonance network (4) in parallel the ground.

3. the radio frequency Cascode power amplifier that the linearity according to claim 2 and power added efficiency improve, it is characterized in that: described fundamental frequency series resonance network comprises from described output transistor (Q2) to the 3rd electric capacity (C3) of connecting the ground, inductance (L1) and resistance (R1).

Images