CN201708785U - System for realizing real-time dynamic configuration of FPGA - Google Patents

System for realizing real-time dynamic configuration of FPGA Download PDF

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Publication number
CN201708785U
CN201708785U CN2010202530739U CN201020253073U CN201708785U CN 201708785 U CN201708785 U CN 201708785U CN 2010202530739 U CN2010202530739 U CN 2010202530739U CN 201020253073 U CN201020253073 U CN 201020253073U CN 201708785 U CN201708785 U CN 201708785U
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Prior art keywords
fpga
configuration
real
time dynamic
application data
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CN2010202530739U
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Chinese (zh)
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柳军胜
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HANGZHOU HAILAI ELECTRONIC TECHNOLOGY Co Ltd
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HANGZHOU HAILAI ELECTRONIC TECHNOLOGY Co Ltd
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Abstract

The utility model discloses a system for realizing real-time dynamic configuration of the FPGA, which comprises an FPGA chip (1), wherein the FPGA chip (1) is connected with an MCU system (2) which carries out real-time compilation to the FPGA chip (1). By the utility model, the packaged FPGA does not need to be individually upgraded, the MUC system is used for reading or writing the application data, then the application data is loaded to the FPGA chip, and thus real-time dynamic configuration of the FPGA can be realized.

Description

A kind of system that realizes the real-time dynamic-configuration of FPGA
Technical field
The utility model relates to the system of the real-time dynamic-configuration of a kind of FPGA of realization, belongs to data communication field.
Background technology
Field programmable gate array FPGA (Field Programmable Gate Array), it is the product that further develops on the basis of programming devices such as PAL, GAL, EPLD.The use of FPGA is very flexible, and inner available resources is abundant, can produce different circuit functions with a slice FPGA by different designs.FPGA has obtained extensive use in various fields such as communication, data processing, network, instrument, Industry Control, LED, military affairs and Aero-Space, for example in the core technology of modern LED display is used, has just adopted fpga chip in a large number.
At present, FPGA adopts fixed logic in the MCU system, both when exploitation, finished the fpga logic design, generate the FPGA configuration data file, and the FPGA configuration data file write in the FPGA hardware, FPGA automatic or passive configuration application circuit logic when powering on configuration during actual the use is used ARM or single-chip microcomputer configuration FPGA internal circuit logic in the certain applications.Hardware logic exploitation and embedded software developing were relatively independent during these were used, though in the application of single-chip microcomputer configuration FPGA circuit logic, can make the different circuit module of FPGA cell configuration, the actual application that this dynamic-configuration FPGA hardware of employing is also arranged, but hardware logic is not with the software development language combination, and the fpga logic circuit can dynamically not realized the renewal configuration of hardware logic in real time according to the software systems operation.
The utility model content
The purpose of this utility model is, a kind of FPGA of realization is provided the system of real-time dynamic-configuration.
The technical solution of the utility model: a kind of system that realizes the real-time dynamic-configuration of FPGA, described system comprises fpga chip, fpga chip is connected with the MCU system that it is compiled in real time.
In the system of the above-mentioned real-time dynamic-configuration of realization FPGA, described MCU system also connects the structural array conversion equipment.
In the system of the real-time dynamic-configuration of aforesaid realization FPGA, described MCU system is provided with the storage device of the application data configuration file that stores the MCU system.
In the system of the real-time dynamic-configuration of aforesaid realization FPGA, described storage device comprises program storage device and dynamic storage device.
In the system of the real-time dynamic-configuration of aforesaid realization FPGA, described MCU system also is connected with the display unit of the application data configuration file of the configuration file correspondence that demonstration loading.
Compared with prior art, the utility model adopts the MCU system for field that FPGA is carried out real-time dynamic-configuration by the improvement to the MCU system, has obtained following beneficial effect.
The utility model can read or write application data (being application software) by the MCU system so that the FPGA that encapsulation is finished does not need independent upgrading, again application data is loaded on fpga chip, realizes the real-time dynamic-configuration of FPGA; Therefore, the FPGA that the utility model not only can make encapsulation finish has realized different functions, and the recycling of encapsulation class FPGA hardware, greatly reduce operating cost, improved operating efficiency, simultaneously a plurality of application systems of MCU system are reused same sealing class FPGA hardware and have also been accelerated the system design progress, have saved the development time.The utility model also comprises the structural array conversion, promptly the structural array according to the configuration data file of fpga chip converts the structural array that adapts with embedded system to, makes the MCU system of different structure array can compile out the configuration file of same FPGA hardware.
Description of drawings
Fig. 1 is a structural representation of the present utility model;
Fig. 2 is the workflow diagram of the utility model embodiment.
Embodiment
Below in conjunction with drawings and Examples the utility model is further described, but not as the foundation to the utility model restriction.
Embodiment: a kind of system that realizes the real-time dynamic-configuration of FPGA, as shown in Figure 1, comprise fpga chip 1 (fpga chip can be selected the EP3C25F256C8 chip of the Cyeloneii series of altera corp's production for use), fpga chip 1 is connected with the MCU system (the MCU system can select ARM or PowerPC for use) that it is compiled in real time, the MCU system has being installed in the on-the-spot compiling of the intrasystem application data of MCU (also being the application software of MCU system), cost is low, the performance height, wieldy characteristics, MCU system and fpga chip be connected to serial PS configuration mode or JTAG configuration mode.Described MCU system 2 also is connected with structural array conversion equipment 3, the effect of structural array conversion equipment 3 is that the structural array according to the configuration data file of fpga chip converts the structural array that adapts with the MCU system to, by the compiling of the structural array after conversion application data, application data as certain MCU system is passed through the C-structure array programs, generate the configuration file of binary system FPGA earlier by the EDA design software, convert the C-structure array to by the BIN2C instrument, again the C-structure array is merged in the application data of MCU system, be loaded in the fpga chip by the compiling application data and with application data at last, realize the real-time dynamic-configuration of FPGA.MCU system 2 is provided with the storage device 4 of the application data configuration file that stores the MCU system; Described storage device 4 comprises program storage device 5 (program storage device can earlier with Nor Flash or Nand Flash) and dynamic storage device 6 (dynamic storage device can be selected SDRAM or DDR or DDR2 for use), the utility model is stored into storage device with the application data configuration file of the target program correspondence of fpga chip, the MCU system realizes the real-time dynamic-configuration of FPGA by reading in the application data configuration file and being loaded in the fpga chip.MCU of the present utility model system 2 also is connected with the display unit 7 (display unit can be selected common LCD display for use) of the application data configuration file of the configuration file correspondence that demonstration loading.
As shown in Figure 2, realize the real-time dynamic configuration method of FPGA, include following steps:
Step 1: structural array conversion; Promptly the structural array according to the configuration data file of fpga chip converts the structural array that adapts with the MCU system to.Application data as certain MCU system is passed through the C-structure array programs, generates the configuration file of binary system FPGA earlier by the EDA design software, converts the C-structure array to by the BIN2C instrument.
Step 2: application data compiling; By the structural array of changing the application data of MCU system is carried out field programming; Or from the storage device of MCU system, the application data of the target program correspondence of FPGA is read in the MCU system;
Step 3: application data shows; To the application data configuration file that field programming is carried out in the application of MCU system be shown on LCD display; Or will in the storage device application data configuration file of the target program correspondence of FPGA be shown on the LDC display screen;
Step 4: application data is loaded on PFGA; The application data of MCU system is loaded in the fpga chip, realize the real-time dynamic-configuration of FPGA.

Claims (5)

1. system that realizes the real-time dynamic-configuration of FPGA, it is characterized in that: described system comprises fpga chip (1), fpga chip (1) is connected with the MCU system (2) that it is compiled in real time.
2. the system of the real-time dynamic-configuration of realization FPGA according to claim 1, it is characterized in that: described MCU system (2) is connected with structural array conversion equipment (3).
3. the system of the real-time dynamic-configuration of realization FPGA according to claim 1, it is characterized in that: described MCU system (2) is connected with the storage device (4) of the application data configuration file that stores the MCU system.
4. the system of the real-time dynamic-configuration of realization FPGA according to claim 1, it is characterized in that: described storage device (4) comprises program storage device (5) and dynamic storage device (6).
5. according to system of the real-time dynamic-configuration of claim 1 to 4 each described realization FPGA, it is characterized in that: described MCU system (2) also is connected with the display unit (7) of the application data configuration file of the configuration file correspondence that demonstration loading.
CN2010202530739U 2010-07-09 2010-07-09 System for realizing real-time dynamic configuration of FPGA Expired - Fee Related CN201708785U (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103257612A (en) * 2012-02-21 2013-08-21 京微雅格(北京)科技有限公司 Flexibly configured field-programmable gate array (FPGA) chip and configuration method thereof
CN105955919A (en) * 2016-04-27 2016-09-21 西安交通大学 Implementation method of reading-writing NANDFlash by multiple MCUs based on FPGA (Field Programmable Gate Array)
CN106528217A (en) * 2016-10-26 2017-03-22 武汉船舶通信研究所 FPGA (Field Programmable Gate Array) program loading system and method
CN112730478A (en) * 2020-12-24 2021-04-30 明峰医疗系统股份有限公司 Configuration upgrading method and system of CT detector and CT scanner
CN113391920A (en) * 2021-06-11 2021-09-14 上海创景信息科技有限公司 Method and system for intelligently scheduling and managing multiple target CPUs

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103257612A (en) * 2012-02-21 2013-08-21 京微雅格(北京)科技有限公司 Flexibly configured field-programmable gate array (FPGA) chip and configuration method thereof
CN103257612B (en) * 2012-02-21 2016-03-16 京微雅格(北京)科技有限公司 A kind of fpga chip of flexible configuration and collocation method thereof
CN105955919A (en) * 2016-04-27 2016-09-21 西安交通大学 Implementation method of reading-writing NANDFlash by multiple MCUs based on FPGA (Field Programmable Gate Array)
CN105955919B (en) * 2016-04-27 2019-02-05 西安交通大学 The implementation method of more MCU read-write NANDFlash based on FPGA
CN106528217A (en) * 2016-10-26 2017-03-22 武汉船舶通信研究所 FPGA (Field Programmable Gate Array) program loading system and method
CN106528217B (en) * 2016-10-26 2019-12-06 武汉船舶通信研究所 on-site programmable gate array program loading system and method
CN112730478A (en) * 2020-12-24 2021-04-30 明峰医疗系统股份有限公司 Configuration upgrading method and system of CT detector and CT scanner
CN113391920A (en) * 2021-06-11 2021-09-14 上海创景信息科技有限公司 Method and system for intelligently scheduling and managing multiple target CPUs

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