CN201681835U - Lead frame structure with a plurality of base islands with protruding points and of projection types and single loop pins - Google Patents
Lead frame structure with a plurality of base islands with protruding points and of projection types and single loop pins Download PDFInfo
- Publication number
- CN201681835U CN201681835U CN 201020173141 CN201020173141U CN201681835U CN 201681835 U CN201681835 U CN 201681835U CN 201020173141 CN201020173141 CN 201020173141 CN 201020173141 U CN201020173141 U CN 201020173141U CN 201681835 U CN201681835 U CN 201681835U
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- CN
- China
- Prior art keywords
- pin
- dao
- pins
- base islands
- lead frame
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Abstract
The utility model relates to a lead frame structure with a plurality of base islands with protruding points and of projection types and single loop pins, comprising base islands (1) and pins (2), the fronts of the base islands (1) are disposed as structures of multi protruding pin shapes, a first metal layer (4) and a second metal layer (5) are respectively disposed on the fronts and backs of the base islands (1) and the pins (2), a plurality of base islands (1) and one loop of pins (2) are disposed, packless plastic packaging materials (3) are inlaid in the zones at the peripheries of the pins (2), between the base islands (1) and the pins (2), and between the base islands (1), the packless plastic packaging materials (3) joint the base islands (1) with the lower parts of the pins (2) to form an integration, and the back size of the base islands (1) and the pins (2) is smaller than the front size of the base islands (1) and the pins (2), forming a base island and pin structure big end up. The beneficial effect of the lead frame structure is: the plastic packaging body and the metal pin are provided with a great binding capacity.
Description
(1) technical field
The utility model relates to the how base island exposed type individual pen of a kind of multi-convex point pin lead frame structure.Belong to the semiconductor packaging field.
(2) background technology
The how base island exposed type individual pen of traditional multi-convex point pin lead frame structure mainly contains two kinds:
First kind: after chemical etching and surface electrical coating are carried out in the front of employing metal substrate, stick the resistant to elevated temperatures glued membrane of one deck at the back side of metal substrate and form the leadframe carrier (as shown in Figure 2) that to carry out encapsulation process;
Second kind: after chemical etching and surface electrical coating are carried out in the front of employing metal substrate, promptly finish the making (as shown in Figure 3) of lead frame.Back etched is then carried out at the back side of lead frame again in encapsulation process.
And the not enough point of two kinds of above-mentioned lead frames below in encapsulation process, having existed:
First kind:
1) but the lead frame of this kind must stick the glued membrane of one deck costliness high temperature resistance because of the back side.So directly increased high cost.
2) but also because the glued membrane of one deck high temperature resistance must be sticked in the back side of the lead frame of this kind, so the load technology in encapsulation process can only be used conduction or nonconducting resin technology, and the technology that can not adopt eutectic technology and slicken solder is fully carried out load, so selectable product category just has bigger limitation.
3) but again because the glued membrane of one deck high temperature resistance must be sticked in the back side of the lead frame of this kind, and in the ball bonding bonding technology in encapsulation process, because but the glued membrane of this high temperature resistance is a soft materials, so caused the instability of ball bonding bonding parameter, seriously influenced the quality of ball bonding and the stability of production reliability.
4) but again because the glued membrane of one deck high temperature resistance must be sticked in the back side of the lead frame of this kind, and the plastic package process process in encapsulation process, because the high pressure of plastic packaging relation is easy to cause between lead frame and the glued membrane and infiltrates plastic packaging material, be that the kenel of conduction has become insulation pin (as shown in Figure 4) on the contrary because of having infiltrated plastic packaging material and will formerly should belong to metal leg.
Second kind:
The lead frame structure of this kind has carried out etching partially technology in the metal substrate front, though can solve the problem of first kind of lead frame, but because only carried out the work that etches partially in the metal substrate front, and plastic packaging material only envelopes the height of half pin in the plastic packaging process, so the constraint ability of plastic-sealed body and metal leg has just diminished, when if the plastic-sealed body paster is not fine to pcb board, does over again again and heavily paste, with regard to the problem (as shown in Figure 5) that is easy to generate pin.
Especially the kind of plastic packaging material is to adopt when filler is arranged, because material is at the environment and the follow-up surface-pasted stress changing relation of production process, can cause metal and plastic packaging material to produce the crack of vertical-type, its characteristic is the high more then hard more crisp more crack that is easy to generate more of proportion of filler.
(3) summary of the invention
The purpose of this utility model is to overcome above-mentioned deficiency, provides a kind of and reduces that packaging cost, selectable product category are wide, the big how base island exposed type individual pen of the multi-convex point pin lead frame structure of constraint ability of good stability, plastic-sealed body and the metal leg of the quality of ball bonding and production reliability.
The purpose of this utility model is achieved in that the how base island exposed type individual pen of a kind of multi-convex point pin lead frame structure, comprise Ji Dao and pin, multi-convex point shape structure is arranged in front, described basic island, front and back at described Ji Dao and pin is respectively arranged with the first metal layer and second metal level, described Ji Dao has a plurality of, pin has a circle, in described pin periphery, zone between zone between Ji Dao and the pin and Ji Dao and the basic island is equipped with packless plastic packaging material, described packless plastic packaging material links into an integrated entity the bottom of Ji Dao and pin, and make described Ji Dao and pin back side size less than Ji Dao and the positive size of pin, form up big and down small Ji Dao and pin configuration.
The beneficial effects of the utility model are:
1) but the glued membrane of one deck costliness high temperature resistance need not sticked in the back side of the lead frame of this kind.So directly reduced high cost.
2) but because the glued membrane of one deck high temperature resistance need not sticked in the back side of the lead frame of this kind yet, so the load technology in encapsulation process is except using conduction or nonconducting resin technology, can also adopt the technology of eutectic technology and slicken solder to carry out load, so selectable product category is just wide.
3) but again because the glued membrane of one deck high temperature resistance need not sticked in the back side of the lead frame of this kind, guaranteed the stability of ball bonding bonding parameter, guaranteed the quality of ball bonding and the stability of production reliability.
4) but again because the lead frame of this kind need not stick the glued membrane of one deck high temperature resistance, and the plastic package process process in encapsulation process can not cause between lead frame and the glued membrane fully and infiltrate plastic packaging material.
5) because the zone between described metal leg (pin) and metal leg is equipped with packless soft gap filler, this packless soft gap filler has the filler plastic packaging material to envelope the height of whole metal leg with the routine in the plastic packaging process, so the constraint ability of plastic-sealed body and metal leg just becomes big, do not have the problem that produces pin again.
6) owing to adopted positive method of separating the etching operation with the back side, so in the etching operation, can form the slightly little and big slightly structure of positive basic island size of the size of back side Ji Dao, and slided by the tighter more difficult generation that packless plastic packaging material coated and falling pin with the size that varies in size up and down of a Ji Dao.
7) the Metal Substrate island of multi-convex point can be distributed to the hot swelling heat stress and the cold conditions shrinkage stress on Metal Substrate island on each salient point, the different different stress deformations that produce of the coefficient of expansion between the Metal Substrate island that has directly reduced monoblock and the chip with shrinkage, and then cause reliability injury problem after the encapsulation.
(4) description of drawings
Fig. 1 is the how base island exposed type individual pen of a utility model multi-convex point pin lead frame structure schematic diagram.
Fig. 2 was for sticked the resistant to elevated temperatures glued membrane figure of one deck operation in the past at the back side of metal substrate.
Fig. 3 was for to adopt the front of metal substrate to carry out chemical etching and surface electrical coating flow diagram in the past.
Fig. 4 was for formed insulation pin schematic diagram in the past.
Fig. 5 pin figure for what formed in the past.
Reference numeral among the figure:
Base island 1, pin 2, packless plastic packaging material 3, the first metal layer 4, second metal level 5.
(5) embodiment
Referring to Fig. 1, Fig. 1 is the how base island exposed type individual pen of a utility model multi-convex point pin lead frame structure schematic diagram.As seen from Figure 1, the how base island exposed type individual pen of the utility model multi-convex point pin lead frame structure, comprise basic island 1 and pin 2, multi-convex point shape structure is arranged in 1 front, described basic island, front and back at described basic island 1 and pin 2 is respectively arranged with the first metal layer 4 and second metal level 5, described basic island 1 has a plurality of, pin 2 has a circle, in described pin 2 peripheries, zone between base island 1 and the pin 2 and the zone between basic island 1 and the basic island 1 are equipped with packless plastic packaging material 3, described packless plastic packaging material 3 links into an integrated entity the bottom of basic island 1 with pin 2, and make described basic island 1 and pin 2 back side sizes less than basic island 1 and pin 2 positive sizes, form up big and down small Ji Dao and pin configuration.
Claims (1)
1. the how base island exposed type individual pen of multi-convex point pin lead frame structure, comprise Ji Dao (1) and pin (2), described Ji Dao (1) is arranged to multi-convex point shape structure in the front, front and back at described Ji Dao (1) and pin (2) is respectively arranged with the first metal layer (4) and second metal level (5), it is characterized in that: described Ji Dao (1) has a plurality of, pin (2) has a circle, in described pin (2) periphery, zone between zone between Ji Dao (1) and the pin (2) and Ji Dao (1) and the Ji Dao (1) is equipped with packless plastic packaging material (3), described packless plastic packaging material (3) links into an integrated entity Ji Dao (1) with the bottom of pin (2), and make described Ji Dao (1) and pin (2) back side size less than Ji Dao (1) and the positive size of pin (2), form up big and down small Ji Dao and pin configuration.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 201020173141 CN201681835U (en) | 2010-04-21 | 2010-04-21 | Lead frame structure with a plurality of base islands with protruding points and of projection types and single loop pins |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 201020173141 CN201681835U (en) | 2010-04-21 | 2010-04-21 | Lead frame structure with a plurality of base islands with protruding points and of projection types and single loop pins |
Publications (1)
Publication Number | Publication Date |
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CN201681835U true CN201681835U (en) | 2010-12-22 |
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Application Number | Title | Priority Date | Filing Date |
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CN 201020173141 Expired - Lifetime CN201681835U (en) | 2010-04-21 | 2010-04-21 | Lead frame structure with a plurality of base islands with protruding points and of projection types and single loop pins |
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CN (1) | CN201681835U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109037078A (en) * | 2018-06-13 | 2018-12-18 | 南通通富微电子有限公司 | A kind of semiconductor chip packaging method |
-
2010
- 2010-04-21 CN CN 201020173141 patent/CN201681835U/en not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109037078A (en) * | 2018-06-13 | 2018-12-18 | 南通通富微电子有限公司 | A kind of semiconductor chip packaging method |
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Date | Code | Title | Description |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CX01 | Expiry of patent term |
Granted publication date: 20101222 |
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CX01 | Expiry of patent term |