CN201533303U - Improved Miler code encoding circuit - Google Patents
Improved Miler code encoding circuit Download PDFInfo
- Publication number
- CN201533303U CN201533303U CN2009200739357U CN200920073935U CN201533303U CN 201533303 U CN201533303 U CN 201533303U CN 2009200739357 U CN2009200739357 U CN 2009200739357U CN 200920073935 U CN200920073935 U CN 200920073935U CN 201533303 U CN201533303 U CN 201533303U
- Authority
- CN
- China
- Prior art keywords
- pulse width
- modulating pulse
- code
- circuit
- manchester
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Landscapes
- Synchronisation In Digital Transmission Systems (AREA)
- Dc Digital Transmission (AREA)
Abstract
The utility model discloses an improved Miler code encoding circuit which comprises a bit clock generator, a Manchester encoder, a modulating pulse width parameter converting circuit, a modulating pulse width control counter circuit and an improved Miler code encoder, wherein the bit clock generator generates a bit clock signal of a specified communication rate through a system clock and the communication rate; the Manchester encoder converts unipolar non-return-to-zero code streams into temporary Manchester code streams; the modulating pulse width parameter converting circuit selectively generates appropriate modulating pulse width control parameters according to the communication rate; the modulating pulse width control counter circuit generates a counter for controlling the modulating pulse width of the improved Miler code; and the improved Miler code encoder is used for encoding and generating improved Miler codes which can be configured with the modulating pulse width. The improved Miler code encoding circuit can relate to selective configuration of a plurality of modes of communication rate, can freely configure the modulating pulse width, and supports improved Miler code encoding channels, the input source of which is Manchester code. The generated improved Miler code is compatible with ISO/IEC 14443 Type A interface standard.
Description
Technical field
The utility model relates to contact-free integrated circuit (IC) card field, particularly relates to a kind of modified model Miller code coding circuit.
Background technology
Along with the high speed development of information technology, the application of non-contact IC card is more and more general and popular, and supporting with it reader device also seems more and more important simultaneously.In the communication interface of ISO/IEC 14443A type, the modified model Miller code technology that card reader has adopted to the coding of card.This coding is owing to the very short pulse duration, and therefore can guarantee in data transmission procedure can continuous feeding cards energy from the high frequency magnetic field of card reader.
Existing modified model Miller code Methods for Coding has following deficiency: do not relate to the selection configuration of multiple communication speed pattern, can not freely dispose modulating pulse width, do not support that input source is the modified model Miller code coding pass of Manchester code.The demand that development in pluralism of using along with card reader and parameter freely disposes increases, and the user is more and more higher to the characteristic requirement of read write line, supports multiple communication speed, support user freely to dispose characteristic such as modulating pulse width and seems and more and more be necessary.
The utility model content
Problem to be solved in the utility model provides a modified model Miller code coding circuit multiple communication speed, that modulating pulse width can freely dispose of supporting ISO/IEC 14443A type communication interface.The serial data source of unipolarity NRZ (NRZ) can be produced the modified model Miller code, support that also source data is the modified model Miller code coding pass of Manchester code simultaneously.
For solving above technical problem, the utility model provides a kind of modified model Miller code coding circuit, comprise: the bit clock generator, system clock to the outside input of this Circuits System carries out frequency division, and select signal to select to obtain the bit clock of designated communication speed according to the communication speed of outside input, the bit clock signal of generation is exported to manchester encoder;
Manchester encoder, with the unipolarity NRZ sign indicating number of outside input and coding enable signal and bit clock synchronously after, enable the pairing Manchester code of effective scope coding generation unipolarity NRZ at coding;
Modulating pulse width parameter change-over circuit is selected signal and modulating pulse width register parameters according to the communication speed of outside input, and conversion produces the modulating pulse width parameter, exports to modulating pulse control counter and modified model Miller code encoder;
The modulating pulse width control counter, under system clock, Manchester code with manchester encoder output, modulating pulse width Control Parameter with the output of modulating pulse width parameter change-over circuit, generation is used to control the system clock counter of modulating pulse width, and exports to modified model Miller code encoder;
Modified model Miller code encoder, under system clock, by the counter of modulating pulse width control counter output and the modulating pulse width Control Parameter of modulating pulse width parameter change-over circuit output, produce the modified model Miller code of specified modulation pulse duration, be the final output signal of this Circuits System.
The beneficial effects of the utility model are: can relate to the selection configuration of multiple communication speed pattern, can freely dispose modulating pulse width, support that input source is the modified model Miller code coding pass of Manchester code.
Above-mentioned Circuits System, its bit clock generator produces frequency-dividing clock by 13.56MHz system clock counter, select signal to select to produce bit clock by communication speed again, can produce the bit clock of the communication speed of 106kbps, 212kbps, 424kbps and 847kbps among the ISO/IEC 14443-A.
Above-mentioned Circuits System, its manchester encoder input source unipolarity NRZ and coding enable signal need synchronous with bit clock.When the coding enabled state, unipolarity NRZ sign indicating number is encoded into Manchester's code.
Above-mentioned Circuits System, its modulating pulse width parameter change-over circuit are finished the modulating pulse parameter conversion to the user register configuration, and the input modulating pulse width parameter effective value number of significant digit of this change-over circuit is selected signal deciding by communication speed.If communication speed selects signal to select 106kbps, then modulating pulse width parameter effective value hangs down five effectively; If communication speed selects signal to select 212kbps, then modulating pulse width parameter effective value hangs down four effectively; If communication speed selects signal to select 424kbps, then modulating pulse width parameter effective value hangs down three effectively; If communication speed selects signal to select 847kbps, then modulating pulse width parameter effective value hangs down two effectively.Modulating pulse width parameter transfer function is tmod=2* (modulating pulse width parameter effective value effective value+1), and wherein the modulating pulse width of the value representation modified model Miller code of tmod has the width of what system clock cycles.
Above-mentioned Circuits System, its modulating pulse width control counter comprises counter reset signal generator and control counter.The counter reset signal generator is in single reset signal that produces the modulating pulse width control counter along the place of Manchester code.
Above-mentioned Circuits System, the count value of the control counter fc_cnt in its modulating pulse width control counter circuit are during greater than modulating pulse width parametric t mod value, and counter stops counting.
Above-mentioned Circuits System, in half bit period of its modified model Miller code encoder after Manchester code produces modulating pulse width control counter reset signal, judge the value of modulating pulse width control counter fc_cnt and the relation of modulating pulse width Control Parameter tmod value, produce the modified model Miller code of certain modulating pulse width.
Above-mentioned Circuits System, can support that data source is the use passage of Manchester code, promptly when source data is the data flow of Manchester code type, can skip manchester encoder, directly input to the modulating pulse width control counter circuit in this Circuits System, carry out modified model Miller code coding.
Above-mentioned Circuits System, the modulating pulse width of the modified model Miller code that coding generates is adjustable, and the scalable step-length is 1 system clock cycle width, and controllable width scope minimum is 1 system clock cycle width, is the bit clock periodic width to the maximum half.
Above-mentioned Circuits System, the various communication speed patterns of the compatible ISO/IEC14443A type protocol of the modified model Miller code that coding produces interface.
Description of drawings
Below in conjunction with accompanying drawing and embodiment the utility model is described in further detail:
Fig. 1 is a Circuits System block diagram of the present utility model;
Fig. 2 is the coding sequential chart of the utility model data source when being unipolarity NRZ sign indicating number.
Embodiment
As shown in Figure 1, modified model Miller code coding circuit described in the utility model system 100 is included in the read write line chip, and comprises bit clock generator 110, manchester encoder 120, modulating pulse width parameter change-over circuit 130, modulating pulse width control counter 140 and modified model Miller code encoder 150.
System clock counter 111 is system clock counters of a 13.56MHz, the bit clock of the 3rd, the 4th, the 5th and the 6th the corresponding 827kHz of difference, 424kHz, 212kHz and 106kHz of counter; Bit clock selector 112 selects signal rate_sel to select the bit clock signal bit_clk of configuration communication speed by communication speed.
Manchester encoder 120 is finished the function that enables unipolarity NRZ sign indicating number to be converted to when effective Manchester code at coding, comprise with or door 121 and NAND gate 122. its input end signal data source signal unipolarity NRZs and coding enable signal encode_enable need synchronous with bit clock signal bit_clk.Bit clock signal and data source unipolarity NRZ through with or door 121 after, through NAND gate 122, finish the gate of coding enable signal encode_enable, thereby produce Manchester's code.The Manchester code that this mode produces is when encode_enable is effective, and logical zero is encoded to the logical one of half bit period of preceding half bit period logical zero and back, and logical one is encoded to the logical zero of half bit period of preceding half bit period logical one and back; When encode_enable is invalid, be encoded to logic normal 1.Each timing waveform is referring to shown in Figure 2.
There is a problem in the Manchester code that manchester encoder 120 codings produce, because it is synchronous through bit clock bit_clk that data source unipolarity NRZ and coding enable encode_enable, and the Manchester's code circuit adopts is combinational circuit, therefore may produce burr in the signal hopping edge.Because the Manchester code that produces is the M signal as modified model Miller code coding herein, as long as the burr width that produces is in the CK of system clock skew and trigger holds Q end reference time delay, during then follow-up miller coding sampling the influence that can not be subjected to these burrs.The door that the advantage of this combinational logic just is to use is minimum, has saved resource and has improved circuit speed.If do not consider the requirement of resource, and want to avoid these burrs, can use other more ripe manchester encoder to substitute manchester encoder 120 in the utility model, but be the same for the effect of whole modified model Miller code coding circuit system.
Modulating pulse width parameter transducer 130 is finished the conversion to the modulating pulse width Control Parameter of modified model Miller code.Its parameter source can be the read-write special register of user from user-defined modulating pulse width parameter (modulating pulse width parameter effective value).Select signal to produce real modulating pulse width Control Parameter according to user configured communication speed again.If communication speed selects signal to select 106kbps, then modulating pulse width parameter effective value hangs down five effectively; If communication speed selects signal to select 212kbps, then modulating pulse width parameter effective value hangs down four effectively; If communication speed selects signal to select 424kbps, then modulating pulse width parameter effective value hangs down three effectively; If communication speed selects signal to select 847kbps, then modulating pulse width parameter effective value hangs down two effectively.The transfer function of modulating pulse width Control Parameter is tmod=2* (modulating pulse width parameter effective value effective value+1), and the modulating pulse width of the value representation modified model Miller code of tmod has the width of what system clock cycles.Its controlled step-length is 1 system clock cycle width, and controllable width scope minimum is 1 system clock cycle width, is the bit clock periodic width to the maximum half.
Modulating pulse width control counter 140 has been realized the counter that is used to produce the modified model Miller code and controls its modulating pulse width.Described counter comprises counter reset generator 141 and control counter 142.The Manchester code stream process system clock two-stage sampling that the counter reset generator produces by manchester encoder 120 codings, and producing the synchronous reset signal fc_cnt_clr (as shown in Figure 2) of modulating pulse width control counter through combinational circuit, its width is a system clock cycle.Control counter 142 has been finished the body of modulating pulse width control counter and has been realized that described counter clock is a system clock, and helps zero by the counter reset signal fc_cnt_clr synchronous reset that counter reset signal generator 141 produces.Described counter fc_cnt is just enabling counting action between the Manchester code low period, when counter fc_cnt value count down to the Control Parameter tmod value of modulating pulse width parameter change-over circuit generation, stops counting, does like this and can save power consumption.
Modified model Miller code encoder 150 is finished the coding of final modified model Miller code and is realized.The coding of described modified model Miller code encoder realizes that principle is, between the low period of output Manchester of manchester encoder 120, in the counter fc_cnt value of system clock along 140 generations of judgement modulating pulse width control technology device, and compare judgement with modulating pulse width parametric t mod that modulating pulse width parameter transducer 130 produces, if fc_cnt value is more than or equal to zero and during less than the tmod value, the output low level of then encoding, other situations output high level of all encoding, promptly having finished modulating pulse width is the long modified model Miller code of tmod system clock cycle.As shown in Figure 2.
The modulating pulse width scope and the communication speed relation of the modified model Miller code that the utility model coding produces are as shown in the table.
The utility model also supports to be input as the data source of Manchester code type.If in the circuit environment Manchester code stream was just arranged originally, then only need through after the coding enable signal gate, make it enable to keep when effective Manchester code stream at coding, coding enables when invalid to normal high, then directly enter modulating pulse width control counter 140, follow-up flow process is with the modified model Miller code coding flow process of unipolarity NRZ data source.
The utility model is not limited to execution mode discussed above.More than the description of embodiment is intended in order to describe and illustrate the technical scheme that the utility model relates to.Based on the conspicuous conversion of the utility model enlightenment or substitute and also should be considered to fall into protection range of the present utility model.Above embodiment is used for disclosing best implementation method of the present utility model, so that those of ordinary skill in the art can use numerous embodiments of the present utility model and multiple alternative reaches the purpose of this utility model.
Claims (7)
1. a modified model Miller code coding circuit is characterized in that, comprising:
The bit clock generator selects signal to produce the bit clock signal of designated communication speed by system clock and communication speed;
Manchester encoder, it is connected with clock generator, and the conversion of unipolarity NRZ code stream is generated interim Manchester code stream;
Modulating pulse width parameter change-over circuit is according to the suitable modulating pulse width Control Parameter of selection generation of communication speed;
Modulating pulse width control counter circuit, it is connected with manchester encoder, produces the counter of the modulating pulse width of control modified model Miller code;
Modified model Miller code encoder, it is connected with modulating pulse width control counter circuit, and coding produces the modified model Miller code of configurable modulating pulse width.
2. modified model Miller code coding circuit as claimed in claim 1 is characterized in that, described bit clock generator produces frequency-dividing clock by 13.56MHz system clock counter, selects signal to select to produce the bit clock of designated communication speed by communication speed again.
3. modified model Miller code coding circuit as claimed in claim 1 is characterized in that described bit clock generator can produce the bit clock of 106kbps, 212kbps, 424kbps and 847kbps communication speed.
4. modified model Miller code coding circuit as claimed in claim 1, it is characterized in that, described manchester encoder be one comprise one with or the door and the combinational circuit of a NAND gate, its input source unipolarity NRZ and coding enable signal need synchronous with bit clock, when the coding enabled state, the unipolarity NRZ is encoded into Manchester's code.
5. modified model Miller code coding circuit as claimed in claim 1 is characterized in that described modulating pulse width control counter comprises counter reset signal generator and control counter.
6. modulating pulse width control counter circuit as claimed in claim 5 is characterized in that, described counter reset signal generator is in single reset signal that produces the modulating pulse width control counter along the place of Manchester code; Described control counter is by the counter reset signal synchronous reset.
7. modified model Miller code coding circuit as claimed in claim 1, it is characterized in that, the modulating pulse width of the modified model Miller code that coding generates is adjustable, the scalable step-length is 1 system clock cycle width, controllable width scope minimum is 1 system clock cycle width, is the bit clock periodic width to the maximum half.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009200739357U CN201533303U (en) | 2009-05-20 | 2009-05-20 | Improved Miler code encoding circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009200739357U CN201533303U (en) | 2009-05-20 | 2009-05-20 | Improved Miler code encoding circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201533303U true CN201533303U (en) | 2010-07-21 |
Family
ID=42528702
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2009200739357U Expired - Fee Related CN201533303U (en) | 2009-05-20 | 2009-05-20 | Improved Miler code encoding circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201533303U (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103595420A (en) * | 2012-08-13 | 2014-02-19 | 上海华虹集成电路有限责任公司 | Decoder for decoding TYPE A signals transmitted by card reader |
| CN103595421A (en) * | 2012-08-13 | 2014-02-19 | 上海华虹集成电路有限责任公司 | A decoder for TYPE A basic data rate signals transmitted by a decoding card |
| CN104820812A (en) * | 2015-04-12 | 2015-08-05 | 浙江海康科技有限公司 | Method and device for decoding miller code modulated by subcarrier |
| CN108233940A (en) * | 2018-01-12 | 2018-06-29 | 南京中科微电子有限公司 | A kind of Miller code circuit based on ISO14443A agreements |
| CN113850098A (en) * | 2021-11-29 | 2021-12-28 | 杰创智能科技股份有限公司 | Data encoding device |
-
2009
- 2009-05-20 CN CN2009200739357U patent/CN201533303U/en not_active Expired - Fee Related
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103595420A (en) * | 2012-08-13 | 2014-02-19 | 上海华虹集成电路有限责任公司 | Decoder for decoding TYPE A signals transmitted by card reader |
| CN103595421A (en) * | 2012-08-13 | 2014-02-19 | 上海华虹集成电路有限责任公司 | A decoder for TYPE A basic data rate signals transmitted by a decoding card |
| CN103595420B (en) * | 2012-08-13 | 2018-02-13 | 上海华虹集成电路有限责任公司 | Decode the decoder for the TYPE a-signals that card reader is sent |
| CN104820812A (en) * | 2015-04-12 | 2015-08-05 | 浙江海康科技有限公司 | Method and device for decoding miller code modulated by subcarrier |
| CN104820812B (en) * | 2015-04-12 | 2017-09-05 | 浙江海康科技有限公司 | The coding/decoding method and decoding apparatus of a kind of miller code of subcarrier modulation |
| CN108233940A (en) * | 2018-01-12 | 2018-06-29 | 南京中科微电子有限公司 | A kind of Miller code circuit based on ISO14443A agreements |
| CN113850098A (en) * | 2021-11-29 | 2021-12-28 | 杰创智能科技股份有限公司 | Data encoding device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN201533303U (en) | Improved Miler code encoding circuit | |
| JP5225816B2 (en) | Semiconductor device | |
| CN103346804A (en) | IRIG-B (Inter Range Instrumentation Group) encoding and decoding system and method based on FPGA (Field Programmable Gate Array) | |
| CN101135951A (en) | Data output apparatus, memory system, data output method, and data processing method | |
| CN103297060A (en) | Decoding circuit suitable for correcting miller code signal at high speed | |
| CN103888147A (en) | Serial-to-parallel conversion circuit, serial-to-parallel converter and serial-to-parallel conversion system | |
| CN103297163B (en) | A kind of method and device being intended PCM communication by GPIO mouth die | |
| CN109217851A (en) | A kind of analog voltage comparator | |
| CN103559161B (en) | A kind of bus many width change-over circuit for FPGA configuration | |
| CN109656514A (en) | Random number generating system and its random-number generating method | |
| CN108768517A (en) | A kind of transmitting terminal, receiving terminal and visible light communication system based on PPM | |
| CN109240130A (en) | Programmable pin level control circuit | |
| CN102467674B (en) | Ultrahigh-frequency label FMO (Fast Moving Object) encoding digital signal circuit and implementation method thereof | |
| CN201774507U (en) | Multipath digital pulse generator | |
| CN103647558A (en) | Manchester encoder circuit | |
| CN103001901B (en) | Integrated circuit high-speed digital interface module based on modified difference pulse code modulation (MDPCM) | |
| CN103679077A (en) | Decoding circuit of pulse interval encoding | |
| CN203800923U (en) | Circuit suitable for chip test | |
| CN207218678U (en) | Support the Type A transmitting coding circuits of 4 kinds of communication speeds | |
| CN104484992A (en) | Infrared remote control decoder based on programmable logic device | |
| CN107465418A (en) | A kind of 14443Type A transmitting coding circuits for supporting 4 kinds of communication speeds | |
| CN203800922U (en) | Function switching circuit suitable for chip test | |
| CN103186978B (en) | Control the circuit structure of Infrared Remote-Control Sending | |
| CN102714641A (en) | System and method for bi-phase modulation decoding | |
| CN109993240A (en) | A kind of serial synchronous implementation method of modified Miller coding |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20100721 Termination date: 20180520 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |