CN201336671Y - Interface converting circuit, DVR and GPS - Google Patents

Interface converting circuit, DVR and GPS Download PDF

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Publication number
CN201336671Y
CN201336671Y CNU2008202140980U CN200820214098U CN201336671Y CN 201336671 Y CN201336671 Y CN 201336671Y CN U2008202140980 U CNU2008202140980 U CN U2008202140980U CN 200820214098 U CN200820214098 U CN 200820214098U CN 201336671 Y CN201336671 Y CN 201336671Y
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China
Prior art keywords
circuit
transceiver
interface
resistance
divider resistance
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Expired - Fee Related
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CNU2008202140980U
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Chinese (zh)
Inventor
曹振民
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Shenzhen Coship Electronics Co Ltd
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Shenzhen Coship Electronics Co Ltd
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Priority to CNU2008202140980U priority Critical patent/CN201336671Y/en
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Abstract

The utility model is applicable to the field of communication, and provides an interface converting circuit, a DVR and a GPS, wherein, the interface converting circuit comprises an RS485 transceiver, a control circuit and a divider circuit; one end of the RS485 transceiver is connected with a UART interface circuit, and the other end of the RS485 transceiver is connected with an RS485 interface circuit; the control circuit is connected with the control terminal of the RS485 transceiver and used for controlling the mutual conversion of communication protocols between the UART interface circuit and the RS485 interface circuit; and the divider circuit connected between the RS485 transceiver and the RS485 interface circuit. The interface converting circuit provided by the utility model can realize the communication conversion between the UART interface circuit and the RS485 interface circuit, and has the advantages of simple circuits, practicality and low cost.

Description

A kind of interface conversion circuit, DVR equipment and GPS equipment
Technical field
The utility model belongs to the communications field, relates to a kind of interface conversion circuit, DVR equipment and GPS equipment.
Background technology
The RS485 interface has antijamming capability and multi-load ability, and the RS485 interface becomes vehicle-mounted digital video cassette recorder (Digital Video Recorder, important communication interface DVR); UART Universal Asynchronous Receiver Transmitter (Universal Asynchronous Receiver/Transmitter, UART) has good asynchronous communication ability, the UART interface is being controlled the information flow of a lot of DVR plug-in devices, and for example GPS modules such as the LEA-4S of Ublox company and LEA-5S all are equipped with UART interface and USB communication interface.
In order to make host side with different communication interfaces and the realization communication between the equipment end, need a kind of interface conversion circuit that the communications protocol between RS485 interface and the UART interface is changed mutually.
The utility model content
The purpose of this utility model is to provide a kind of interface conversion circuit that can realize the conversion of the communication between UART interface circuit and the RS485 interface circuit.
The utility model is achieved in that a kind of interface conversion circuit, comprising:
The RS485 transceiver, the one end connects the UART interface circuit, and the other end connects the RS485 interface circuit;
Control circuit is connected to the control end of described RS485 transceiver, controls the mutual conversion of communications protocol between described UART interface circuit and the described RS485 interface circuit;
Bleeder circuit is connected between described RS485 transceiver and the described RS485 interface circuit.
Another purpose of the present utility model is to provide a kind of DVR equipment that adopts above-mentioned interface conversion circuit.
Another purpose of the present utility model is to provide the above-mentioned interface conversion circuit GPS of a kind of employing equipment.
The interface conversion circuit that the utility model embodiment provides can be realized the communication conversion between UART interface circuit and the RS485 interface circuit, and circuit is simple, practical, cost is low.
Description of drawings
Fig. 1 is the structure chart of the interface conversion circuit that provides of the utility model embodiment;
Fig. 2 is the building-block of logic between the interface conversion circuit that provides of the utility model embodiment and host terminal, the device end.
Embodiment
In order to make the purpose of this utility model, technical scheme and advantage clearer,, the utility model is further elaborated below in conjunction with drawings and Examples.Should be appreciated that specific embodiment described herein only in order to explanation the utility model, and be not used in qualification the utility model.
The interface conversion circuit that the utility model embodiment provides can be realized the communication conversion between UART interface circuit and the RS485 interface circuit, and circuit is simple, practical, cost is low.
The interface conversion circuit that the utility model embodiment provides can be applied in DVR equipment or the GPS equipment, and its structure for convenience of explanation, only shows the part relevant with the utility model embodiment as shown in Figure 1, and details are as follows.
Interface conversion circuit 1 comprises: RS485 transceiver 10, control circuit 11 and bleeder circuit 12, and wherein, an end of RS485 transceiver 10 connects UART interface circuit 20, and the other end connects RS485 interface circuit 30; Control circuit 11 is connected to control end/RE, the DE of RS485 transceiver 10, the mutual conversion of communications protocol between control UART interface circuit 20 and the RS485 interface circuit 30; Bleeder circuit 12 is connected between RS485 transceiver 10 and the RS485 interface circuit 30.
The operation level of UART interface circuit 20 is a Transistor-Transistor Logic level, and the operation level of RS485 interface circuit 30 is the AB differential level; RS485 transceiver 10 will be changed between Transistor-Transistor Logic level and the AB differential level mutually.Concrete transfer process is as follows: RS485 transceiver 10 is received the data that UART interface circuit 20 sends by the TXD termination, exports RS485 interface circuit 30 through after the level conversion to from A, B differential data line; Perhaps RS485 transceiver 10 is by the data of A, B differential data line reception RS485 interface circuit 30, through being sent to UART interface circuit 20 from the RXD end after the level conversion.
In the utility model embodiment, RS485 transceiver 10 is half-duplex asynchronism transceivers, the direction of its transfer of data is by the signal controlling of control end/RE, DE, as control end/RE, when the DE signal is low level, data flow is from the A of RS485 interface circuit 30, the RXD end transmission of B differential data alignment UART interface circuit 20; As control end/RE, when the DE signal is high level, data flow is transmitted to A, the B differential data line of RS485 interface circuit 30 from the TXD end of UART interface circuit 20.
In the utility model embodiment, UART interface circuit 20 has and draws defencive function in the output, and the back TXD end when free of data export that promptly powers on is a logical one, corresponding TTL high level.Control circuit 11 according to this characteristics design comprises: transistor Q, first resistance R 1 and second resistance R 2; Wherein, the base stage of transistor Q is connected to an end of RS485 transceiver 10 by second resistance R 2, the grounded emitter GND of transistor Q, and the collector electrode of transistor Q is connected to control end/RE, the DE of RS485 transceiver 10; One end of first resistance R 1 is connected to control end/RE, the DE of RS485 transceiver, and the other end is connected to power supply VCC.As an embodiment of the present utility model, transistor Q is a switch triode.
In the utility model embodiment, bleeder circuit 12 comprises: be connected in series in the first divider resistance R3, the second divider resistance R4 and the 3rd divider resistance R5 between power supply VCC and the ground GND successively; The first divider resistance R3 is connected with the A differential data line of RS485 transceiver 10 with the end that is connected in series of the second divider resistance R4, and the second divider resistance R4 is connected with the B differential data line of RS485 transceiver 10 with the end that is connected in series of the 3rd divider resistance R5.
Fig. 2 shows the logical construction between interface conversion circuit 1 that the utility model embodiment provides and host terminal 3, the device end 2, for convenience of explanation, only shows the part relevant with the utility model, and details are as follows.
Interface conversion circuit 1 is connected between device end 2 and the host terminal 3, realize the communication conversion between host terminal 3 and the device end 2, device end 2 comprises UART interface circuit 20, host terminal 3 comprises RS485 interface circuit 30, interface conversion circuit 1 comprises: RS485 transceiver 10, control circuit 11 and bleeder circuit 12, wherein, an end of RS485 transceiver 10 connects UART interface circuit 20, and the other end connects RS485 interface circuit 30; Control circuit 11 is connected to control end/RE, the DE of RS485 transceiver 10, the mutual conversion of communications protocol between control UART interface circuit 20 and the RS485 interface circuit 30; Bleeder circuit 12 is connected between RS485 transceiver 10 and the RS485 interface circuit 30.
Wherein, control circuit 11 further comprises: transistor Q, first resistance R 1 and second resistance R 2; Wherein, the base stage of transistor Q is connected to an end of RS485 transceiver 1 by second resistance R 2, the grounded emitter GND of transistor Q, and the collector electrode of transistor Q is connected to control end/RE, the DE of RS485 transceiver 1; One end of first resistance R 1 is connected to control end/RE, the DE of RS485 transceiver, and the other end is connected to power supply VCC.
Bleeder circuit 12 further comprises: be connected in series in the first divider resistance R3, the second divider resistance R4 and the 3rd divider resistance R5 between power supply VCC and the ground GND successively; The first divider resistance R3 is connected with the A differential data line of RS485 transceiver 10 with the end that is connected in series of the second divider resistance R4, and the second divider resistance R4 is connected with the B differential data line of RS485 transceiver 10 with the end that is connected in series of the 3rd divider resistance R5.
Now be DVR with the host side, equipment end is the operation principle that example describes interface conversion circuit 1 in detail for the GPS module: the GPS module receives high frequency GPS information, carries out communication by UART interface circuit 20; RS485 interface circuit 30 is used to realize the communication between DVR and the RS485 transceiver 10; RS485 transceiver 10 is used to realize that Transistor-Transistor Logic level changes to the AB differential level; Control circuit 11 is used for the transmission direction of control data stream.
The control end of RS485 transceiver 10 is connected with transistor collector in the control circuit 11, and by drawing on first resistance R 1, and transistor base is received the TXD end of RS485 transceiver 10 by second resistance R 2, emitter ground connection makes the signal of TXD end and the signal of control end just constitute reverse signal mutually; The power supply VCC of RS485 transceiver 10, differential data line A, B, and cross-over connection three divider resistance R3, R4, R5 between the ground GND; When not having data to transmit, the level on the AB differential data line is determined by divider resistance.
When the GPS module did not send data, because the Transistor-Transistor Logic level output signal is to draw on the inside, promptly the TXD end was high level, transistor turns, the signal of control end/RE, DE is clamped down on is low level, and the data on A, the B differential data line are read by RS485 transceiver 10, delivers to the GPS module by the RXD end; Realized that DVR sends data to the GPS module.
When the GPS module sends data, the variation of high-low level appears, when sending " 0 " on the TXD end, transistor ends, the signal of control end/RE, DE is clamped down on is high level, and the Transistor-Transistor Logic level normal conversion of TXD end is A, B differential level, delivers to the DVR main frame by the AB differential data line; When sending " 1 ", transistor turns, the signal of control end/RE, DE is clamped down on low level, has different header files owing to send data with the reception data, the invalid data that the GPS module can be read the RXD end abandons, and the level value on the AB differential data line is controlled by divider resistance R3, R4, R5, and the resistance value of divider resistance R3, R4, R5 can design according to the real work needs; Realized that the GPS module sends data to DVR.
The interface conversion circuit that the utility model embodiment provides can be realized the communication conversion between UART interface circuit and the RS485 interface circuit, and circuit is simple, practical, cost is low.
The above only is preferred embodiment of the present utility model; not in order to restriction the utility model; all any modifications of within spirit of the present utility model and principle, being done, be equal to and replace and improvement etc., all should be included within the protection range of the present utility model.

Claims (7)

1, a kind of interface conversion circuit is characterized in that, described interface conversion circuit comprises:
The RS485 transceiver, the one end connects the UART interface circuit, and the other end connects the RS485 interface circuit;
Control circuit is connected to the control end of described RS485 transceiver, controls the mutual conversion of communications protocol between described UART interface circuit and the described RS485 interface circuit;
Bleeder circuit is connected between described RS485 transceiver and the described RS485 interface circuit.
2, interface conversion circuit as claimed in claim 1 is characterized in that, described RS485 transceiver is the half-duplex asynchronism transceiver.
3, interface conversion circuit as claimed in claim 1 is characterized in that, described control circuit comprises:
Transistor, first resistance and second resistance;
Described transistorized base stage is connected to an end of described RS485 transceiver by described second resistance, described transistorized grounded emitter, and described transistorized collector electrode is connected to the control end of described RS485 transceiver;
One end of described first resistance is connected to the control end of described RS485 transceiver, and the other end is connected to power supply.
4, interface conversion circuit as claimed in claim 3 is characterized in that, described transistor is a switch triode.
5, interface conversion circuit as claimed in claim 1 is characterized in that, described bleeder circuit comprises:
Be connected in series in first divider resistance, second divider resistance and the 3rd divider resistance between power supply and the ground successively;
Described first divider resistance is held with being connected in series of described second divider resistance and described second divider resistance is connected with the other end of described RS485 transceiver with the end that is connected in series of described the 3rd divider resistance.
6, a kind of DVR equipment is characterized in that, described DVR equipment comprises the arbitrary interface conversion circuit of claim 1 to 5.
7, a kind of GPS equipment is characterized in that, described GPS equipment comprises the arbitrary interface conversion circuit of claim 1 to 5.
CNU2008202140980U 2008-12-01 2008-12-01 Interface converting circuit, DVR and GPS Expired - Fee Related CN201336671Y (en)

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Application Number Priority Date Filing Date Title
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Application Number Priority Date Filing Date Title
CNU2008202140980U CN201336671Y (en) 2008-12-01 2008-12-01 Interface converting circuit, DVR and GPS

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103678232A (en) * 2013-12-01 2014-03-26 国家电网公司 RS485 signal forwarding device
CN105022711A (en) * 2014-04-23 2015-11-04 林新辉 serial bus communication architecture
CN108683577A (en) * 2018-07-24 2018-10-19 武汉盛帆电子股份有限公司 Interface conversion circuit and double nip device
CN109684253A (en) * 2017-10-19 2019-04-26 佛山市顺德区顺达电脑厂有限公司 Data transmission control circuit
CN110389919A (en) * 2019-07-04 2019-10-29 苏州浪潮智能科技有限公司 Asynchronous receiving-transmitting transmitter peripheral hardware and system based on RISC-V processor
CN111601443A (en) * 2020-06-01 2020-08-28 深圳市启明亮科技有限公司 RS485 signal receiving assembly capable of saving communication lines, RS485 communication circuit and lamp

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103678232A (en) * 2013-12-01 2014-03-26 国家电网公司 RS485 signal forwarding device
CN105022711A (en) * 2014-04-23 2015-11-04 林新辉 serial bus communication architecture
CN109684253A (en) * 2017-10-19 2019-04-26 佛山市顺德区顺达电脑厂有限公司 Data transmission control circuit
CN108683577A (en) * 2018-07-24 2018-10-19 武汉盛帆电子股份有限公司 Interface conversion circuit and double nip device
CN108683577B (en) * 2018-07-24 2024-04-09 武汉盛帆电子股份有限公司 Interface conversion circuit and dual-interface device
CN110389919A (en) * 2019-07-04 2019-10-29 苏州浪潮智能科技有限公司 Asynchronous receiving-transmitting transmitter peripheral hardware and system based on RISC-V processor
CN110389919B (en) * 2019-07-04 2021-03-19 苏州浪潮智能科技有限公司 RISC-V processor based asynchronous transceiver peripheral and system
CN111601443A (en) * 2020-06-01 2020-08-28 深圳市启明亮科技有限公司 RS485 signal receiving assembly capable of saving communication lines, RS485 communication circuit and lamp
CN111601443B (en) * 2020-06-01 2021-05-04 深圳市启明亮科技有限公司 RS485 signal receiving assembly capable of saving communication lines, RS485 communication circuit and lamp

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CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20091028

Termination date: 20151201

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