CN201226356Y - LED packaging structure for preventing fluorescent powder light-emitting efficiency from reducing due to high temperature - Google Patents
LED packaging structure for preventing fluorescent powder light-emitting efficiency from reducing due to high temperature Download PDFInfo
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- CN201226356Y CN201226356Y CNU2008201196175U CN200820119617U CN201226356Y CN 201226356 Y CN201226356 Y CN 201226356Y CN U2008201196175 U CNU2008201196175 U CN U2008201196175U CN 200820119617 U CN200820119617 U CN 200820119617U CN 201226356 Y CN201226356 Y CN 201226356Y
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- 238000004806 packaging method and process Methods 0.000 title abstract 3
- 239000000843 powder Substances 0.000 title 1
- 239000000084 colloidal system Substances 0.000 claims abstract description 91
- 239000000758 substrate Substances 0.000 claims abstract description 30
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims abstract description 29
- 229910052751 metal Inorganic materials 0.000 claims description 7
- 239000002184 metal Substances 0.000 claims description 7
- 229910052782 aluminium Inorganic materials 0.000 claims description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 6
- 239000000463 material Substances 0.000 claims description 6
- 229920001342 Bakelite® Polymers 0.000 claims description 5
- 239000004637 bakelite Substances 0.000 claims description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 3
- 229910000831 Steel Inorganic materials 0.000 claims description 3
- 239000004411 aluminium Substances 0.000 claims description 3
- 239000000919 ceramic Substances 0.000 claims description 3
- 229910052802 copper Inorganic materials 0.000 claims description 3
- 239000010949 copper Substances 0.000 claims description 3
- 239000003822 epoxy resin Substances 0.000 claims description 3
- 238000004020 luminiscence type Methods 0.000 claims description 3
- 229920000647 polyepoxide Polymers 0.000 claims description 3
- 239000000741 silica gel Substances 0.000 claims description 3
- 229910002027 silica gel Inorganic materials 0.000 claims description 3
- 239000010959 steel Substances 0.000 claims description 3
- 238000000034 method Methods 0.000 abstract description 17
- 239000011248 coating agent Substances 0.000 abstract 1
- 238000000576 coating method Methods 0.000 abstract 1
- 238000012858 packaging process Methods 0.000 abstract 1
- 230000003287 optical effect Effects 0.000 description 13
- 238000012856 packing Methods 0.000 description 10
- 238000005538 encapsulation Methods 0.000 description 8
- 238000005516 engineering process Methods 0.000 description 7
- 238000010276 construction Methods 0.000 description 3
- 238000007323 disproportionation reaction Methods 0.000 description 3
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000005284 excitation Effects 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 238000012536 packaging technology Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Device Packages (AREA)
Abstract
The utility model relates to a light-emitting diode packaging structure which reduces the light-emitting efficiency of phosphor so as to avoid high temperature. The light-emitting diode packaging structure comprises a substrate unit, a light-emitting unit, a transparent colloidal unit and a fluorescent colloidal unit. The light-emitting unit is provided with a plurality of light-emitting diode chips which are electrically arranged on the substrate unit respectively. The transparent colloidal unit is equipped with a plurality of transparent colloids which are respectively coated on the light-emitting diode chips. The fluorescent colloidal unit is provided with a plurality of fluorescent colloids which are respectively coated on the transparent colloids. A framework unit is used for coating around the transparent colloids and around the fluorescent colloids, and only the upper surfaces of the fluorescent colloids are exposed out of the framework unit. When the light-emitting diode structure emits light, the continuous light-emitting zone can be formed; no uneven brightness can occur; the direct packaging process with the chips and the pressing die can effectively shorten the process time; and the utility model can be produced in the large scale.
Description
Technical field
The utility model relates to a kind of encapsulating structure of light-emitting diode chip for backlight unit, relates in particular to a kind of Yin Gaowen of avoiding and reduces the package structure for LED of light-emitting phosphor efficient.
Background technology
Please refer to shown in Figure 1ly, it is the flow chart of first kind of method for packing of known light-emitting diode.By in the flow chart as can be known, first kind of method for packing of known light-emitting diode, its step comprises: at first, the light-emitting diode that step S800 provides a plurality of encapsulation to finish; Then, step S802 provides the strip substrate body, has positive conductive traces and negative pole conductive traces above it; At last, the light-emitting diode that step S804 finishes each encapsulation in order is arranged on this strip substrate body, and the positive and negative positive and negative electrode conductive traces that extremely is electrically connected at this strip substrate body respectively of the light-emitting diode that each encapsulation is finished.
Please refer to shown in Figure 2ly, it is the flow chart of second kind of method for packing of known light-emitting diode.By in the flow chart as can be known, second kind of method for packing of known light-emitting diode, its step comprises: at first, step S900 provides the strip substrate body, has positive conductive traces and negative pole conductive traces above it; Then, step S902 is arranged on a plurality of light-emitting diode chip for backlight unit on this strip substrate body in order, and with the positive and negative positive and negative electrode conductive traces that extremely is electrically connected at this strip substrate body respectively of each light-emitting diode chip for backlight unit; At last, step S904 covers the strip fluorescent colloid on this strip substrate body and the described a plurality of light-emitting diode chip for backlight unit, to form an optical wand that has a strip light-emitting zone.
Yet, first kind of method for packing about above-mentioned known light-emitting diode, because the light-emitting diode that each encapsulation is finished must cut down from a monoblock LED package earlier, and then with surface adhering technology (SMT) technology, the light-emitting diode that each encapsulation is finished is arranged on this strip substrate body, therefore its process time can't effectively be shortened, in addition, when luminous, have blanking bar (dark band) phenomenon between the light-emitting diode that described a plurality of encapsulation is finished and exist, still produce not good effect for user's sight line.
In addition, about second kind of method for packing of above-mentioned known light-emitting diode, because the optical wand of being finished has the strip light-emitting zone, therefore second kind of method for packing will can not produce the problem of blanking bar.Yet, because the zone that this strip fluorescent colloid is excited is uneven, thereby the optical efficiency that causes optical wand is not good (is yet, can produce stronger excitation source near the fluorescent colloid of light-emitting diode chip for backlight unit zone, then produce more weak excitation source) away from the fluorescent colloid zone of light-emitting diode chip for backlight unit.
In addition, known technology all directly overlays fluorescent colloid the surface of light-emitting diode chip for backlight unit, and the heat that therefore causes light-emitting diode chip for backlight unit and produced can directly have influence on the quality of fluorescent colloid, and then causes the reduction of light-emitting phosphor efficient.
The utility model content
Technical problem to be solved in the utility model is a kind of Yin Gaowen of avoiding is provided and the package structure for LED that reduces light-emitting phosphor efficient.Light emitting diode construction of the present utility model is when luminous, form continuous light-emitting zone, and the situation of not having brightness disproportionation takes place, and the utility model directly encapsulates (Chip On Board by chip, COB) technology and utilize the mode of pressing mold (die mold), so that the utility model can shorten its process time effectively, and can produce in a large number.
In addition, fluorescent colloid of the present utility model does not directly touch light-emitting diode chip for backlight unit, so the high temperature that the utility model can be avoided producing because of light-emitting diode reduces light-emitting phosphor efficient.
In addition, structural design of the present utility model more is applicable to various light sources, such as application such as backlight module, Decorating lamp strip, illuminator lamp or scanner light sources, is all applied scope of the utility model and product.
In order to solve the problems of the technologies described above, according to wherein a kind of scheme of the present utility model, a kind of Yin Gaowen of avoiding is provided and reduces the package structure for LED of light-emitting phosphor efficient, it comprises: base board unit, luminescence unit, transparent colloid unit, fluorescent colloid unit and frame unit.
Wherein, this base board unit has substrate body and is respectively formed at positive conductive traces and negative pole conductive traces on this substrate body.This luminescence unit has a plurality of light-emitting diode chip for backlight unit that electrically are arranged on respectively on this base board unit.Wherein each light-emitting diode chip for backlight unit has the positive terminal and the negative pole end of the positive and negative electrode conductive traces that is electrically connected at this base board unit respectively.This transparent colloid unit has a plurality of transparent colloids that cover respectively on described a plurality of light-emitting diode chip for backlight unit.This fluorescent colloid unit is to have a plurality of fluorescent colloids that cover respectively on described a plurality of shape transparent colloid.This frame unit coat described a plurality of transparent colloids around and described a plurality of fluorescent colloids around, and only expose the upper surface of described a plurality of fluorescent colloids.
Reduce in the package structure for LED of light-emitting phosphor efficient at the described Yin Gaowen of avoiding, this base board unit is printed circuit board (PCB), soft base plate, aluminium base, ceramic substrate or copper base.
Reduce in the package structure for LED of light-emitting phosphor efficient at the described Yin Gaowen of avoiding, this substrate body comprises metal level and is formed in bakelite layer on this metal level.
Reduce in the package structure for LED of light-emitting phosphor efficient at the described Yin Gaowen of avoiding, this positive and negative electrode conductive traces is aluminum steel road or silver-colored circuit.
Reduce in the package structure for LED of light-emitting phosphor efficient at the described Yin Gaowen of avoiding, each fluorescent colloid is mixed by silica gel and fluorescent material or is mixed by epoxy resin and fluorescent material.
Reduce in the package structure for LED of light-emitting phosphor efficient at the described Yin Gaowen of avoiding, this frame unit is a ccf layer.
Reduce in the package structure for LED of light-emitting phosphor efficient at the described Yin Gaowen of avoiding, this ccf layer is light tight ccf layer, and this light tight ccf layer is the white box rack-layer.
Reduce in the package structure for LED of light-emitting phosphor efficient at the described Yin Gaowen of avoiding, this frame unit is a plurality of frameworks all around that reach each fluorescent colloid all around that coat each transparent colloid respectively.
Reduce in the package structure for LED of light-emitting phosphor efficient at the described Yin Gaowen of avoiding, described a plurality of frameworks are light tight framework, and described a plurality of light tight framework is white framework.
Reduce in the package structure for LED of light-emitting phosphor efficient at the described Yin Gaowen of avoiding, the upper surface of each transparent colloid and front surface have transparent colloid cambered surface and transparent colloid exiting surface, and described a plurality of fluorescent colloid covers respectively on the transparent colloid exiting surface of described a plurality of transparent colloids.
Therefore, the utility model light emitting diode construction forms continuous light-emitting zone when luminous, and does not have the situation generation of brightness disproportionation.In addition, the high temperature that the utility model can be avoided producing because of light-emitting diode reduces light-emitting phosphor efficient, and the utility model is by the direct packaging technology of chip and utilize the mode of pressing mold, so that the utility model can shorten its process time effectively, and can produce in a large number.
In order further to understand the utility model is to reach technology, means and the effect that predetermined purpose is taked, please refer to following about detailed description of the present utility model and accompanying drawing, believe the purpose of this utility model, feature and characteristics, when can going deep into thus and concrete understanding, yet appended accompanying drawing only provides reference and explanation usefulness, is not to be used for the utility model is limited.
Description of drawings
Fig. 1 is the flow chart of first kind of method for packing of known light-emitting diode;
Fig. 2 is the flow chart of second kind of method for packing of known light-emitting diode;
Fig. 3 a is respectively the encapsulation flow process schematic perspective view of first embodiment of the utility model encapsulating structure to Fig. 3 e;
Fig. 3 A is respectively the encapsulation flow process generalized section of first embodiment of the utility model encapsulating structure to Fig. 3 E;
Fig. 4 reaches the schematic diagram of electric connection for the utility model light-emitting diode chip for backlight unit by the mode of flip-chip (flip-chip);
Fig. 5 a is the schematic perspective view of second embodiment of the utility model encapsulating structure;
Fig. 5 A is the generalized section of second embodiment of the utility model encapsulating structure;
Fig. 6 a is the schematic perspective view of the 3rd embodiment of the utility model encapsulating structure;
Fig. 6 A is the generalized section of the 3rd embodiment of the utility model encapsulating structure;
Fig. 7 a is the schematic perspective view of the 4th embodiment of the utility model encapsulating structure; And
Fig. 7 A is the generalized section of the 4th embodiment of the utility model encapsulating structure.
Wherein, description of reference numerals is as follows:
Base board unit 1 substrate body 10
Bakelite layer 10B
Positive conductive traces 11
Negative pole conductive traces 12
This base board unit 1 ' positive conductive traces 11 '
Negative pole conductive traces 12 '
Vertically light-emitting diode chip for backlight unit is arranged 2 light-emitting diode chip for backlight unit 20
Light-emitting diode chip for backlight unit 20 '
Positive terminal 201 '
Negative pole end 202 '
Strip transparent colloid 3 transparent colloids 30
Transparent colloid 30 '
Transparent colloid cambered surface 300 "
Transparent colloid exiting surface 301 "
Strip fluorescent colloid 4 fluorescent colloids 40
Fluorescent colloid 40 '
Framework 50 '
Lead W
Tin ball B
The first die unit M1, the first mold M11
First passage M110
The first bed die M12
The second die unit M2, the second mold M21
Second channel M210
The second bed die M22
Optical wand L1
Optical wand L2
Optical wand L3
Optical wand L4
Embodiment
Please refer to Fig. 3 a to Fig. 3 e, and Fig. 3 A to Fig. 3 E shown in, first embodiment of the present utility model provides a kind of Yin Gaowen of avoiding and reduces the method for packing of the light-emitting diode chip for backlight unit of light-emitting phosphor efficient, it comprises the following steps:
At first, please cooperate shown in Fig. 3 a and Fig. 3 A, base board unit 1 is provided, it has substrate body 10, reaches a plurality of positive conductive traces 11 and a plurality of negative pole conductive traces 12 that are formed at respectively on this substrate body 10.
Wherein, this substrate body 10 comprises metal level 10A and is formed in bakelite layer (bakelite layer) 10B (shown in Fig. 3 a and Fig. 3 A) on this metal level 10A.According to different design requirements, this base board unit 10 can be printed circuit board (PCB), soft base plate, aluminium base, ceramic substrate or copper base.In addition, this positive and negative electrode conductive traces 11,12 can adopt aluminum steel road or silver-colored circuit, and the layout (layout) of this positive and negative electrode conductive traces 11,12 can change to some extent along with different needs.
Then, please cooperate shown in Fig. 3 b and Fig. 3 B, mode by matrix (matrix), a plurality of light-emitting diode chip for backlight unit 20 are set respectively on this substrate body 10, to form the vertical light-emitting diode chip for backlight unit row 2 of many rows, wherein each light-emitting diode chip for backlight unit 20 has the positive terminal 201 and negative pole end 202 of the positive and negative electrode conductive traces 11,12 that is electrically connected at this base board unit respectively.
In addition, with first embodiment of the present utility model, each light-emitting diode chip for backlight unit 20 positive and negative extreme 201,202 by two corresponding lead W and in the mode of routing, produce with positive and negative electrode conductive traces 11,12 and to electrically connect with this substrate body unit 1.In addition, each is arranged vertical light-emitting diode chip for backlight unit row 2 arrangement modes with straight line and is arranged on the substrate body 10 of this base board unit 1, and each light-emitting diode chip for backlight unit 20 can be a blue led chips.
Certainly, the electric connection mode of above-mentioned described a plurality of light-emitting diode chip for backlight unit 20 is not in order to limit the utility model, for example: please refer to (the utility model light-emitting diode chip for backlight unit is reached the schematic diagram of electric connection by the mode of flip-chip) shown in Figure 4, each light-emitting diode chip for backlight unit 20 ' positive and negative extreme 201 ', 202 ' by a plurality of corresponding tin ball B and in the mode of flip-chip, with this base board unit 1 ' positive and negative electrode conductive traces 11 ', 12 ' produce and electrically connect.In addition, according to different design requirements, the mode that described a plurality of light-emitting diode chip for backlight unit (accompanying drawing is not shown) positive and negative extremely can be connected (parallel), (serial) in parallel or series connection add parallel connection (parallel/serial) produces with the positive and negative electrode conductive traces with this base board unit (accompanying drawing is not shown) and to electrically connect.
Then, please cooperate shown in Fig. 3 c and Fig. 3 C,, many strip transparent colloids 3 longitudinally be covered each respectively arrange on vertical light-emitting diode chip for backlight unit row 2 by the first die unit M1.
Wherein, this first die unit M1 by the first mold M11 and the first bed die M12 that is used to carry this substrate body 10 formed, and this first mold M11 has many corresponding described a plurality of vertical light-emitting diode chip for backlight unit rows' 2 first passage M110.In addition, the height of each first passage M110 and width are identical with the height and the width of the corresponding strip transparent colloid 3 of each bar.
Then, please cooperate shown in Fig. 3 d and Fig. 3 D,, many strip fluorescent colloids 4 longitudinally be covered respectively on each bar strip transparent colloid fully by the second die unit M2.
Wherein, this second die unit M2 by the second mold M21 and the second bed die M22 that is used to carry this substrate body 10 formed, and this second mold M21 has the second channel M210 of many corresponding described a plurality of strip transparent colloids 3, and the height of each second channel M210 and width are identical with the height and the width of the corresponding strip fluorescent colloid 4 of each bar in addition.In addition, the corresponding strip transparent colloid 3 of each bar can be according to different user demands, and are chosen as: mixed or mixed by epoxy resin and fluorescent material by silica gel and fluorescent material.
At last, referring again to Fig. 3 d, and cooperate shown in Fig. 3 e and Fig. 3 E, between per two vertical light-emitting diode chip for backlight unit 20, laterally cut described a plurality of strip transparent colloid 3, described a plurality of strip fluorescent colloids 4 and this substrate body 10, to form many optical wand L1, wherein each bar optical wand L1 has a plurality of transparent colloid 30 and a plurality of fluorescent colloids 40 that are covered in each transparent colloid 30 apart from each other respectively that are covered in respectively apart from each other on each light-emitting diode chip for backlight unit 20.
Please refer to Fig. 5 a and Fig. 5 A, the difference of second embodiment and the first embodiment maximum is: in a second embodiment, described a plurality of transparent colloid 30 ' be covered in respectively apart from each other on each light-emitting diode chip for backlight unit 20, each transparent colloid 30 ' upper surface of and described a plurality of fluorescent colloid 40 ' cover respectively apart from each other.In addition, ccf layer 50 coat all transparent colloids 30 on each bar optical wand L2 ' around and all fluorescent colloids 40 ' around.
Please refer to Fig. 6 a and Fig. 6 A, the difference of the 3rd embodiment and the first embodiment maximum is: in the 3rd embodiment, described a plurality of transparent colloid 30 ' be covered in respectively apart from each other on each light-emitting diode chip for backlight unit 20, each transparent colloid 30 of and described a plurality of fluorescent colloid 40 ' be covered in respectively apart from each other ' on.In addition, each transparent colloid 30 on each bar optical wand L3 of a plurality of frameworks 50 ' coat respectively ' around and each fluorescent colloid 40 ' around.
Please refer to shown in Fig. 7 a and Fig. 7 A, the difference of the 4th embodiment and the first embodiment maximum is: in the 4th embodiment, each bar optical wand L4 has a plurality of light-emitting diode chip for backlight unit 20 that electrically are arranged on the substrate body 10.Each transparent colloid 30 " form on each light-emitting diode chip for backlight unit 20, and each transparent colloid 30 " upper surface and front surface have transparent colloid cambered surface 300 " and transparent colloid exiting surface 301 ".In addition, each fluorescent colloid 40 transparent colloid exiting surface 301 of " covering each transparent colloid 30 " " on.At last, each framework 50 transparent colloid cambered surface 300 of " forming in each transparent colloid 30 " " on.
In sum, light emitting diode construction of the present utility model is when luminous, form continuous light-emitting zone, and the situation of not having brightness disproportionation takes place, and the utility model is by the direct packaging technology of chip and utilize the mode of pressing mold, so that the utility model can shorten its process time effectively, and can produce in a large number.In addition, fluorescent colloid of the present utility model does not directly touch light-emitting diode chip for backlight unit, so the high temperature that the utility model can be avoided producing because of light-emitting diode reduces light-emitting phosphor efficient.In addition, structural design of the present utility model more is applicable to various light sources, such as application such as backlight module, Decorating lamp strip, illuminator lamp or scanner light sources, is applied scope of the utility model and product.
As mentioned above, only be the detailed description and the accompanying drawing of one of preferred specific embodiment of the utility model, feature of the present utility model is not limited thereto, be not in order to restriction the utility model, all scopes of the present utility model should be as the criterion with following claim, all embodiment that meets the spirit variation similar of the utility model claim with it, all should be included in the scope of the present utility model, any persons skilled in the art are in field of the present utility model, under the prerequisite that does not break away from spirit of the present invention,, all should be included in the scope of the present utility model replacement or modification that the present invention did.
Claims (10)
1, a kind of Yin Gaowen of avoiding and reduce the package structure for LED of light-emitting phosphor efficient is characterized in that, comprising:
Base board unit, it has substrate body and is respectively formed at positive conductive traces and negative pole conductive traces on this substrate body;
Luminescence unit, it has a plurality of light-emitting diode chip for backlight unit that electrically are arranged at respectively on this base board unit, and wherein each light-emitting diode chip for backlight unit has the positive terminal and the negative pole end of the positive and negative electrode conductive traces that is electrically connected at this base board unit respectively;
The transparent colloid unit, it has a plurality of transparent colloids that cover respectively on described a plurality of light-emitting diode chip for backlight unit;
The fluorescent colloid unit, it has a plurality of fluorescent colloids that cover respectively on described a plurality of shape transparent colloid; And
Frame unit, its coat described a plurality of transparent colloids around and described a plurality of fluorescent colloids around, and only expose the upper surface of described a plurality of fluorescent colloids.
2, the Yin Gaowen of avoiding as claimed in claim 1 and reduce the package structure for LED of light-emitting phosphor efficient, it is characterized in that: this base board unit is printed circuit board (PCB), soft base plate, aluminium base, ceramic substrate or copper base.
3, the Yin Gaowen of avoiding as claimed in claim 1 and reduce the package structure for LED of light-emitting phosphor efficient is characterized in that: this substrate body comprises metal level and is formed in bakelite layer on this metal level.
4, the Yin Gaowen of avoiding as claimed in claim 3 and reduce the package structure for LED of light-emitting phosphor efficient, it is characterized in that: this positive and negative electrode conductive traces is aluminum steel road or silver-colored circuit.
5, the Yin Gaowen of avoiding as claimed in claim 1 and reduce the package structure for LED of light-emitting phosphor efficient, it is characterized in that: each fluorescent colloid is mixed by silica gel and fluorescent material or is mixed by epoxy resin and fluorescent material.
6, the Yin Gaowen of avoiding as claimed in claim 1 and reduce the package structure for LED of light-emitting phosphor efficient, it is characterized in that: this frame unit is a ccf layer.
7, the Yin Gaowen of avoiding as claimed in claim 6 and reduce the package structure for LED of light-emitting phosphor efficient, it is characterized in that: this ccf layer is light tight ccf layer, and this light tight ccf layer is the white box rack-layer.
8, the Yin Gaowen of avoiding as claimed in claim 1 and reduce the package structure for LED of light-emitting phosphor efficient is characterized in that: this frame unit be a plurality of coat respectively each transparent colloid around and each fluorescent colloid around frameworks.
9, the Yin Gaowen of avoiding as claimed in claim 8 and reduce the package structure for LED of light-emitting phosphor efficient, it is characterized in that: described a plurality of frameworks are light tight framework, and described a plurality of light tight framework is white framework.
10, the Yin Gaowen of avoiding as claimed in claim 1 and reduce the package structure for LED of light-emitting phosphor efficient, it is characterized in that: the upper surface of each transparent colloid and front surface have transparent colloid cambered surface and transparent colloid exiting surface, and described a plurality of fluorescent colloid covers respectively on the transparent colloid exiting surface of described a plurality of transparent colloids.
Priority Applications (1)
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CNU2008201196175U CN201226356Y (en) | 2008-06-27 | 2008-06-27 | LED packaging structure for preventing fluorescent powder light-emitting efficiency from reducing due to high temperature |
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CNU2008201196175U CN201226356Y (en) | 2008-06-27 | 2008-06-27 | LED packaging structure for preventing fluorescent powder light-emitting efficiency from reducing due to high temperature |
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CN201226356Y true CN201226356Y (en) | 2009-04-22 |
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CNU2008201196175U Expired - Fee Related CN201226356Y (en) | 2008-06-27 | 2008-06-27 | LED packaging structure for preventing fluorescent powder light-emitting efficiency from reducing due to high temperature |
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101562139B (en) * | 2008-04-15 | 2011-09-28 | 宏齐科技股份有限公司 | Luminescence chip encapsulating structure for avoiding reducing luminous efficiency and manufacture method thereof |
CN106098912A (en) * | 2016-06-29 | 2016-11-09 | 深圳市源磊科技有限公司 | A kind of mobile phone photograph flash lamp and preparation method thereof |
CN107093658A (en) * | 2016-09-30 | 2017-08-25 | 深圳市玲涛光电科技有限公司 | Light-emitting component, backlight source module and electronic equipment |
CN110242877A (en) * | 2019-04-12 | 2019-09-17 | 华芯半导体研究中心(广州)有限公司 | A kind of high heat dissipation high-power LED lamp bead and preparation method thereof |
-
2008
- 2008-06-27 CN CNU2008201196175U patent/CN201226356Y/en not_active Expired - Fee Related
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101562139B (en) * | 2008-04-15 | 2011-09-28 | 宏齐科技股份有限公司 | Luminescence chip encapsulating structure for avoiding reducing luminous efficiency and manufacture method thereof |
CN106098912A (en) * | 2016-06-29 | 2016-11-09 | 深圳市源磊科技有限公司 | A kind of mobile phone photograph flash lamp and preparation method thereof |
CN107093658A (en) * | 2016-09-30 | 2017-08-25 | 深圳市玲涛光电科技有限公司 | Light-emitting component, backlight source module and electronic equipment |
EP3546825A4 (en) * | 2016-09-30 | 2020-10-28 | Shenzhen LT Optoelectronics Co., Ltd. | Strip-shaped light source, manufacturing method therefor, and electronic device |
CN110242877A (en) * | 2019-04-12 | 2019-09-17 | 华芯半导体研究中心(广州)有限公司 | A kind of high heat dissipation high-power LED lamp bead and preparation method thereof |
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