CN201004240Y - Encapsulation structure of memory card - Google Patents

Encapsulation structure of memory card Download PDF

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Publication number
CN201004240Y
CN201004240Y CN 200620147863 CN200620147863U CN201004240Y CN 201004240 Y CN201004240 Y CN 201004240Y CN 200620147863 CN200620147863 CN 200620147863 CN 200620147863 U CN200620147863 U CN 200620147863U CN 201004240 Y CN201004240 Y CN 201004240Y
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CN
China
Prior art keywords
chip
memory card
packaging structure
substrate
packing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN 200620147863
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Chinese (zh)
Inventor
卓恩民
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Individual
Original Assignee
Individual
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Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to CN 200620147863 priority Critical patent/CN201004240Y/en
Application granted granted Critical
Publication of CN201004240Y publication Critical patent/CN201004240Y/en
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Expired - Fee Related legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H01L2924/15172—Fan-out arrangement of the internal vias
    • H01L2924/15174—Fan-out arrangement of the internal vias in different layers of the multilayer substrate

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  • Credit Cards Or The Like (AREA)
  • Packaging Frangible Articles (AREA)

Abstract

The utility model is a memory card package structure, comprising a printing circuit board and at least one chip package element. The upper surface of the printing circuit board is provided with a plurality of pads, and the lower surface is provided with an exposed gold finger. Each chip package element comprises at least one chip and one base board. At least one layer of layout is arranged inside the base board, and the layout is provided with a plurality of electricity conduct terminals which are exposed on the lower surface of the base board. The electricity conduct terminal is adhered with the pad and is electrically communicated with the pad. A plurality of layers of layouts can be arranged inside the base board of the utility model to increase the flexibility and the elasticity of the package design, and is able to adopt nested multi-chip package to increase the function and the depositing capability of the memory card.

Description

Memory card packaging structure
Technical field
The utility model relates to a kind of memory card packaging structure, particularly about a kind of employing chip packing-body, and with the memory card packaging structure of substrate as the chip bearing.
Background technology
Memory card (memory card) is a kind of very light and handy Portable data memory device, progress along with science and technology, memory card has been widely used in electronic installation miscellaneous, personal computer (Personal Computer for example, PC), mobile phone (cell phone), digital camera (DigitalCamera, DC), digital camera (Digital Video, DV) and personal digital assistant (PersonalDigital Assistant, PDA) ... etc., different demands according to various application, memory card has many different sizes, external form and specification, for example: numeric security card (Secure Digital card, SDcard), mini numeric security card (mini SD card), miniature numeric security card (micro SD card, μ SD card), multimedia card (Multi Media Card, MMC) and flash memory (CompactFlash card, CF card) ... etc.
Generally speaking, a memory card comprises at least one chip (chip), and a flash memory (flashmemory) chip for example, chip can directly adhere to a printed circuit board (PCB) (Printed Circuit Board PCB) goes up and its electric connection; Also can be packaged into a chip packing-body earlier, for example (Dynamic Random Access Memory's dynamic RAM again DRAM), adheres and electric connection with printed circuit board (PCB).
The known chip packing-body that is used for memory card, for example a thin-type small-size encapsulates (ThinSmall Out-Line Package, TSOP) body, employing lead frame (lead frame) comes carries chips and electrically connects with printed circuit board (PCB), Fig. 1 is the diagrammatic cross-section of a known thin-type small-size packaging body 1, Fig. 2 is its schematic top plan view, one chip 12 is arranged on the chip bearing (chip carrier) 142 of lead frame 14, lead frame 14 has a plurality of outer pins (outer lead) 144, and chip 12 electrically connects with a plurality of bonding wires (bonding wire) 16 and lead frame 14, one packing colloid (molding compound), 18 coating chips 12 and chip bearing 142, and expose outer pin 144.
Fig. 3 is the schematic top plan view of a known printed circuit board (PCB) 2, and the upper surface of printed circuit board (PCB) 2 is provided with a plurality of weld pads (solder pad) 22.
Fig. 4 is the schematic top plan view of a known memory card packaging structure 3, the a plurality of outer pin 144 of thin-type small-size packaging body 1 also electrically conducts with 22 adhesions of a plurality of weld pads of printed circuit board (PCB) 2, and resistance (resistor), electric capacity (capacitor) or inductance passive devices 32 such as (inductor) are arranged on the printed circuit board (PCB) 2 and electrically conduct with it.
As mentioned above, because the thin-type small-size packaging body adopts lead frame as the chip bearing, and the thickness of thin-type small-size packaging body has its specification limits, so be not suitable for the stacked-up type multichip packaging structure (Stacked-type Multi Chip Package, St.MCP), very and since the space limited, passive device is difficult for inserting in the thin-type small-size packaging body, therefore, the chip packing-body of known employing lead frame makes the function of memory card and capacity be restricted, and can't further promote.
The utility model content
For addressing the above problem, it is the memory card packaging structure of the chip packing-body of chip (chip) bearing with substrate (substrate) that one of the utility model purpose provides a kind of, applicable to numeric security card, mini numeric security card, miniature numeric security card and multimedia card or flash memory ... etc.
One of the utility model purpose provides a kind of memory card packaging structure, and it adopts the chip packing-body that covers crystalline substance (flipchip) formula Chip Packaging.
One of the utility model purpose provides a kind of memory card packaging structure, and it adopts the chip packing-body of stacked-up type multicore sheet encapsulation.
Therefore, the chip packing-body of memory card of the present utility model adopts substrate to have many advantages as the chip bearing: 1. degree of freedom and the elasticity of multilayer wiring (trace) with the increase package design can be set in the substrate, and can adopt the encapsulation of stacked-up type multicore sheet to increase the function and the storage volume of memory card; 2. can place passive device in the chip packing-body saving the encapsulated space of printed circuit board (PCB), so on the printed circuit board (PCB) plural chip packing-body can be set, further increase the function and the storage volume of memory card.
In order to achieve the above object, the memory card packaging structure of the utility model one embodiment comprises: a printed circuit board (PCB), and it has one first upper surface and one first lower surface, and first lower surface is provided with a golden finger of exposure, and first upper surface is provided with a plurality of weld pads; And at least one chip packing-body, each chip packing-body comprises an at least one chip and a substrate, substrate has one second upper surface and one second lower surface, chip packing-body is arranged at second upper surface, substrate inside is provided with one deck wiring at least, and wiring has a plurality of conducting terminals that are exposed to second lower surface, and conducting terminal and weld pad adhesion also electrically conduct.
Accompanying drawing illustrates in detail shown in below will cooperating by specific embodiment, when the effect that is easier to understand the purpose of this utility model, technology contents, characteristics and is reached.
Description of drawings
Fig. 1 and Fig. 2 are respectively the diagrammatic cross-section and the schematic top plan view of prior art thin-type small-size packaging body;
Fig. 3 is the schematic top plan view of prior art printed circuit board (PCB);
Fig. 4 is the schematic top plan view of prior art memory card packaging structure;
Fig. 5 and Fig. 6 are respectively the diagrammatic cross-section and the elevational schematic view of the chip packing-body of the utility model one embodiment;
Fig. 7 is the printed circuit board (PCB) schematic top plan view of the utility model one embodiment;
Fig. 8 is the memory card packaging structure schematic top plan view of the utility model one embodiment;
Fig. 9 and Figure 10 are the diagrammatic cross-section of the memory card packaging structure of the utility model embodiment;
Figure 11 and Figure 12 are the diagrammatic cross-section of the chip packing-body of the utility model embodiment;
Figure 13 is the schematic top plan view of the memory card packaging structure of the utility model one embodiment;
Figure 14 is the chip packing-body diagrammatic cross-section of the utility model one embodiment;
Figure 15 is the memory card packaging structure schematic top plan view of the utility model one embodiment.
Symbol description among the figure
1 thin-type small-size packaging body
12 chips
14 lead frames
142 chip bearings
144 outer pins
16 bonding wires
18 packing colloids
2 printed circuit board (PCB)s
22 weld pads
3 memory card packaging structures
32 passive devices
4,4 ' chip packing-body
42 chips
44 substrates (comprise upper and lower surface, in this case, be referred to as the second upper and lower surface)
442 wirings
4422 conducting terminals
46 bonding wires
48 packing colloids
49 passive devices
5,5 ' printed circuit board (PCB) (comprise upper and lower surface, in this case, be referred to as on first,
Lower surface)
52 weld pads
54 golden fingers
6,7,7 ' memory card packaging structure
72 loam cakes
74 packing colloids
8,8 ' chip packing-body
81,82, chip
83
84,85 substrates
842, wiring
852
86 soldered balls
87 bonding wires
9,9 ' memory card packaging structure
92 passive devices
Embodiment
Be described in detail as follows, described preferred embodiment is only done an explanation but not in order to limit the utility model.
Fig. 5 and Fig. 6 are respectively the diagrammatic cross-section and the elevational schematic view of the chip packing-body 4 of the utility model one embodiment, at least one chip packing-body 4, this chip packing-body 4 comprises an at least one chip 42 and a substrate 44, this substrate 44 has one second upper surface and one second lower surface, one chip 42 is arranged at second upper surface of a substrate 44, and promptly this chip packing-body 4 is arranged at second upper surface of substrate; Substrate 44 inside have one deck wiring 442, wiring 442 has second lower surface that a plurality of conducting terminals 4422 expose substrate 44, a plurality of bonding wires 46 electrically connect chip 42 and substrate 44, one packing colloid 48 coats second upper surface and the chip 42 of bonding wire 46, substrate 44, and expose second lower surface of substrate 44, in one embodiment, the material of packing colloid 48 is epoxy resin (epoxy resin).
Fig. 7 is the schematic top plan view of the printed circuit board (PCB) 5 of the utility model one embodiment, and first upper surface of printed circuit board (PCB) 5 is provided with a plurality of weld pads 52.
Fig. 8 is the schematic top plan view of the memory card packaging structure 6 of the utility model one embodiment, one printed circuit board (PCB) 5, it has one first upper surface and one first lower surface, this first lower surface is provided with a golden finger 54 (as shown in Figure 9) of exposure, this chip packing-body 4 is arranged at first upper surface of printed circuit board (PCB) 5, and conducting terminal 4422 (not shown) and weld pad 52 adhesions also electrically conduct.
Therefore, one of feature of memory card packaging structure of the present utility model is to comprise a chip packing-body, and it adopts substrate as the chip bearing.So memory card packaging structure of the present utility model is applicable to the memory card of different size, external form and specification, for example: numeric security card, mini numeric security card, miniature numeric security card and multimedia card or flash memory ... etc., but be not limited thereto.
The above-mentioned explanation that continues, after the adhesion of finishing chip packing-body, an available loam cake or a packing colloid cover cover chip packing-body and upper surface of base plate with the protection memory card, prevent from that external force or grit from polluting to cause memory card to damage; Please refer to Fig. 9, Fig. 9 is the diagrammatic cross-section of the memory card packaging structure 7 of the utility model one embodiment, and a loam cake 72 is in order to cover cap chip packing-body 4 first upper surface with printed circuit board (PCB) 5, and exposes first lower surface of printed circuit board (PCB) 5; One golden finger (golden finger) 54 is exposed to first lower surface of printed circuit board (PCB) 5, when memory card inserted the slot of an electronic installation (not shown), golden finger 54 was as the electric connection terminal of power delivery between electronic installation and memory card and exchanges data.Please refer to Figure 10, it is the diagrammatic cross-section of the memory card packaging structure 7 ' of another embodiment of the utility model, the memory card packaging structure 7 of Figure 10 and Fig. 9 has difference, and the memory card packaging structure 7 ' of Figure 10 is with first upper surface of a packing colloid 74 coating chip packaging bodies 4 with printed circuit board (PCB) 5.
This skill had know the knowledgeable usually when can understanding the utility model, for example flash chip and dynamic RAM applicable to chip miscellaneous and chip packing-body; And of the present utility model with substrate as the applicable various encapsulating structure of the chip packing-body of chip bearing, crystal covering type Chip Packaging for example, please refer to Figure 11, it is the diagrammatic cross-section of the chip packing-body 8 of the utility model one embodiment, chip packing-body 8 is the crystal covering type Chip Packaging, the active surface of chip 82 is towards substrate 84 second upper surfaces, and chip 82 electrically connects with the wiring 842 of a plurality of soldered balls (flipball) 86 with substrate 84.
Because the utility model adopts substrate as the chip bearing, so having enough spaces, chip packing-body inside can do the encapsulation of stacked-up type multicore sheet, please refer to Figure 12, it is the diagrammatic cross-section of the chip packing-body 8 ' of another embodiment of the utility model, chip packing-body 8 ' is the encapsulation of stacked-up type multicore sheet, it comprises the chip 81 and chip 83 that is stacked and placed on the substrate 85, in this embodiment, chip 81 electrically connects by bonding wire 87 and substrate 85 with chip 83, also can adopt alternate manners such as soldered ball in another embodiment, therefore, according to spirit of the present utility model, such as adopt chip packing-body and all be encompassed in the scope of the present utility model, do not repeat them here with the memory card packaging structure of substrate as the chip bearing.
In addition, adopting substrate is that substrate inside can be provided with multilayer wiring to increase the degree of freedom and the elasticity of package design as another advantage of chip bearing, and for example substrate 85 inside are provided with two layers of wiring 852 (refer again to Figure 12).
Generally speaking, memory card must have passive devices such as resistance, electric capacity or inductance to reach functions such as filtered noise, please refer to Figure 13, it is the schematic top plan view of the memory card packaging structure 6 ' of the utility model one embodiment, chip packing-body 4 is arranged at first upper surface of printed circuit board (PCB) 5, and passive devices 92 such as resistance, electric capacity or inductance also are arranged at first upper surface of printed circuit board (PCB) 5, and electrically conduct with printed circuit board (PCB) 5.
Very and, because the utility model adopts substrate to have bigger space as the chip packing-body inside of chip bearing, so can be packaged in chip packing-body inside to passive devices such as resistance, electric capacity or inductance to save the encapsulated space of printed circuit board (PCB), please refer to Figure 14, it is the diagrammatic cross-section of the chip packing-body 4 ' of the utility model one embodiment, chip packing-body 4 ' comprises at least one passive device 49, and it is arranged at second upper surface of substrate 44, and electrically connects with substrate 44.
As mentioned above, because of passive device of the present utility model can be packaged in chip packing-body inside, the printed circuit board space of saving can be provided with encapsulating more than one chip packing-body in same memory card again, please refer to Figure 15, it is the schematic top plan view of the memory card packaging structure 9 ' of the utility model one embodiment, and two chip packing-bodies 4 ' are arranged at printed circuit board (PCB) 5 ' and go up to increase the function and the storage volume of memory card.
In sum, the chip packing-body of memory card of the present utility model adopts substrate to have many advantages as the chip bearing: 1. degree of freedom and the elasticity of multilayer wiring with the increase package design can be set in the substrate, and can adopt the encapsulation of stacked-up type multicore sheet to increase the function and the storage volume of memory card; 2. can be arranged at the encapsulated space of chip packing-body inside to passive device, so on the printed circuit board (PCB) plural chip packing-body can be set, further increase the function and the storage volume of memory card with the saving memory card.
Above-described embodiment only is explanation technological thought of the present utility model and characteristics, its purpose makes the personage who has the knack of this skill can understand content of the present utility model and is implementing according to this, when not limiting claim of the present utility model with this, promptly the equalization of doing according to the spirit that the utility model disclosed generally changes or modifies, and must be encompassed in the claim of the present utility model.

Claims (17)

1. a memory card packaging structure is characterized in that, comprises:
One printed circuit board (PCB), it has one first upper surface and one first lower surface, and this first lower surface is provided with a golden finger of exposure, and this first upper surface is provided with a plurality of weld pads; And
At least one chip packing-body, this chip packing-body comprises an at least one chip and a substrate, this substrate has one second upper surface and one second lower surface, this chip packing-body is arranged at this second upper surface, and this substrate inside is provided with one deck wiring at least, this wiring has a plurality of conducting terminals that are exposed to this second lower surface, and these conducting terminals and the adhesion of these weld pads also electrically conduct.
2. memory card packaging structure as claimed in claim 1 is characterized in that, comprises a loam cake, this first upper surface and this chip packing-body of its this printed circuit board (PCB) of cover cap, and expose this first lower surface of this printed circuit board (PCB).
3. memory card packaging structure as claimed in claim 1 is characterized in that, comprises a packing colloid, and it coats this first upper surface and this chip packing-body of this printed circuit board (PCB), and exposes this first lower surface of this printed circuit board (PCB).
4. memory card packaging structure as claimed in claim 1 is characterized in that, the material of this packing colloid is an epoxy resin.
5. memory card packaging structure as claimed in claim 1 is characterized in that, comprises at least one passive device, and it is arranged on this first upper surface of this printed circuit board (PCB), and electrically connects with this printed circuit board (PCB).
6. as memory card packaging structure as described in the claim 5, it is characterized in that this passive device is resistance, electric capacity or inductance.
7. memory card packaging structure as claimed in claim 1 is characterized in that this chip packing-body comprises a plurality of bonding wires, and it electrically connects this chip and this substrate.
8. memory card packaging structure as claimed in claim 1, it is characterized in that, this chip packing-body comprises at least one packing colloid, and it coats this second upper surface and this chip of this substrate of this chip packing-body, and exposes this second lower surface of this substrate of this chip packing-body.
9. memory card packaging structure as claimed in claim 8 is characterized in that, the material of this packing colloid is an epoxy resin.
10. memory card packaging structure as claimed in claim 1 is characterized in that, this chip packing-body is the stacked-up type Chip Packaging, and it comprises a plurality of chips that are stacked and placed on this substrate, and these chips and this substrate electrically connect.
11. memory card packaging structure as claimed in claim 10 is characterized in that, comprises a plurality of bonding wires and electrically connects these chips and this substrate.
12. memory card packaging structure as claimed in claim 1 is characterized in that, this chip packing-body is the crystal covering type Chip Packaging, and the active surface of this chip is towards this second upper surface, and this chip electrically connects with a plurality of soldered balls and this substrate.
13. memory card packaging structure as claimed in claim 1 is characterized in that, this chip packing-body comprises at least one passive device, and it is arranged on this second upper surface of this substrate, and electrically connects with this substrate.
14., it is characterized in that this passive device is resistance, electric capacity or inductance as memory card packaging structure as described in the claim 13.
15. memory card packaging structure as claimed in claim 1 is characterized in that, this memory card is a numeric security card, a mini numeric security card, a miniature numeric security card, a multimedia card or a flash memory.
16. memory card packaging structure as claimed in claim 1 is characterized in that, this chip packing-body is a dynamic RAM.
17. memory card packaging structure as claimed in claim 1 is characterized in that, this chip is a flash chip.
CN 200620147863 2006-11-28 2006-11-28 Encapsulation structure of memory card Expired - Fee Related CN201004240Y (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 200620147863 CN201004240Y (en) 2006-11-28 2006-11-28 Encapsulation structure of memory card

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 200620147863 CN201004240Y (en) 2006-11-28 2006-11-28 Encapsulation structure of memory card

Publications (1)

Publication Number Publication Date
CN201004240Y true CN201004240Y (en) 2008-01-09

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN 200620147863 Expired - Fee Related CN201004240Y (en) 2006-11-28 2006-11-28 Encapsulation structure of memory card

Country Status (1)

Country Link
CN (1) CN201004240Y (en)

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C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20080109

Termination date: 20101128