CN1967420A - Series PLC host computer and fast parallel communication interface of expanding machine - Google Patents
Series PLC host computer and fast parallel communication interface of expanding machine Download PDFInfo
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- CN1967420A CN1967420A CN 200510123323 CN200510123323A CN1967420A CN 1967420 A CN1967420 A CN 1967420A CN 200510123323 CN200510123323 CN 200510123323 CN 200510123323 A CN200510123323 A CN 200510123323A CN 1967420 A CN1967420 A CN 1967420A
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Abstract
A parallel fast communication interface of the series PLC mainframe and expanding machine, it includes: PLC mainframe and at least one expanding machine, and mutual connecting in series with the set connecting module, and connecting the address lines, data lines, control line and input and output addressable lines of the built-in shared bus, to form the series parallel communication interface connecting. The PLC mainframe further provides the initial address output circuit, and through the output addressable lines, outputs the address value to the expanding machine. The expanding machine contains microprocessor and memory module, with addressable and decoding circuit, which automatic distributes the location of each expanding machine, to rapid decode and select by the address value input by the above addressable lines, and making the expanding machine automatic allow or disallow the data sent by the PLC mainframe, so as to improve the problems such as data reading and writing communications time too long, increasing the expanding machines, and the order sequence restricted, etc.
Description
Technical field
The present invention relates to the high-speed traffic interface arranged side by side of a kind of tandem PLC main frame and expansion machine, can form between the PLC main frame that particularly a kind of tandem connects and a plurality of expansion machines automatic addressing arranged side by side with the reading and writing data of selecting expansion machine communicate by letter, can the fast reading and writing data with the shortening call duration time and can arbitrarily increase expansion machine and not limit PLC main frame that expansion machine puts in order and the high-speed traffic interface arranged side by side of expansion machine according to functional requirement.
Background technology
Known programmable logic controller (PLC) (PLC, Programmable Logic-Controller) all is to connect external device (ED) or equipment by its exterior I/O port, cooperates the edit routine of programmable logic controller (PLC) to carry out outside operation control.It is fixing that but the exterior I of known PLC main frame/O port number is, if will connect more external device (ED) or equipment is controlled, just must connect by expansion machine, to expand its numeral or Simulation with I/O port.
In addition, communicating to connect between known PLC main frame and the expansion machine, comprise that mainly the tandem serial communication connects framework and the parallel two kinds of framework modes of framework that communicate to connect side by side, wherein, the tandem serial communication connects framework and mainly in the universal serial bus mode PLC main frame is connected with a plurality of expansion machines, thereby, when PLC main frame output data read-write, must handle by the microprocessor processing of establishing in each expansion machine one by one, judge whether to be the selected expansion machine of this reading and writing data signal, make that the data communication call duration time between PLC main frame and the expansion machine is long.
In addition, parallel composition framework and the circuit block diagram that communicates to connect framework side by side as shown in Figure 1 and Figure 2, its framework mainly comprise fixed base 1 and a plurality ofly have a fixedly linkage unit 11 of decoding function.Linkage unit 11 is connected in the bus 15 (comprising address wire, data line and control line) that fixed base 1 is provided with, and PLC main frame 12 and a plurality of expansion machine 13,14 are connected in fixed base 1 with parallel collocation form arranged side by side by linkage unit 11.The above-mentioned parallel framework that communicates to connect side by side, though can utilize the fixed decoding function of linkage unit 11, the expansion machine 13 of PLC main frame 12 and permanent order position or 14 reading and writing data call duration time are shortened, but, these parallel a plurality of expansion machine configurations arranged side by side, because of expansion machine is to cooperate fixed decoding function linkage unit 11 with the permanent order position configuration, make expansion machine put in order and be restricted, can't be at any time increase expansion machine according to user demand or chosen position.Even, cause cost waste only adding last or during several expansion machines 13, still need buying whole fixed base 1 and a plurality of linkage unit 11 thereof as connecting bridges with fixed decoding function by PLC main frame 12.
Summary of the invention
Fundamental purpose of the present invention is to solve the defective of above-mentioned prior art.The present invention utilizes the linkage unit of PLC main frame and expansion machine setting to connect mutually and connects the address wire of The built-in, data line, control line and addressed line, thereby forming tandem communicates to connect side by side, and utilize the built-in automatic addressing distribution function of expansion machine, make expansion machine select with automatic permission or forbid the data that the PLC main frame reads or writes by inside decoding, communicate by letter for reading and writing data between PLC main frame and the expansion machine, can improve the call duration time of its reading and writing data, and can be random, not having puts in order limits ground increases expansion machine, providing the user easier, cheap and and the fast practical communication interface of communication read or write speed.
In order to achieve the above object, the high-speed traffic interface arranged side by side of tandem PLC main frame of the present invention and expansion machine comprises:
The PLC main frame comprises:
In be built in the shared bus of PLC main frame, shared bus comprises address wire, data line, control line and output addressed line;
Microprocessor is connected with address wire, data line, the control line of shared bus; And
The start address output circuit, fixedly the OPADD value is 0 or other numerical value, and is sent to expansion machine by the output addressed line;
Linkage unit connects outside expansion machine of connecting;
Enable accurate position output signal, to start the expansion machine that connects;
The input interrupt request singal is to receive expansion machine notifier processes interrupt event;
At least one expansion machine comprises:
In be built in the shared bus of expansion machine, shared bus comprises address wire, data line, control line, input and output addressed line;
Microprocessor;
Storage unit has the dual link port, and connects address wire, data line, the control line of address wire, data line, control line and the shared bus of microprocessor respectively; And
Enable accurate position input signal, enable accurate position output signal with what connect PLC main frame or last one adjacent expansion machine;
Enable accurate position output signal, with the accurate position of the activation input signal that is sent to next adjacent expansion machine;
The output interrupt request singal is with notice PLC host process interrupt event;
Addressing and decoding scheme, connect above-mentioned input addressed line, obtain the address value and the reference address value that connect upper level output addressed line and be sent to next stage by the output addressed line, and decipher selection PLC main frame according to the address value of input addressed line and whether can be connected to said memory cells, carry out reading and writing data with startup with the data line bus and communicate by letter;
Be located at first linkage unit and second linkage unit of expansion machine outside, with another expansion machine that is connected and is connected in series next stage with PLC main frame or upper level expansion machine;
Wherein, PLC main frame and at least one expansion machine are connected in series mutually by the linkage unit of outer setting, and connect address wire, data line, control line, the input of built-in shared bus and export addressed line, forming tandem communicates to connect side by side, make expansion machine by addressing and the automatic distribution locations of decoding scheme, by the address value that above-mentioned input addressed line receives, select to allow or forbid the data that the PLC main frame sends or reads automatically for the storage unit of expansion machine.
Description of drawings
Fig. 1 is the known parallel composition configuration diagram that communicates to connect framework side by side;
Fig. 2 is the known parallel circuit block diagram that communicates to connect framework side by side;
Fig. 3 is the composition configuration diagram of one embodiment of the invention;
Fig. 4 is the circuit block diagram of one embodiment of the invention;
Fig. 5 is the PLC main frame internal circuit block scheme of one embodiment of the invention;
Fig. 6 is the internal circuit block scheme of the expansion machine of one embodiment of the invention;
Fig. 7 is the addressing of one embodiment of the invention and the addressing circuit synoptic diagram of decoding scheme;
Fig. 8 is the addressing of one embodiment of the invention and the decoding scheme synoptic diagram of decoding scheme.
In the accompanying drawing, the primary clustering symbol is listed as follows:
The primary clustering symbol of prior art:
The fixed base 11-of 1-linkage unit
12-PLC main frame 13,14-expansion machine
The 15-bus
Primary clustering symbol of the present invention:
2-PLC main frame 3-expansion machine
21-linkage unit 22,33-microprocessor
23-start address output circuit 31-first linkage unit
The 32-second linkage unit 34-storage unit
35-addressing and decoding scheme 36-addressing circuit
37-decoding scheme 361-summation circuit
The 362-first logical circuit 363-second logical circuit
371-comparator circuit 372-the 3rd logical circuit
373-the 4th logical circuit
Embodiment
In order to make those skilled in the art further understand feature of the present invention and technology contents, see also following about detailed description of the present invention and accompanying drawing, accompanying drawing only provide with reference to and usefulness is described, be not to be used for limiting the present invention.
Form framework and circuit block diagram by the high-speed traffic interface arranged side by side of tandem PLC main frame of the present invention and expansion machine Fig. 3 to Fig. 8 illustrate.As shown in the figure: the high-speed traffic interface arranged side by side of tandem PLC main frame of the present invention and expansion machine includes PLC main frame 2 and expansion machine 3 that at least one is connected with PLC main frame 2.PLC main frame 2 outsides are provided with the linkage unit 21 that is connected with expansion machine 3, and expansion machine 3 outsides are provided with first and second linkage unit 31,32, wherein, first linkage unit 31 is connected with the linkage unit 21 of PLC main frame 2, perhaps second linkage unit 32 with last one adjacent expansion machine 3 is connected in series mutually, second linkage unit 32 then is used to be connected in series first linkage unit 31 of next adjacent expansion machine 3, makes between PLC main frame 2 and a plurality of expansion machine 3 to form the tandem that comprises address wire, data line, control line, input and output addressed line and communicate to connect side by side.
The linkage unit 21 of PLC main frame 2 is any one of connection female seat or connection male seat.First linkage unit 31 of expansion machine 3 is to be connected male seat or to connect any one of female seat with the linkage unit 21 of PLC main frame 2 is interconnective, and second linkage unit 32 of expansion machine 3 to be first linkage units 31 of adjacent expansion machine 3 with the next one interconnective is connected female seat or connects any one of male seat.
The internal circuit of PLC main frame 2 includes at least: built-in standard shared bus (comprises address wire, data line, control line, OPADD line Q0～Q4) and microprocessor 22 and start address output circuit 23.Microprocessor 22 connects address wire, data line, the control line of above-mentioned shared bus, is connected with output data and is controlled by linkage unit 21.Microprocessor 22 also has the accurate position of the output enable signal En_out (the high levle signal is an enable signal) that is connected to expansion machine 3, and receives the signal of interrupt request singal line IRQ.The OPADD value of start address output circuit 23 can be 0 or other numerical value, by output addressed line Q0～Q4 output, carries out addressing and decoding functions for a plurality of expansion machines 3 that connect.
The internal circuit of the above-mentioned expansion machine of carrying 3 includes at least: built-in shared bus (comprising address wire, data line, control line, input and output addressed line) is connected between first and second linkage unit 31,32; Microprocessor 33; The address wire, data line, the control line that are connected with microprocessor 33; And the address wire of shared bus, data line, control line and the storage unit 34 that is connected with first and second linkage unit 31,32, with carry out and PLC main frame 2 between reading and writing data and processing; Addressing and decoding scheme 35, by input addressed line I0～I4 obtain address value that upper level is PLC main frame 2 or expansion machine 3 conversion inputs, from the A15～A11 of the address wire of shared bus and control line /CS and expansion machine 3 receive enable accurate position input signal En_in, decipher selection according to address value and whether can be connected to storage unit 34, carrying out reading and writing data with startup with the data line bus communicates by letter, change the address value of this input and deliver to next stage expansion machine 3, judge with decoding to carry out identical addressing by output addressed line Q0～Q4.
Addressing and decoding scheme 35 comprise addressing circuit 36 and decoding scheme 37.The accurate position of the output enable output signal En_out of the expansion machine 3 that enables accurate position input signal En_in reception PLC main frame 2 or upper level connection of expansion machine 3, when being judged as low level, then addressing and decoding scheme 35 will not worked, when being judged as high levle, then addressing and decoding scheme 35 will be selected automatically to allow or forbid that the storage unit 34 of 2 pairs of expansion machines 3 of PLC main frame reads and writes.
Addressing circuit 36 as shown in Figure 7, is made up of summation circuit 361, first logical circuit (Sheffer stroke gate) 362 and 363 of second logical circuits (with door).Summation circuit 361 receives the address value of changing output from the expansion machine 3 of the OPADD value of PLC main frame 2 or upper level connection by input addressed line I0～I4, and summation circuit 361 also receives accurate the input signal En_in that enable of PLC main frame 2 outputs.The Input Address value is delivered to next stage expansion machine 3 by output addressed line Q0～Q4 with the OPADD value after 1 conversion that adds up, the signal of importing addressed line I0～I4 simultaneously after first logical circuit 362 is handled as the input signal of second logical circuit 363, it enables accurate position input signal En_in through second logical circuit together with 2 outputs of PLC main frame, produces to enable accurate position output signal En_out as the accurate position input signal En_in that enables that is sent to next stage expansion machine 3.It (is I0～I4=11111) that the address value that the upper level that receives as the addressed line I0 of expansion machine 3～I4 connects the output addressed line Q0～Q4 of expansion machine 3 is 31, and enable an accurate position input signal En_in when being the high levle signal, then export to next stage to enable an accurate position output signal En_out be the low level signal.
PLC main frame 2 of the present invention and a plurality of expansion machine 3 are connected mutually by set linkage unit 21, first and second linkage unit 31,32, and be connected to address wire, data line, control line and the input of the shared bus of The built-in and export addressed line, connect thereby form tandem communication interface arranged side by side.Simultaneously, PLC main frame 2 output enable an accurate position output signal En_out when being high levle, then connect a plurality of series connection expansion machine arranged side by side 3, can by interior addressing of establishing and decoding scheme 35 with import addressed line and distribute the address of every expansion machine 3 automatically.When PLC main frame 2 is desired and the storage unit 34 of one of a plurality of expansion machines 3 is carried out reading and writing data when communicating by letter, then the microprocessor 22 of PLC main frame 2 need make earlier that the accurate position of output enable signal En_out is a high levle signal, notify all expansion machines 3 to start addressing and decoding scheme 35, so that the storage unit 34 of 2 pairs of expansion machines 3 of PLC main frame is carried out read-write operation.
Because communication interface linkage unit 21, first and second linkage unit 31,32 of PLC main frame 2 of the present invention and expansion machine 3 by being provided with, be connected to form communication construction arranged side by side in the mode of directly connecting mutually, therefore, can arbitrarily increase expansion machine 3 according to user's demand, and not limit expansion machine 3 and put in order.The maximum of a plurality of expansion machines 3 that connect with PLC main frame 2 uses restriction platform number to depend on input and the identical quantity of output addressed line, therefore, if want increase or reduce this maximum use restriction platform number, then need only increase and decrease the input quantity identical and get final product with the output addressed line.For example, the input of the foregoing description all is 5 with output addressed line quantity, and therefore, the maximum restriction platform number that uses is promptly 32 of 25 powers.
Simultaneously, when solving interconnecting of many expansion machines 3 by the addressing of establishing in the expansion machine 3 and decoding scheme 35, the address that can distribute every expansion machine 3 automatically, and can receive the address value of PLC main frame 2 or last one adjacent expansion machine 3 outputs according to input addressed line I0～I4, select permission automatically or forbid that the PLC main frame sends or reading of data.Communication interface of the present invention is that the utilization hardware circuit is finished above-mentioned functions, does not therefore need the microprocessor of expansion machine to process processing.So, PLC main frame of the present invention to expansion machine read with the running time that writes also can be faster than the communication means of the microprocessor translation data of general needs by expansion machine.
The above only is the preferred embodiments of the present invention, be not so promptly limit claim of the present invention, the equivalent structure transformation that every utilization instructions of the present invention and accompanying drawing content are done, or directly or indirectly be used in other relevant technical field, all in like manner be included in the claim of the present invention.
Claims (17)
1. the high-speed traffic interface arranged side by side of tandem PLC main frame and expansion machine comprises:
The PLC main frame is provided with outside linkage unit, and has built-in shared bus;
At least one expansion machine is provided with at least one linkage unit and is connected with described PLC main frame and another expansion machine, and described expansion machine has built-in shared bus,
Wherein, described PLC main frame and described at least one expansion machine are by the directly series connection mutually of described linkage unit, and connect built-in shared bus, thereby form the communication construction arranged side by side that tandem connects, described shared bus comprises address wire, data line, control line and input and output addressed line, make the automatic distribution locations of described expansion machine, with the address value by described input addressed line input, decoding is selected to make described expansion machine allow automatically or forbid the data that described PLC main frame sends or reads apace.
2. the high-speed traffic interface arranged side by side of tandem PLC main frame as claimed in claim 1 and expansion machine, wherein, the built-in shared bus of described PLC main frame comprises address wire, data line, control line and output addressed line, described PLC main frame further comprises:
Microprocessor is connected with address wire, data line, the control line of described shared bus; And
The start address output circuit connects described output addressed line, with the OPADD value to described expansion machine.
3. the high-speed traffic interface arranged side by side of tandem PLC main frame as claimed in claim 2 and expansion machine, wherein, described PLC main frame further comprises the accurate output signal that enables that connects and export described expansion machine to.
4. the high-speed traffic interface arranged side by side of tandem PLC main frame as claimed in claim 2 and expansion machine, wherein, described PLC main frame comprises that further the signal of interrupt request singal line (IRQ) receives connection.
5. the high-speed traffic interface arranged side by side of tandem PLC main frame as claimed in claim 2 and expansion machine, wherein, the quantity of described output addressed line can use restriction platform number to adjust according to maximum.
6. the high-speed traffic interface arranged side by side of tandem PLC main frame as claimed in claim 1 and expansion machine, wherein, the built-in shared bus of described expansion machine comprises address wire, data line, control line and input and output addressed line, described expansion machine further comprises:
Microprocessor;
Storage unit has the dual link port, and connects address wire, data line, the control line of address wire, data line, control line and the described shared bus of described microprocessor respectively; And
Addressing and decoding scheme, connect described input addressed line (I0～I4), obtain the address value and the reference address value of upper level, (Q0～Q4) gives next stage by described output addressed line, and (address value of I0～I4) is deciphered selection and whether can be connected to described storage unit, carries out reading and writing data with the data line of described shared bus and communicates by letter to start according to described input addressed line.
7. the high-speed traffic interface arranged side by side of tandem PLC main frame as claimed in claim 6 and expansion machine, wherein, described expansion machine further comprises: the signal output of interrupt request singal line (IRQ), it notifies described PLC main frame when interrupt event produces.
8. the high-speed traffic interface arranged side by side of tandem PLC main frame as claimed in claim 6 and expansion machine, wherein, described addressing and decoding scheme are made of addressing circuit and decoding scheme.
9. the high-speed traffic interface arranged side by side of tandem PLC main frame as claimed in claim 8 and expansion machine, wherein, described addressing circuit is by summation circuit, first logical circuit and second logical circuit are formed, described summation circuit receives the described output addressed line (address value of Q0～address value Q4) or the expansion machine conversion input of upper level connection from described PLC main frame, and receive the accurate output signal that enables of described PLC main frame output, the OPADD value is to the next stage expansion machine after the conversion that adds up, simultaneously, described input addressed line (signal of I0～I4) after described first logical circuit is handled as the input signal of described second logical circuit, that described second logical circuit also receives the output of described PLC main frame or last one adjacent expansion machine enable accurate position input signal, the accurate position of described second logical circuit output enable output signal enables accurate position input signal as the next stage expansion machine.
10. the high-speed traffic interface arranged side by side of tandem PLC main frame as claimed in claim 9 and expansion machine, wherein, described first logical circuit is a Sheffer stroke gate.
11. the high-speed traffic interface arranged side by side of tandem PLC main frame as claimed in claim 9 and expansion machine, wherein, described second logical circuit is and door.
12. the high-speed traffic interface arranged side by side of tandem PLC main frame as claimed in claim 8 and expansion machine, wherein, described decoding scheme is by comparator circuit, the 3rd logical circuit, the 4th logical circuit is formed, described comparator circuit receives the address value from the input addressed line of the expansion machine conversion input of the address value of the described output addressed line of described PLC main frame or upper level connection, the address signal of the address wire output of itself and described shared bus is compared, with the accurate position signal of output input signal as described the 4th logical circuit, described the 3rd logical circuit with reverse described PLC main frame output enable activation accurate position input signal and from the control signal of the control line of described shared bus (/CS) calculate the signal that produces another input signal as described the 4th logical circuit, the accurate position signal of described the 4th logical circuit output (/CS_decoder) whether decision can be connected to described storage unit, and carry out reading and writing data with startup with the data line of described shared bus and communicate by letter.
13. the high-speed traffic interface arranged side by side of tandem PLC main frame as claimed in claim 12 and expansion machine, wherein, described the 3rd logical circuit is reverse or door.
14. the high-speed traffic interface arranged side by side of tandem PLC main frame as claimed in claim 12 and expansion machine, wherein, described the 4th logical circuit is or door.
15. the high-speed traffic interface arranged side by side of tandem PLC main frame as claimed in claim 6 and expansion machine, wherein, described input is identical with the quantity of the output addressed line of the quantity of exporting addressed line and described PLC main frame.
16. the high-speed traffic interface arranged side by side of tandem PLC main frame as claimed in claim 1 and expansion machine, wherein, the linkage unit of described PLC main frame is for connecting female seat or connecting male seat.
17. the high-speed traffic interface arranged side by side of tandem PLC main frame as claimed in claim 1 and expansion machine, wherein, the linkage unit of described expansion machine comprises first linkage unit and second linkage unit, described first linkage unit is to be connected male seat or to connect female seat with the linkage unit of described PLC main frame is interconnective, and described second linkage unit is to be connected female seat or to connect male seat with described first linkage unit is interconnective.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005101233230A CN100472377C (en) | 2005-11-17 | 2005-11-17 | Series PLC host computer and fast parallel communication interface of expanding machine |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005101233230A CN100472377C (en) | 2005-11-17 | 2005-11-17 | Series PLC host computer and fast parallel communication interface of expanding machine |
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| Publication Number | Publication Date |
|---|---|
| CN1967420A true CN1967420A (en) | 2007-05-23 |
| CN100472377C CN100472377C (en) | 2009-03-25 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2005101233230A Expired - Fee Related CN100472377C (en) | 2005-11-17 | 2005-11-17 | Series PLC host computer and fast parallel communication interface of expanding machine |
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| CN (1) | CN100472377C (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103809532A (en) * | 2012-11-09 | 2014-05-21 | 黄新明 | Dual-data bus-type master-slave controller with built-in PLC function |
| CN105446914A (en) * | 2014-09-02 | 2016-03-30 | 施耐德电器工业公司 | Method and device for generating interruption/event of upper CPU in PLC module |
| CN115757218A (en) * | 2022-11-22 | 2023-03-07 | 重庆鹰谷光电股份有限公司 | Computational logic system applied to semiconductor chip data storage |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107643997A (en) * | 2017-08-30 | 2018-01-30 | 浙江工业大学 | A kind of method of expansion module automatic addressing |
-
2005
- 2005-11-17 CN CNB2005101233230A patent/CN100472377C/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103809532A (en) * | 2012-11-09 | 2014-05-21 | 黄新明 | Dual-data bus-type master-slave controller with built-in PLC function |
| CN105446914A (en) * | 2014-09-02 | 2016-03-30 | 施耐德电器工业公司 | Method and device for generating interruption/event of upper CPU in PLC module |
| CN105446914B (en) * | 2014-09-02 | 2018-05-29 | 施耐德电器工业公司 | The method and device to interruption/event of upper bit CPU is generated in PLC module |
| CN115757218A (en) * | 2022-11-22 | 2023-03-07 | 重庆鹰谷光电股份有限公司 | Computational logic system applied to semiconductor chip data storage |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100472377C (en) | 2009-03-25 |
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