CN1914794A - Gate control circuit with soft start/stop function - Google Patents
Gate control circuit with soft start/stop function Download PDFInfo
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- CN1914794A CN1914794A CNA2004800413511A CN200480041351A CN1914794A CN 1914794 A CN1914794 A CN 1914794A CN A2004800413511 A CNA2004800413511 A CN A2004800413511A CN 200480041351 A CN200480041351 A CN 200480041351A CN 1914794 A CN1914794 A CN 1914794A
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- circuit
- amplifier
- interval
- output
- control terminal
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/217—Class D power amplifiers; Switching amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
- H03F1/305—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters in case of switching on or off of a power supply
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/372—Noise reduction and elimination in amplifier
Abstract
A control terminal driver circuit for a switching amplifier includes a driver for each of a pair of output power transistors responsive to a PWM information signal. The circuit operates in response to an operating state signal indicating a start up condition for the amplifier to vary the amplitude of the drive pulses for the output transistors between a zero value and a maximum value for normal operation of the amplifier over a start up interval, and to reverse the process during a shut down interval. A DC offset detector is provided to detect a DC offset at amplifier output, and an error circuit responsive to an output of the DC offset detector controls the relative amplitude of the driver outputs during at least a portion of the start up interval to substantially eliminate the DC offset. Also disclosed is a switching amplifier including a control terminal driver circuit as described above.
Description
The cross reference of related application
[0001] the application requires on December 18th, 2003 to submit to, and sequence number is 60/530,449, and exercise question is rights and interests and the priority about U.S. Provisional Patent Application with gate driver of soft start function, and its complete content is incorporated in that this is for reference.
Technical field
[0002] the present invention relates to switching amplifier (switching amplifier) and about the more deep content of this amplifier, an improving technology wherein is used to eliminate the noise that produces when amplifier improves power or reduces power.The invention describes the content of audio frequency amplifier, but the present invention is also effective during in other frequencies at switching amplifier, perhaps (for example, other application of high-end and low side MOSFET) are also effective, to be used to drive the load between the transistor common node for the power transistor that is connecting.
Background technology
[0003] switching amplifier is generally regarded as the D class A amplifier A, is characterized in the output stage of pair transistor form, MOSFET normally, and they are connected in series between the both positive and negative polarity of power supply.Under the situation of audio frequency amplifier, the common node between the MOSFET couples together by low pass filter (low-pass filter), in order to drive one loudspeaker.Be in operation, two output transistors play the effect of switch, and promptly they are by driven between complete conducting state and complete not on-state.Therefore, remove the loss by resistance (Rds) generation of MOSFET, the voltage at public output node place is alternately conversion between the positive and negative supply voltage.
[0004] amplification of audio signal is to be realized by the pulse-width modulation (PWM) of the gate drive signals that is used for power transistor, and the signal after amplifying recovers with low pass filter.For convenient more, compare with audio signal, its inversion frequency select higher (for example, 250-300KHz).
[0005] except during switch transition, output transistor is not that complete conducting is exactly to end fully, so the D class A amplifier A shows low energy consumption and high efficiency.Under good circuit design, 75% efficient or even 90% such high efficient can both easily realize.In addition, Xian Dai D class A amplifier A shows splendid acoustic frequency response and the distortion value that can compare with the audio frequency amplifier of other types excellent in design.The D class A amplifier A has had 50 years approximately for people know, but in concrete application, found increasing purposes, in the application that must avoid high heat-dissipation (because big electric current uses), flat-surface television for example, also have simultaneously in the necessary maximized application of the battery life of economic utility and user benefit, for example mobile phone and other portable audio device.
[0006] Fig. 1 represents the D class A amplifier A 10 of a routine, and it has one to have the half bridge topology (topology) of two MOSFET (metal oxide semiconductor field effect tube) output transistor 12 and 14 and drive loud speaker 16 by LC filter 18.Audio input signal provides at 20 places, with one come the negative-feedback signal of self-feedback ciucuit 22 to transmit simultaneously, be connected with an input of comparator 26 by error amplifier 24.Another input of comparator 26 is provided by triangle generator 28, thereby provides a pulse-width modulation input signal to the gate driver circuit, which 30 that are used for controlling MOSFET12 and 14 work.
[0007] Fig. 2 is illustrated in the output stage of the D class A amplifier A 40 in a full-bridge or half-bridge (H-bridge) layout.Here, two MOSFET output transistors drive loud speaker 46 to 42a-42b and the 44a-44b LC filter 48a-48b by separately.This provides the sound output that increases under identical supply voltage, simultaneously more feasible in operate in open loop state, but is cost with complicated and expensive more circuit obviously.
[0008] problem of D class A amplifier A design is the switch noise of how handling in raising of output transistor power and reduction process.Usually, this will solve by use relay between output loop and loud speaker, but this method will increase the size and the cost of amplifier significantly.
[0009] provide soft start (softstart) and soft closing (soft stop) to become a kind of selectable mode that is considered to by the gate driver that changes output transistor gradually.For example, be proposed the circuit that provides to be used in starting at interval, increasing the pulse duration of gate drive signals gradually and in off-interval, to reduce the pulse duration of gate drive signals gradually.Yet this mode is inoperative in the half bridge topology of Fig. 1, because the intrinsic direct current offset that produces from conversion duty cycle (DC offset) has caused as the offensive noise made in coughing or vomiting warbling of the oriole noise (clicking noise) of switch noise.
[0010] another kind of possible mode is the gate voltage that increased MOSFET at interval gradually by the intensity that increases gate drive pulses starting before switch work is finished, and comes shutdown amplifier by opposite process.Yet, because the magnitude of voltage Vth of MOSFET changes with unit voltage, thus Voltage unbalance, promptly direct current offset still may exist, and this must all be resolved in half-bridge and two layouts of full-bridge.Therefore still need a suitable way remove D class A amplifier A repeat circuit (relay) thus use finish a low cost and more succinct design.
Summary of the invention
[0011] the present invention provides feedback compensation to address that need by the direct current offset in half-bridge and full-bridge layout.According to the present invention, the gate drive pulses amplitude of MOSFET output stage is enhanced in startup and off-interval and reduces provides soft start and the special construction of closing for amplifier.In half-bridge structure, the DC feedback compensation circuit be connected ordinary node or the tone filter output of MOSFET and be used for that control gate driver pulse amplitude increases or the multiplication factor control loop of slip between.In full bridge structure, DC feedback loop is connected between the paired MOSFET driving differential input signal is provided.Feedback circuit average output signal or turn round with different modes and to produce an error signal of representing DC offset level (level).This error signal is used for adjusting the slope of gate driver, thereby makes high-end and low side balance direct current offset in startup and off-interval of MOSFET.
[0012] soft start/closing function is embodied as according to the present invention and is the part in the gate driver integrated circuit (IC), and this integrated circuit comprises pulse-width modulation circuit, MOSFET, other auxiliary circuit, and these unit constructions become a complete D class A amplifier A.
[0013] therefore, it is one object of the present invention that the power tube that is connected in series for a pair of high low side provides the gate driver circuit, which of an improvement, this power tube is in the application that can be used for changing, in order to eliminate the D class A amplifier A that needs a relay to come to disconnect from loud speaker amplifier during opening and closing.
[0014] further purpose provides an all spendable modified form gate driver circuit, which in half-bridge and full-bridge layout.
[0015] further purpose provides the gate driver circuit, which of a modified form, wherein, the amplitude of gate drive pulses slope when starting increases, slope descends when closing, and a negative-feedback circuit is provided and is used for judging and compensates any arbitrary direct current offset in loudspeaker driving circuit simultaneously.
[0016] an object of the present invention is to provide one can provide soft start and close, and therefore do not need a relay in the interval that starts and close, from loud speaker, amplifier to be disconnected, thereby eliminate the D class audio amplifier of audible noise in above interval.
[0017] another object of the present invention provides the amplifier that an energy uses in half-bridge or full-bridge layout.
[0018] another object of the present invention is: a slope and the slope that reduces the gate drive pulses amplitude when an off-interval amplifier of realizing open and close function by improve starting gate drive pulses amplitude at interval is provided, and wherein, negative feedback is used to judge and compensates any direct current offset in the loudspeaker driving circuit.
Description of drawings
[0019] according to following embodiment and accompanying drawing, other purpose and characteristics of the present invention will be apparent, wherein:
[0020] Fig. 1 represents to have the circuit diagram of the D class A amplifier A of conventional half bridge topology;
[0021] Fig. 2 represents to have the circuit diagram of the D class A amplifier A output stage of conventional half-bridge (H-bridge) or full-bridge layout;
[0022] Fig. 3 represents the attainable partial circuit figure that the D class A amplifier A of soft start and closing function is arranged of the present invention;
[0023] structure chart of the slope control circuit shown in Fig. 4 presentation graphs 3;
[0024] Fig. 5 is high-end and low side and and the slope increase of direct current offset control and the oscillogram that reduces of MOSFET.
Embodiment
[0025] with reference to figure 3, be shown as 50, the part of the D class A amplifier A of half bridge topology drives and is illustrated as a load R by LC filter 54
LLoud speaker 52.High-end 56 and the low side 58 of MOSFET output is connected in their current path by polyphone, the both positive and negative polarity of output (load) power supply+and-VB between, common node 60 is connected on the filter 54.Gating circuit 62 is preferably the form of individual chips, comprises the gate driver 64 and 66 that is used for MOSFET56 and 58, and auxiliary gate driver (in logic) power circuit 78 any routine or desired results and 82.
[0026] gate control circuit 62 also comprises 72 and slope control circuits 76 of feedback loop (loop).Feedback loop 72 is separating with the illustrated audible feedback loop 22 of Fig. 1 on the function and on the structure, and comprises the direct current wave detector of arbitrary adequate types, is connected to the output of audio recovery filter 54 as shown.Like this, in the mode of lead 88, provide the signal of representing any direct current offset as an input of arriving slope control circuit 76.But, be understandable that, and the input of direct current wave detector 74 can be connected to the input of filter 54 selectively shown in dotted line 90.
[0027] gate driver 64 and 66 all receives the pulse-width signal of audio frequency-modulation at input 68 and 70 separately from pulse-width modulation (PWM) the circuit (not shown) that is fit to.The D class A amplifier A is conventional in response to the operation of pulse width modulation audio signal, and further describes and omit for simplicity.
[0028] with reference to figure 3 and Fig. 4, slope control circuit 76 comprises an error amplifier 86, and error amplifier receives the dc error signals input and from the energising-outage control signal such as the output mos FET of master controller on lead 91 of microprocessor (not shown) at lead 88 from direct current wave detector 74.The output of error amplifier 86 is connected to translation device (level Shifter) 92 by lead 94, and the translation device 92 on the lead 80 is followed successively by with gate driver circuit, which 64 high-end relevant logic power MOSFET78 gate control signal is provided.Energising on the lead 91-outage control signal is also directly provided, as the gate control signal for the logic power MOSFET82 relevant with low side gate driver circuit, which 66 on the lead 84
[0029] now again with reference to figure 5, the waveform on the lead (a) is represented to begin to last till T5 energising-outage control signal constantly constantly from T1, is supposed that wherein amplifier is pent.As illustrated, this signal is carved into the T3 moment (start-up time at interval) when T1 be the form that rises on the slope, is carved into T4 then and remains on a fixing level value the interval normal working hours constantly from T3 the time.And if desired, when offering the power complete obiteration of MOSFET56 and 58, conventional also can be provided in the noise reduction time interval that T0 starts to the T1 moment constantly from system, to allow the stability of other circuit elements, eliminate the startup noise that to hear as an additional measure.
[0030] when system is closed, the form that the time interval T4 shown in the energising on the lead 91-outage control signal shows as reduces to the slope among the T5.
[0031] gate drive signals of MOSFET56 and 58 is described successively respectively at the waveform of Fig. 5 (b) and (c).Increase by make the electricity of logic power MOSFET64 and 66 lead slope among the interval T 1-T3 in start-up time, with lead slope by the electricity that in shut-in time interval T 4-T5, makes logic power MOSFET64 and 66 and reduce, the pulse-width signal on the lead 68 and 70 is by Modulation and Amplitude Modulation effectively.
[0032] for fear of above-mentioned DC offset problem, the dc error compensating signal on the lead 88 is integrated as transistor 78 and 82 with energising-outage slope signal in the error amplifier 86 different instantaneous conductivity standards is provided.This has increased supply voltage to one of them of gate driver 64 or 66, and therefore the MOSFET output at node 60 places has produced asymmetric.The different voltage on the lead 84 and the output of the error amplifier 86 on the lead 94 are by shown in the line (d) of Fig. 5.Here, the electricity of supposing MOSFET56 is led and must be increased faster than MOSFET58 slightly.When direct current offset reduced and finally eliminates, for example, at T2 constantly, then direct current wave detector 74 was output as zero, and reached equivalent in the output of the energising on the lead 84-outage slope signal value and the error amplifier on lead 94 86.
[0033] in off position in, and for example the above works and influences any inevitable asymmetric balance direct current offset that comes in the gate driver voltage DC-offset compensation.
[0034] though the present invention be described about its special applications, many other variation and correction and other usage will become clearer to the art technology popularity.Therefore, wish that the present invention is not confined to details description wherein, and can be by the four corner of appended claim permission.
Claims (21)
1. switching amplifier comprises:
Two have the output transistor of current path and control terminal separately, and current path is connected in series between the positive and negative terminals of power supply, and public output node is connected and can be connected with between the transistor that drives load;
The drive circuit that is used for control terminal;
The signal source of pulse-width modulation PWM signal is provided, and its duty ratio is expressed as information signal;
The control terminal drive circuit that is used for each output transistor;
The control terminal drive circuit, described output transistor is being opened and driven between the closing state fully to the response pulse-width signal fully to produce pulse modulation control terminal driving pulse, and transistor is opened and another is closed simultaneously;
The control terminal drive circuit, further in response to a working state signal, make amplifier elapsed boot time at interval back operate as normal at interval to change the amplitude of control terminal driving pulse between null value and maximum the start-up time of described working state signal indication amplifier;
Feedback circuit, it comprises the wave detector in response to the direct current offset at output node place; And
Error circuit, it is in response to the output of the wave detector relative amplitude with control control terminal driving pulse during arriving complete cancellation of DC offset at interval the start-up time at least a portion.
2. switching amplifier as claimed in claim 1, it further comprises the low pass filter that is connected and is suitable for being connected to load with output node.
3. switching amplifier as claimed in claim 2, wherein said wave detector is connected to output node.
4. switching amplifier as claimed in claim 2, wherein said wave detector is connected to the output of low pass filter.
5. switching amplifier as claimed in claim 1, wherein said load is a loud speaker.
6. switching amplifier as claimed in claim 1, wherein said control terminal drive circuit comprises power circuit separately, it changes the amplitude of control terminal driving pulse separately in response to the working state signal amplitude.
7. switching amplifier as claimed in claim 6, wherein said working state signal are the slope form that rises in the interval in start-up time, are the slope forms that descends in the shut-in time interval, are the values of stable state in the work of normal amplifier.
8. switching amplifier as claimed in claim 7, wherein said power circuit in response to the slope that descends the amplitude of control terminal driving pulse is reduced to null value from maximum at interval in the shut-in time.
9. during the output that switching amplifier as claimed in claim 8, wherein said error circuit further respond wave detector is arrived complete cancellation of DC offset at interval with the shut-in time at least a portion, the relative amplitude of control control terminal driving pulse.
10. switching amplifier as claimed in claim 6, wherein:
Error circuit comprises an error amplifier, and described error amplifier has first input that is connected to the wave detector output and second input that is connected to working state signal,
Working state signal is connected to one of them of the output transistor that is connected directly to power circuit, and
The output of error amplifier is connected to the power circuit of another power transistor.
11. switching amplifier as claimed in claim 10, it further comprises the translation device that error circuit is connected to power circuit.
12. switching amplifier as claimed in claim 1, wherein:
Working state signal is included as amplifier indication shut-in time part at interval; And
Drive circuit, it is worked at interval in the described shut-in time and is reduced to null value with the amplitude with the control terminal driving pulse from maximum.
13. switching amplifier as claimed in claim 12, wherein said error circuit is in response to the output of the wave detector relative amplitude with control terminal driving pulse during arriving complete cancellation of DC offset at interval at least a portion shut-in time.
14. the gate control circuit of a switching amplifier, it comprises two MOSFET output transistors, transistor has separately source electrode and the gate terminal to the leakage current path, current path is connected in series between the both positive and negative polarity of power end, and be suitable for driving the load that is connected the public output node between transistor
Wherein gate control circuit is configured and is provided with, make amplifier be operated in described MOSFET and alternately be in complete conducting state and complete cut-off state, and another MOSFET is in opposite conducting state fully with the response pulse-width signal, and its duty ratio is expressed as information signal; Described gate control circuit comprises:
The gate driver that is used for each MOSFET, its response pulse-width signal be used for generation MOSFET pulse-width modulation the door driving pulse;
Be connected slope control circuit with the actuating doors driver;
Described slope control circuit is made response to working state signal, and the entry condition of these signal indication amplifiers is to change the amplitude of width-modulation pulse sequence between the null value that runs well at interval in amplifier start-up time and the maximum; With
The direct current offset wave detector, it is suitable for being connected to detect direct current offset at public output node place; And
Error circuit, it is in response to the output of direct current offset wave detector, with the relative amplitude of the gate drive pulses that control is relevant during start-up time, a part at interval arrived complete cancellation of DC offset at least.
15. gate control circuit as claimed in claim 14, wherein said control terminal drive circuit comprises power circuit separately, this power circuit in response to the amplitude of working state signal to change the amplitude of control terminal driver pulse separately.
16. gate control circuit as claimed in claim 14, wherein said working state signal is the form of acclivity in start-up time in the interval, is the form on decline slope in the shut-in time interval, and the state value of stable state is arranged in the amplifier operate as normal.
17. gate control circuit as claimed in claim 16, wherein said gate driver circuit, which is reduced to null value with the amplitude of control terminal driving pulse from maximum in response to the slope that descends in the shut-in time interval.
18. gate control circuit as claimed in claim 15, wherein:
Described error circuit comprises an error amplifier, and this error amplifier has first input that is connected to wave detector output and is suitable for receiving second input of working state signal,
Working state signal is directly connected to the power circuit of one of them driver of MOSFET; And
The output of error amplifier is connected on the power circuit of another mosfet driver.
19. gate control circuit as claimed in claim 15 further comprises the translation device that error circuit is connected to one of power circuit.
20. switching amplifier as claimed in claim 14, wherein:
Working state signal comprises the shut-in time part at interval of indicating amplifier; And
Gate driver circuit, which can be worked in the shut-in time interval, is reduced to null value with the amplitude with the control terminal driving pulse from maximum.
21. switching amplifier as claimed in claim 20, wherein said error circuit at least a portion shut-in time at interval in further in response to the output of wave detector, with the relative amplitude of control control terminal driving pulse.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US53044903P | 2003-12-18 | 2003-12-18 | |
| US60/530,449 | 2003-12-18 | ||
| US11/016,632 | 2004-12-17 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1914794A true CN1914794A (en) | 2007-02-14 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA2004800413511A Pending CN1914794A (en) | 2003-12-18 | 2004-12-20 | Gate control circuit with soft start/stop function |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1914794A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101369802B (en) * | 2007-08-16 | 2012-09-05 | 美国芯源系统股份有限公司 | Closed-loop D-class power amplifier and its control method |
| CN107005207A (en) * | 2014-10-24 | 2017-08-01 | 塞瑞斯逻辑公司 | With adjustable oblique ascension/oblique deascension gain to minimize or eliminate the amplifier of pop noise |
| CN108880492A (en) * | 2017-05-11 | 2018-11-23 | 英飞凌科技奥地利有限公司 | D audio frequency amplifier and its reduction method of output-stage power consumption |
| TWI774327B (en) * | 2020-07-10 | 2022-08-11 | 新唐科技股份有限公司 | Ouput driver and pre-charging method thereof |
-
2004
- 2004-12-20 CN CNA2004800413511A patent/CN1914794A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101369802B (en) * | 2007-08-16 | 2012-09-05 | 美国芯源系统股份有限公司 | Closed-loop D-class power amplifier and its control method |
| CN107005207A (en) * | 2014-10-24 | 2017-08-01 | 塞瑞斯逻辑公司 | With adjustable oblique ascension/oblique deascension gain to minimize or eliminate the amplifier of pop noise |
| CN108880492A (en) * | 2017-05-11 | 2018-11-23 | 英飞凌科技奥地利有限公司 | D audio frequency amplifier and its reduction method of output-stage power consumption |
| CN108880492B (en) * | 2017-05-11 | 2023-09-12 | 英飞凌科技奥地利有限公司 | Class D audio amplifier and method for reducing power consumption of output stage thereof |
| TWI774327B (en) * | 2020-07-10 | 2022-08-11 | 新唐科技股份有限公司 | Ouput driver and pre-charging method thereof |
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