CN1913320A - Digital controlled inverter and its control method - Google Patents

Digital controlled inverter and its control method Download PDF

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CN1913320A
CN1913320A CN 200610019712 CN200610019712A CN1913320A CN 1913320 A CN1913320 A CN 1913320A CN 200610019712 CN200610019712 CN 200610019712 CN 200610019712 A CN200610019712 A CN 200610019712A CN 1913320 A CN1913320 A CN 1913320A
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inverter
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康勇
彭力
张凯
何俊
陈坚
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Huazhong University of Science and Technology
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Abstract

This invention discloses a digit controlled inversion supply and its control method, in which, the output of an augmented state feedback digit controller is connected with the input of an inverter, the output of which is connected with the input of a voltage sensor and a load, the first output end of the voltage sensor is connected with the negative input of a subtracter, the positive input of which receives reference volume ur, the output of which is connected with the input of a controller, the inverter is connected DC supply, the current led out from the inverter is connected with the input of the current sensor, the output of which and a second output of the voltage sensor are connected with the negative input of the controller constituting a microprocessor with the subtracter.

Description

Numerically controlled inverter and control method thereof
Technical field
The present invention relates to a kind of power conversion circuit, particularly a kind of numerically controlled inverter and control method thereof.
Background technology
Along with development of science and technology, the raising of the level of informatization, important department, power consumption equipment increase day by day to the requirement of power supply power supply quality on the one hand, the continuous increase of a large amount of uses of power electronic equipment, nonlinear load makes that the harmonic pollution of electrical network is very serious on the other hand, has formed distinct imbalance between supply and demand.For this reason, the research of High Performance PWM inverter more and more receives publicity in recent years.
Digital control have many superior parts with respect to simulation control, makes it to be subjected to extensive concern.The particularly development of advancing by leaps and bounds along with microelectric techniques such as microprocessors in recent years, numerically controlled hardware platform upgrades day by day, more accelerates numerically controlled applying.Response characteristic was bad when the digitial controller of PWM inverter adopted conventional control strategy, compared performance with the conventional simulation controller and obviously descended; Repeat control and can suppress periodic disturbance well, improve the steady-state response of system, but dynamic response is unhappy, at least at one more than the primitive period; Dead beat control has dynamic responding speed faster, but control performance is strong to the system parameters dependence, and parameter is changed sensitivity, and poor robustness might reduce the stability of a system or even unstable; Be suggested though as seen more can bring into play several special digital control methods of digital control advantage, exist not enough.
Summary of the invention
The objective of the invention is to overcome above-mentioned the deficiencies in the prior art part, a kind of numerically controlled inverter is provided; This inverter dynamic response is quick, steady, and the total percent harmonic distortion of output voltage is low under the nonlinear load situation, surpasses under 3 the situation at specified nonlinear load, load current crest factor, the total percent harmonic distortion of output voltage is also lower, the stable state accuracy height, and simple in structure, and cost is lower; The present invention also provides the control method of this inverter.
A kind of numerically controlled inverter provided by the invention, it is characterized in that: the input and the microprocessor of inverter join, the output of inverter joins with the input of voltage sensor and load, the electric current of drawing in the inverter and the input of current sensor join, inverter links to each other with DC power supply, and the output of voltage sensor and the output of current sensor join with microprocessor respectively.
Above-mentioned described microprocessor comprises augmented state feedback digital controller and subtracter, the output of augmented state feedback digital controller and the input of inverter join, first output of voltage sensor and the negative input end of subtracter join, and the positive input terminal of subtracter receives reference quantity u r, the input of the output of subtracter and augmented state feedback digital controller joins, and second output of the output of current sensor and voltage sensor joins with the negative input end of augmented state feedback digital controller respectively.Augmented state feedback digital controller can also comprise state observer, and the input of state observer links to each other with the output of current sensor and voltage sensor respectively.
The control method of above-mentioned numerically controlled inverter, its step comprises:
(1) the output voltage u of the current bat of collection voltage sensor output 0(k) and the output current i (k) of the current bat of current sensor output;
(2) utilize formula (A) to calculate the error intergal signal e of current bat i(k), e wherein i(k-1) be the last one error intergal signal of clapping, its initial value is 0;
e i(k)=e(k)+e i(k-1) (A)
Wherein e (k) is current bat error signal, and its value equals the reference quantity u of current bat r(k) with the output voltage u of current bat 0(k) difference;
(3) utilize the error intergal signal e of current bat i(k) calculate the control signal u of next bat 1(k+1);
(3A) the current signal i when collection is the filter inductance current i 1The time, utilize formula (B) to calculate the control signal u of next bat 1(k+1), i wherein 1(k) be the filter inductance electric current of current bat:
u 1(k+1)=k ie i(k)-k 1u 0(k)-k 2i 1(k) (B)
(3B) the current signal i when collection is the filter capacitor current i cThe time, utilize formula (C) to calculate the control signal u of next bat 1(k+1), i wherein c(k) be the filter capacitor electric current of current bat:
u 1(k+1)=k ie i(k)-k 1u 0(k)-k 2i c(k) (C)
(3C) the current signal i when collection is load current i 0The time, its processing procedure is:
(3C1) utilize formula (D1) to calculate the output voltage measured value of next bat Filter inductance electric current measured value with next bat
Figure A20061001971200072
I wherein 0(k) be the load current of current bat:
u ^ 0 ( k + 1 ) i ^ 1 ( k + 1 ) = ( A d - HC d ) u ^ 0 ( k ) i ^ 1 ( k ) + B d u 1 ( k ) i 0 ( k ) + HC d u 0 ( k ) i 1 ( k ) - - - ( D 1 )
Wherein,
A d = e - r 2 L T cos ω d T + r 2 L ω d e - r 2 L T sin ω d T 1 Cω d e - r 2 L T sin ω d T - 1 L ω d e - r 2 L T sin ω d T e - r 2 L T cos ω d T - r 2 L ω d e - r 2 L T sin ω d T
B d=[H 1?H 2]
H 1 = e - r 2 L T ( - cos ω d T - r 2 L ω d sin ω d T ) + 1 1 L ω d e - r 2 L T sin ω d T
H 2 = r ( e - r 2 L T cos ω d T + r 2 L ω d e - r 2 L T sin ω d T - 1 ) - 1 C ω d e - r 2 L T sin ω d T - e - r 2 L T cos ω d T - r 2 L ω d e - r 2 L T sin ω d T + 1
C d=[1?0]
ω n = 1 LC , Natural frequency of oscillation for inverter
ω d = 1 LC - r 2 4 L 2 , Damped oscillation frequency for inverter
L is the filter inductance of inverter, and C is the filter capacitor of inverter, and r is the equivalent damping resistance of inverter, and H is the feedback gain matrix of state observer.
(3C2) utilize formula (D2) to calculate the error signal measured value of next bat
Figure A20061001971200079
e ^ ( k + 1 ) = u r ( k + 1 ) - u ^ 0 ( k + 1 ) - - - ( D 2 )
(3C3) utilize formula (D3) to be calculated as the error intergal signal measured value of next bat
Figure A200610019712000711
e ^ i ( k + 1 ) = e ^ ( k + 1 ) + e i ( k ) - - - ( D 3 )
(3C4) utilize formula (D4) or formula (D5)-(D6) to calculate the control signal u of next bat 1(k+1),
Wherein Filter capacitor electric current measured value for next bat:
u 1 ( k + 1 ) = k i e ^ i ( k + 1 ) - k 1 u ^ 0 ( k + 1 ) - k 2 i ^ 1 ( k + 1 ) - - - ( D 4 )
i ^ c ( k + 1 ) = i ^ 1 ( k + 1 ) - i 0 ( k ) - - - ( D 5 )
u 1 ( k + 1 ) = k i e ^ i ( k + 1 ) - k 1 u ^ 0 ( k + 1 ) - k 2 i ^ c ( k + 1 ) - - - ( D 6 )
Wherein, k i = 1 + β 2 + β 3 + β 4 1 - 2 e - r 2 L T cos ω d T + e - r L T
k 1 = β 2 - β 4 + 1 + 2 a 1 - e - r L T - ( 1 - a 1 - a 2 ) k i 1 - 2 a 1 + e - r L T
k 2 = β 2 + 1 + 2 a 1 - ( 1 - a 1 - a 2 ) ( k 1 + k i ) 2 a 2 / r
a 1 = e - r 2 L T cos ω d T
a 2 = r 2 L ω d e - r 2 L T sin ω d T ;
(4) utilize control signal u 1(k+1) inverter is regulated;
(5) make k=k+1, repeating step (1)-(4) are until end-of-job.
The present invention compared with prior art has the following advantages:
(1) under the idle condition, it is short that the settling time of waveform is followed the tracks of in the inverter control system dynamic instruction that is made of augmented state feedback digital controller and inverter, is no more than 3.5ms, and overshoot is little, less than 9%.
When (2) load changing reached rated power, dynamic transition process was no more than 2ms, and the output voltage rate of change is no more than 10%, and workload-adaptability strengthens.
(3) under the various loading conditions from the zero load to the nominal load, all within 0.5%, steady-state error reduces the precision of voltage regulation greatly.
(4) the total percent harmonic distortion of output voltage is low under the nonlinear load situation, surpass under 3 the situation at specified nonlinear load, load current crest factor, the total percent harmonic distortion of output voltage is also lower, for example, at the electric current crest factor is 3.03 o'clock, THD=1.9% shows the wave distortion that nonlinear load is caused and has stronger inhibition ability.
(5) the present invention is in the design to inverter augmented state feedback digital controller Control Parameter, adopt STATE FEEDBACK CONTROL to realize any configuration of system's closed-loop pole, with stability, the dynamic property of safeguards system and reduce steady-state error, whole power-supply system has stronger robustness.Under various load disturbance situation, all can obtain colory ac output voltage; Whole inverter system changes insensitive to inverter parameter, augmented state feedback digital controller parameter, the system responses performance is stable.
(6) circuit structure of the present invention is simple, and cost is low, is easy to realize.
Description of drawings
Fig. 1 is the structural representation of the numerically controlled inverter of the present invention;
Fig. 2 is the microprocessor main program flow chart;
Fig. 3 is the control algolithm program flow diagram one among Fig. 2;
Fig. 4 is the schematic circuit block diagram one of Fig. 1;
Fig. 5 is the control algolithm program flow diagram two among Fig. 2;
Fig. 6 is the schematic circuit block diagram two of Fig. 1;
Fig. 7 is the control algolithm program flow diagram three among Fig. 2;
Fig. 8 is the control algolithm program flow diagram four among Fig. 2;
Fig. 9 is the schematic circuit block diagram three of Fig. 1.
Embodiment
Below in conjunction with accompanying drawing the present invention is described in further detail.
As shown in Figure 1, the structure of inverter of the present invention is: the output of augmented state feedback digital controller 7 and the input of inverter 2 join, the input of the output of inverter 2 and voltage sensor 5 and load 3 are joined, first output of voltage sensor 5 and the negative input end of subtracter 8 join, and the positive input terminal of subtracter 8 receives reference quantity u rThe input of the output of subtracter 8 and augmented state feedback digital controller 7 joins, inverter 2 connects DC power supply 4, the input of electric current of drawing in the inverter 2 and current sensor 6 joins, and second output of the output of current sensor 6 and voltage sensor 5 joins with the negative input end of augmented state feedback digital controller 7 respectively.
Inverter 2, voltage sensor 5 and current sensor 6 can be selected common inverter, voltage sensor and current sensor for use.
Subtracter 8 and augmented state feedback digital controller 7 constitute microprocessor 1.Wherein microprocessor can be single-chip microcomputer or digital signal processing chip.
Microprocessor 1 is gathered the voltage signal of voltage sensor 5 outputs and the current signal of current sensor 6 outputs, according to electric current, voltage signal and reference quantity, and the calculation control signal, and export inverter 2 to, control inverter 2 work.
Microprocessor 1 and inverter 2 constitute an augmented state feedback digital control system, current i in the inverter 2 and output voltage u 0Enter microprocessor 1 through over-current sensor and voltage sensor respectively, microprocessor 1 is through producing control signal u behind the sequential operation 1Inverter 2 is implemented control, and wherein the current signal i in the inverter 2 can be the filter inductance current i 1, the filter capacitor current i cWith load current i 0
The control method that augmented state feedback digital controller 7 is adopted the steps include: as shown in Figure 2
(1) gathers the output voltage u of the current bat that voltage sensor obtains 0(k) and the output current i (k) of the current bat that obtains of current sensor, calculate the error signal e (k) of current bat, e (k) equals the reference quantity u of current bat r(k) with the output voltage u of current bat 0(k) difference; A sampling period T is called a bat in numerical control system, discrete constantly the expression with kT, be abbreviated as k, and represent k the discrete moment, its initial value is 0.
(2) utilize formula (A) to calculate the error intergal signal e of current bat i(k), e wherein i(k-1) be the last one error intergal signal of clapping, its initial value is 0;
e i(k)=e(k)+e i(k-1) (A)
(3) utilize the error intergal signal e of current bat i(k) calculate the control signal u of next bat 1(k+1);
Because the current i in the inverter 2 comprises the filter inductance current i 1, the filter capacitor current i cWith load current i 0,, adopt the control signal u of different next bats of algorithm computation according to the difference of the current signal of gathering 1(k+1), illustrated respectively below.
(3A) the current signal i when collection is the filter inductance current i 1The time, as shown in Figure 3, utilize formula (B) to calculate the control signal u of next bat 1(k+1), i wherein 1(k) be the filter inductance electric current of current bat:
u 1(k+1)=k ie i(k)-k 1u 0(k)-k 2i 1(k) (B)
Fig. 4 is corresponding with it schematic circuit block diagram.As shown in Figure 4, output voltage u 0With reference quantity u rRelatively the error signal e of back generation produces error intergal signal e through integral element 9 i, error intergal signal e iMultiply by integral coefficient k iAfter deduct output voltage u 0With the Voltage Feedback coefficient k 1Product, deduct the filter inductance current i again 1With the current feedback coefficient k 2Product, last controlled signal u 1Inverter 2 is regulated.
(3B) the current signal i when collection is the filter capacitor current i cThe time, as shown in Figure 5, utilize formula (C) to calculate the control signal u of next bat 1(k+1), i wherein c(k) be the filter capacitor electric current of current bat:
u 1(k+1)=k ie i(k)-k 1u 0(k)-k 2i c(k) (C)
Fig. 6 is corresponding with it schematic circuit block diagram.As shown in Figure 6, its structure is similar to Fig. 4, and difference is that the electric current of inverter 2 among Fig. 4 is filter inductance current i 1, and the electric current of inverter 2 is filter capacitor current i among Fig. 6 c
(3C) the current signal i when collection is load current i 0The time, as shown in Figure 7 and Figure 8, step (3) comprises following process:
(3C1) utilize formula (D1) to calculate the output voltage measured value of next bat
Figure A20061001971200111
Filter inductance electric current measured value with next bat I wherein 0(k) be the load current of current bat:
u ^ 0 ( k + 1 ) i ^ 1 ( k + 1 ) = ( A d - HC d ) u ^ 0 ( k ) i ^ 1 ( k ) + B d u 1 ( k ) i 0 ( k ) + HC d u 0 ( k ) i 1 ( k ) - - - ( D 1 )
A d = e - r 2 L T cos ω d T + r 2 L ω d e - r 2 L T sin ω d T 1 C ω d e - r 2 L T sin ω d T - 1 L ω d e - r 2 L T sin ω d T e - r 2 L T cos ω d T - r 2 L ω d e - r 2 L T sin ω d T
B d=[H 1?H 2]
H 1 = e - r 2 L T ( - cos ω d T - r 2 L ω d sin ω d T ) + 1 1 L ω d e - r 2 L T sin ω d T
H 2 = r ( e - r 2 L T cos ω d T + r 2 L ω d e - r 2 L T sin ω d T - 1 ) - 1 C ω d e - r 2 L T sin ω d T - e - r 2 L T cos ω d T - r 2 L ω d e - r 2 L T sin ω d T + 1
C d=[1?0]
ω n = 1 LC , Natural frequency of oscillation for inverter 2
ω d = 1 LC - r 2 4 L 2 , Damped oscillation frequency for inverter 2
Wherein L is the filter inductance of inverter 2, and C is the filter capacitor of inverter 2, and r is the equivalent damping resistance of inverter 2;
H is the feedback gain matrix of state observer 10, according to (A d-HC d) characteristic value select feedback gain matrix H to get final product than the fast principle more than 5 times of the closed loop characteristic value of inverter 2.
(3C2) utilize formula (D2) to calculate the error signal measured value of next bat
Figure A20061001971200122
e ^ ( k + 1 ) = u r ( k + 1 ) - u ^ 0 ( k + 1 ) - - - ( D 2 )
(3C3) utilize formula (D3) to calculate the error intergal signal measured value of next bat
e ^ i ( k + 1 ) = e ^ ( k + 1 ) + e i ( k ) - - - ( D 3 )
(3C4) utilize formula (D4) or formula (D5)-(D6) to calculate the control signal u of next bat 1(k+1),
Wherein
Figure A20061001971200126
Filter capacitor electric current measured value for next bat:
u 1 ( k + 1 ) = k i e ^ i ( k + 1 ) - k 1 u ^ 0 ( k + 1 ) - k 2 i ^ 1 ( k + 1 ) - - - ( D 4 )
i ^ c ( k + 1 ) = i ^ 1 ( k + 1 ) - i 0 ( k ) - - - ( D 5 )
u 1 ( k + 1 ) = k i e ^ i ( k + 1 ) - k 1 u ^ 0 ( k + 1 ) - k 2 i ^ c ( k + 1 ) - - - ( D 6 )
Fig. 9 is the schematic circuit block diagram corresponding with Fig. 7 and Fig. 8.As shown in Figure 9, its structure is similar to Fig. 4, and difference is that the electric current of inverter 2 among Fig. 4 is filter inductance current i 1, and the electric current of inverter 2 is load current i among Fig. 9 0 Comprise state observer 10 in the augmented state feedback digital controller 7 among Fig. 9.State observer 10 is according to the output voltage u of current bat 0(k) and the load current i of current bat 0(k) observe the output voltage measured value of next bat Filter inductance electric current measured value with next bat
Figure A200610019712001211
Its computing formula is formula (D1).
Three state variables, i.e. output voltage u are arranged in the augmented state feedback digital control system 0, the filter inductance current i 1(filter capacitor current i c) and error intergal signal e i, three state variables respectively corresponding three Control Parameter, i.e. Voltage Feedback coefficient k 1, the current feedback coefficient k 2With integral coefficient k iThe design key of augmented state feedback digital controller 7 is determining of its three Control Parameter.
If the state feedback gain matrix is:
K=[k 1?k 2?k i]
Closed-loop pole Z by expectation 1, Z 2, Z 3The characteristic equation of determining is:
(Z-Z 1)(Z-Z 2)(Z-Z 3)=Z 32Z 23Z+β 4
β in the following formula 2, β 3And β 4Be respectively the quadratic term of characteristic equation expansion, once and the coefficient of constant term.
Relatively can get:
k i = 1 + β 2 + β 3 + β 4 1 - 2 e - r 2 L T cos ω d T + e - r L T
k 1 = β 2 - β 4 + 1 + 2 a 1 - e - r L T - ( 1 - a 1 - a 2 ) k i 1 - 2 a 1 + e - r L T
k 2 = β 2 + 1 + 2 a 1 - ( 1 - a 1 - a 2 ) ( k 1 + k i ) 2 a 2 / r
Wherein a 1 = e - r 2 L T cos ω d T
a 2 = r 2 L ω d e - r 2 L T sin ω d T
In the above-mentioned derivation with the filter inductance current i 1As a state variable, if use the filter capacitor current i cReplace inductive current i 1As state variable, because of the system features equation is identical, so Control Parameter is still determined by top three formulas.
(4) utilize control signal u 1(k+1) inverter 2 is regulated;
(5) make k=k+1, repeating step (1)-(4) are until end-of-job.

Claims (4)

1, a kind of numerically controlled inverter is characterized in that:
The input of inverter (2) and microprocessor (1) join, the input of the output of inverter (2) and voltage sensor (5) and load (3) are joined, the input of electric current of drawing in the inverter (2) and current sensor (6) joins, inverter (2) links to each other with DC power supply (4), and the output of the output of voltage sensor (5) and current sensor (6) joins with microprocessor (1) respectively.
2, inverter according to claim 1, it is characterized in that: described microprocessor (1) comprises augmented state feedback digital controller (7) and subtracter (8), the input of the output of augmented state feedback digital controller (7) and inverter (2) joins, the negative input end of first output of voltage sensor (5) and subtracter (8) joins, and the positive input terminal of subtracter (8) receives reference quantity u r, the input of the output of subtracter (8) and augmented state feedback digital controller (7) joins, and second output of the output of current sensor (6) and voltage sensor (5) joins with the negative input end of augmented state feedback digital controller (7) respectively.
3, inverter according to claim 1 and 2, it is characterized in that: augmented state feedback digital controller (7) also comprises state observer (10), and the input of state observer (10) links to each other with the output of current sensor (6) with voltage sensor (5) respectively.
4, the control method of the described inverter of a kind of claim 1, its step comprises:
(1) the output voltage u of the current bat of collection voltage sensor output 0(k) and the output current i (k) of the current bat of current sensor output;
(2) utilize formula (A) to calculate the error intergal signal e of current bat i(k), e wherein i(k-1) be the last one error intergal signal of clapping, its initial value is 0;
e i(k)=e(k)+e i(k-1) (A)
Wherein e (k) is current bat error signal, and its value equals the reference quantity u of current bat r(k) with the output voltage u of current bat 0(k) difference;
(3) utilize the error intergal signal e of current bat i(k) calculate the control signal u of next bat 1(k+1);
(3A) the current signal i when collection is the filter inductance current i 1The time, utilize formula (B) to calculate the control signal u of next bat 1(k+1), i wherein 1(k) be the filter inductance electric current of current bat:
u 1(k+1)=k ie i(k)-k 1u 0(k)-k 2i 1(k) (B)
(3B) the current signal i when collection is the filter capacitor current i cThe time, utilize formula (C) to calculate the control signal u of next bat 1(k+1), i wherein c(k) be the filter capacitor electric current of current bat:
u 1(k+1)=k ie i(k)-k 1u 0(k)-k 2i c(k) (C)
(3C) the current signal i when collection is load current i 0The time, its processing procedure is:
(3C1) utilize formula (D1) to calculate the output voltage measured value of next bat
Figure A2006100197120003C1
Filter inductance electric current measured value with next bat
Figure A2006100197120003C2
I wherein 0(k) be the load current of current bat:
u ^ 0 ( k + 1 ) i ^ 1 ( k + 1 ) = ( A d - HC d ) u ^ 0 ( k ) i ^ 1 ( k ) + B d u 1 ( k ) i 0 ( k ) + HC d u 0 ( k ) i 1 ( k ) - - - ( D 1 )
Wherein,
A d = e - r 2 L T cos ω d T + r 2 L ω d e - r 2 L T sin ω d T 1 C ω d e - r 2 L T sin ω d T - 1 L ω d e - r 2 L T sin ω d T e - r 2 L T cos ω d T - r 2 L ω d e - r 2 L T sin ω d T
B d=[H 1?H 2]
H 1 = e - r 2 L T ( - cos ω d T - r 2 L ω d sin ω d T ) + 1 1 L ω d e - r 2 L T sin ω d T
H 2 = r ( e - r 2 L T cos ω d T + r 2 L ω d e - r 2 L T sin ω d T - 1 ) - 1 C ω d e - r 2 L T sin ω d T - e - r 2 L T cos ω d T - r 2 L ω d e - r 2 L T sin ω d T + 1
C d=[1?0]
ω n = 1 LC , Natural frequency of oscillation for inverter
ω d = 1 LC - r 2 4 L 2 , Damped oscillation frequency for inverter
L is the filter inductance of inverter, and C is the filter capacitor of inverter, and r is the equivalent damping resistance of inverter, and H is the feedback gain matrix of state observer.
(3C2) utilize formula (D2) to calculate the error signal measured value ê (k+1) of next bat:
e ^ ( k + 1 ) = u r ( k + 1 ) - u ^ 0 ( k + 1 ) - - - ( D 2 )
(3C3) utilize formula (D3) to be calculated as the error intergal signal measured value ê of next bat i(k+1):
ê i(k+1)=ê(k+1)+e i(k) (D3)
(3C4) utilize formula (D4) or formula (D5)-(D6) to calculate the control signal u of next bat 1(k+1), wherein Filter capacitor electric current measured value for next bat:
u 1 ( k + 1 ) = k i e ^ i ( k + 1 ) - k 1 u ^ 0 ( k + 1 ) - k 2 i ^ 1 ( k + 1 ) - - - ( D 4 )
i ^ c ( k + 1 ) = i ^ 1 ( k + 1 ) - i 0 ( k ) - - - ( D 5 )
u 1 ( k + 1 ) = k i e ^ i ( k + 1 ) - k 1 u ^ 0 ( k + 1 ) - k 2 i ^ c ( k + 1 ) - - - ( D 6 )
Wherein, k i = 1 + β 2 + β 3 + β 4 1 - 2 e - r 2 L T cos ω d T + e - r L T
k 1 = β 2 - β 4 + 1 + 2 a 1 - e - r L T - ( 1 - a 1 - a 2 ) k i 1 - 2 a 1 + e - r L T
k 2 = β 2 + 1 + 2 a 1 - ( 1 - a 1 - a 2 ) ( k 1 + k i ) 2 a 2 / r
a 1 = e - r 2 L T cos ω d T
a 2 = r 2 L ω d e - r 2 L T sin ω d T ;
(4) utilize control signal u 1(k+1) inverter is regulated;
(5) make k=k+1, repeating step (1)-(4) are until end-of-job.
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JP3699663B2 (en) * 2001-05-24 2005-09-28 勲 高橋 Inverter control method and apparatus
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