CN1897674A - Large-capacity digital image non-loss recording realtime display device - Google Patents
Large-capacity digital image non-loss recording realtime display device Download PDFInfo
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- CN1897674A CN1897674A CN 200510107788 CN200510107788A CN1897674A CN 1897674 A CN1897674 A CN 1897674A CN 200510107788 CN200510107788 CN 200510107788 CN 200510107788 A CN200510107788 A CN 200510107788A CN 1897674 A CN1897674 A CN 1897674A
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Abstract
The invention comprises a signal conversion chip, a FPGA, an interface controller of small computer system, a direct memory access controller, a disk array with the small computer system interface, a display, a memory module and a peripheral computer interface. The input of the signal conversion chip is connected to the output of an external CCD video camera, and the output of the signal conversion chip is connected to the input of the FPGA; the one output of the FPGA is connected to the input of the small computer system interface controller, and then connected to the input of the disk array; another one output of the FPGA is connected to the input of peripheral computer interface, and then connected to the display.
Description
One, technical field
The invention belongs to a kind of large-capacity digital image non-loss recording and the real-time displaying device that relate in the digital image processing techniques field.
Two, technical background
Development along with remote sensing survey technology and photoelectric measurement technology, big face battle array capacitive coupling device (CCD) video camera is widely used, because resolution height, produce a large amount of digital image informations in the short period of time, need real non-destructive to record in the memory device, this storage equipment of will seeking survival has very high lasting storage speed, just can avoid loss of data, thereby create conditions for Digital Image Processing and analysis, and, for the course of work is monitored, show that in real time the digital image non-loss recording content is necessary.Large-capacity digital image non-loss recording and real-time displaying device are the passages between big face battle array capacitive coupling device (CCD) video camera and the data processing terminal.
We think with the most approaching prior art of the present invention is to be published in " photon journal " the 34th volume the 4th phase article that is entitled as " network analysis of high-speed video hard disk recording " of 606~608 pages in April, 2005 by comrades such as the Hao Wei of Xian Inst. of Optics and Precision Mechanics, Chinese Academy of Sciences, its technical scheme as shown in Figure 1: comprise digital image acquisition card 1, peripheral computer interface (PCI) 2, internal memory 3, peripheral computer interface (PCI) 4, small computer system interface (SCSI) controller 5, direct memory access (DMA) controller 6, small computer system interface (SCSI) disk array 7.Ccd video camera links to each other with digital image acquisition card 1, DID enters digital image acquisition card 1 back and enters internal memory 3 by peripheral computer interface (PCI) 2, again DID is write small computer system interface (SCSI) controller 5 by peripheral computer interface (PCI) 4 by internal memory 3 then, enter small computer system interface (SCSI) disk array 7 by direct memory access (DMA) controller 6 then.As can be seen from Figure 1 each width of cloth DID all will use twice peripheral computer interface (PCI) before entering small computer system interface (SCSI) controller 5.Because peripheral computer interface (PCI) continues the restriction of transmission speed, continue the transmission speed maximum and can only reach 51MB/s, can not satisfy the transfer of data requirement of big face battle array capacitive coupling device (CCD) video camera.
Three, summary of the invention
In order to overcome the shortcoming that the prior art scheme exists, the objective of the invention is to: the DID that changes non-loss recording uses peripheral computer interface (PCI) and the not high problem of the processing speed that causes twice.
The technical problem to be solved in the present invention is: a kind of large-capacity digital image non-loss recording and real-time displaying device are provided.The technical scheme of technical solution problem is as shown in Figure 2: comprise Camera link conversion chip 8, field programmable gate array (FPGA) 9, small computer system interface (SCSI) controller 10, direct memory access (DMA) controller 11, small computer system interface (SCSI) redundant array of inexpensive disks 12, display 13, peripheral computer interface (PCI) 14, internal memory 15, peripheral computer interface (PCI) 16.
The input of Camera link conversion chip 8 is connected with the output of the ccd video camera of outside, output is connected with the input of field programmable gate array (FPGA) 9, the output one tunnel of field programmable gate array (FPGA) 9 is connected with the input of small computer system interface (SCSI) controller 10, and another road is connected with the input of peripheral computer interface (PCI) 16; The output of peripheral computer interface (PCI) 16 is connected with the input of internal memory 15, and the output of internal memory 15 is connected with the input of peripheral computer interface (PCI) 14, and the output of peripheral computer interface (PCI) 14 is connected with the input of display 13.The DID that ccd video camera produces enters into Camera link conversion chip 8, Camera link conversion chip 8 changes low-power consumption differential signal (LVDS) into CMOSFET pipe/transistor-transistor logic (COMS/TTL) signal, enter field programmable gate array (FPGA) 9 then, field programmable gate array (FPGA) 9 is divided into two-way to DID, one way digital image data directly enters small computer system interface (SCSI) controller 10, the output of small computer system interface (SCSI) controller 10 is connected with direct memory access (DMA) controller 11 inputs, and the output of direct memory access (DMA) controller 11 is connected with the input of minicomputer interface (SCSI) redundant array of inexpensive disks 12.Small computer system interface (SCSI) agreement of pressing small computer system interface (SCSI) controller 10 realizes direct memory access (DMA) controller 11 functions, enters small computer system interface (SCSI) redundant array of inexpensive disks 12 by direct memory access (DMA) controller 11 then.Small computer system interface (SCSI) redundant array of inexpensive disks 12 is memory spaces.Another way digital image data enters internal memory 15 through peripheral computer interface (PCI) 16, passes through peripheral computer interface (PCI) 14 then and enters display 13.
The operation principle explanation: DID is sent to Camera link conversion chip from ccd video camera, enter field programmable gate array (FPGA) through after the conversion of signals, in the programmable gate array (FPGA) DID is divided into two the tunnel at the scene, one tunnel process small computer system interface (SCSI) controller is finished to the write operation of small computer system interface (SCSI) disk array, this way digital image data is a raw digital image data, be kept in small computer system interface (SCSI) disk array, realize digital image non-loss recording; Another way digital image data is sent to internal memory through taking out row, take out pixel (selecting in two row to select a pixel in delegation, two pixels) processing back by peripheral computer interface (PCI), realizes showing in real time.
Good effect: as can be seen from Figure 2 raw digital image data does not pass through internal memory, directly enter small computer system interface (SCSI) controller by field programmable gate array (FPGA), enter small computer system interface (SCSI) disk array then, processing speed is by the processing speed decision of small computer system interface (SCSI) controller under this working method, be not subjected to peripheral computer interface (PCI) to continue the restriction of transmission speed, so storage speed improves than original mode, can reach 120MB/s, be about 2.5 times of prior art.Show that in real time work plays a good role to the monitoring digital image non-loss recording, because the DID of taking out row, taking out after the processes pixel is 1/4 of a raw digital image data resolution, its duration data transfer rate also reduces by 1/4, has only 30MB/s, even it is through twice pci interface, system's processing of also having the ability to finish.
The invention of large-capacity digital image non-loss recording and real-time displaying device is the indispensable equipment of photoelectric measurement technology, and has been applied in the practical project project that for high-speed figure image lossless record provides possibility with showing in real time working stability is reliable.
Four, description of drawings
Fig. 1 is the structural representation block diagram of prior art.
Fig. 2 is a structural representation block diagram of the present invention.
Five, embodiment
The present invention implements by structure shown in Figure 2, and wherein Camera link conversion chip 8 adopts DS90CF386MTD.
Field programmable gate array (FPGA) 9 adopts the XCV200E chip of Xinlix company.Its configuring chip adopts XCF04S.
Small computer system interface (SCSI) controller 10 adopts the FAS566 SCSI chip of Qlogic company.
Direct memory access (DMA) controller 11 is included in the FAS566SCSI chip of Qlogic company.
Small computer system interface (SCSI) redundant array of inexpensive disks 12 adopts four Seagate companies (ST373207LC) scsi disk.
Display 13 selects for use resolution can reach 1280 * 1024 display.
Peripheral computer interface (PCI) 14 adopts NVIDIA GeForce FX 5200.
Internal memory 15 adopts 512MB Kingston internal memory.
The control chip of peripheral computer interface (PCI) 16 adopts Power PC IOP480-AB66PI chip.
Claims (1)
1, a kind of large-capacity digital image non-loss recording and real-time displaying device comprise peripheral computer interface (PCI), internal memory, small computer system interface (SCSI) controller, small computer system interface (SCSI) disk array; It is characterized in that also comprising Camera link conversion chip (8), field programmable gate array (FPGA) (9), direct memory access (DMA) controller (11), display (13); The input of Camera link conversion chip (8) is connected with the output of ccd video camera, output is connected with the input of field programmable gate array (FPGA) (9), the output one tunnel of field programmable gate array (FPGA) (9) is connected with the input of small computer system interface (SCSI) controller (10), and another road is connected with the input of peripheral computer interface (PCI) (16); The output of peripheral computer interface (PCI) (16) is connected with the input of internal memory (15), the output of internal memory (15) is connected with the input of peripheral computer interface (PCI) (14), and the output of peripheral computer interface (PCI) (14) is connected with the input of display (13); The output of small computer system interface (SCSI) controller (10) is connected with direct memory access (DMA) controller (11) input, and the output of direct memory access (DMA) controller (11) is connected with the input of minicomputer interface (SCSI) disk array (12).
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102111600A (en) * | 2011-03-15 | 2011-06-29 | 武汉大学 | High speed image recorder for CameraLink cameras |
CN108073530A (en) * | 2016-11-10 | 2018-05-25 | 北京仿真中心 | The real-time driving method of target simulator and system mapped based on PCI-E buses and memory |
-
2005
- 2005-09-30 CN CN 200510107788 patent/CN1897674A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102111600A (en) * | 2011-03-15 | 2011-06-29 | 武汉大学 | High speed image recorder for CameraLink cameras |
CN108073530A (en) * | 2016-11-10 | 2018-05-25 | 北京仿真中心 | The real-time driving method of target simulator and system mapped based on PCI-E buses and memory |
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