CN1862800A - Electronic component plane button ultra-thin packed substrate and making method thereof - Google Patents
Electronic component plane button ultra-thin packed substrate and making method thereof Download PDFInfo
- Publication number
- CN1862800A CN1862800A CN 200610039919 CN200610039919A CN1862800A CN 1862800 A CN1862800 A CN 1862800A CN 200610039919 CN200610039919 CN 200610039919 CN 200610039919 A CN200610039919 A CN 200610039919A CN 1862800 A CN1862800 A CN 1862800A
- Authority
- CN
- China
- Prior art keywords
- pin
- dao
- substrate
- electronic component
- metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Landscapes
- Led Device Packages (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
This invention relates to semiconductor component plane salient point type ultrathin packaging basement and its making method. It includes basement (1) and pin (2), the pin (2) is dispersed as salient point style on the front face of the basement, and the point connects with each other by metal film (3). Pins low of the point of the basement is dispersed as flat style on the front face of the basement. The number of the basement (1) is one or more in the single semiconductor component packaging body form in subsequent packaging, the pins (2) is arranged at one side or two or three sides of the basement, or they enclose around the basement to form one circle or multi circles pins structure. On one hand, this invention provides more large space for the chip thickness, and on the other hand, the packaging body can be made thinner by using the thinnest packaging basement when the chip thickness is determined, so the quest of more thinner and convenient is reached.
Description
Technical field:
The present invention relates to a kind of electronic component plane button ultra-thin packed substrate and preparation method thereof.Belong to technical field of electronic components.
Background technology:
Before the present invention made, present existing flat-face saliant-point type packing base-board for electronic device mainly had the following disadvantages:
1, the Ji Dao of substrate and pin are in sustained height, equal on Ji Dao and the original thickness of pin basis again 100% thickness that has increased chip after on the Ji Dao chip being housed.This structure can cause two kinds of results: the gross thickness that the first, increases packaging body; If the second packaging body thickness is fixing, then must do further attenuate work to chip, this has proposed higher specification requirement to abrasive disc technology, otherwise this chip can't be presented in this packaging body, and then dwindled the scope of application of this packaging body.
2, Ji Dao and pin are column and are in sustained height on original planar salient point type base plate for packaging, because Ji Dao is thicker, so slowed down radiating rate.
Summary of the invention:
The objective of the invention is to overcome above-mentioned deficiency, provide that Ji Dao is lower than electronic component plane button ultra-thin packed substrate of pin height and preparation method thereof on a kind of substrate.
The object of the present invention is achieved like this: a kind of electronic component plane button ultra-thin packed substrate, comprise Ji Dao and pin, it is characterized in that pin is convex dot shape and is distributed in substrate front side, have thin metal layer to link between salient point and the salient point, Ji Dao is lower than the pin plane distribution of convex dot shape in substrate front side; In the single electronic devices and components packaging body that forms in follow-up when encapsulation, the quantity of Ji Dao has one or more, and pin arrangements is in the side of Ji Dao, or is arranged in both sides or three sides of Ji Dao, or be trapped among Ji Dao around form the structure of a circle or multi-turn pin.
Electronic component plane button ultra-thin packed substrate of the present invention, the front of described pin is provided with metal level.
Electronic component plane button ultra-thin packed substrate of the present invention, the two front of described pin and Ji Dao is or/and the back side is provided with metal level.Metal level on the Ji Dao is arranged on the part salient point or all salient points of unit Ji Dao.
Electronic component plane button ultra-thin packed substrate of the present invention, described pin just, the back side of the back of the body two sides and Ji Dao is provided with metal level.
Electronic component plane button ultra-thin packed substrate of the present invention, the front of described pin is provided with the activating substance layer, is provided with metal level on the activating substance layer.
Electronic component plane button ultra-thin packed substrate of the present invention, the two front of described pin and Ji Dao is provided with metal level or/and the back side is provided with activating substance on activating substance.
Electronic component plane button ultra-thin packed substrate of the present invention, described pin just, the back side of the back of the body two sides and Ji Dao is provided with the activating substance layer, is provided with metal level on the activating substance layer.
Manufacture method of the present invention comprises following steps:
Step 1, get a slice metal substrate,
Step 3, the part mask in metal substrate front is got rid of, is exposed the zone that preparation etches partially on metal substrate,
Remaining mask layer on step 5, the removal metal substrate is made plane button type ultra-thin packed substrate.
Manufacture method of the present invention can also comprise following steps:
Step 6, once more make metal substrate just, the surface of the back side and salient point all is covered with mask layer,
Step 7, remove the metal substrate front or/and the part mask layer at the back side, carry out the zone of metal cladding in order to expose follow-up need,
Step 8, the zone of removing mask layer in the last process is plated metal level,
Remaining mask layer on step 9, the removal metal substrate.
Manufacture method of the present invention plated the activating substance layer earlier before plating metal level.
Technology such as that the present invention has is ultra-thin, rapid heat dissipation a bit.Be specially:
1, Ji Dao is lower than the pin height on the substrate, so the bottom surface of chip can be lower than the pin end face after load on the Ji Dao: striven for bigger space for chip thickness on the one hand, make this encapsulation can break through original area requirement to chip thickness, the thicker chip of encapsulation has also reduced the pressure to chip thinning technology on original basis; On the other hand, under the certain prerequisite of chip thickness, it is thinner to use this ultra-thin packed substrate that packaging body is accomplished, meets frivolous, the portable requirement of packaging body more.
2, Ji Dao is lower than pin, compares with prior art, be equivalent to basis that original basic island floor space equates on reduced the height of Ji Dao, thereby reduced dead resistance, electric capacity and inductance, the electrical property of product is better, it is faster to dispel the heat.
Description of drawings:
Fig. 1-8 is each process sequence diagram of the present invention.
Embodiment:
Embodiment 1:
Embodiment 1 structure is shown in Fig. 8 (a), electronic component plane button ultra-thin packed substrate of the present invention, comprise basic island 1 and pin 2, pin 2 is convex dot shape and is distributed in substrate front side, have thin metal layer 3 to link between salient point and the salient point, basic island 1 is lower than pin 2 plane distribution of convex dot shape in substrate front side; In the single electronic devices and components packaging body that when follow-up encapsulation, forms, the quantity of Ji Dao can have one or more, pin can be arranged in the side of Ji Dao, also can be arranged in both sides or three sides of Ji Dao, or is trapped among the structure that forms a circle or multi-turn pin on every side of Ji Dao.
Its manufacture method comprises following steps:
Step 1, get a slice metal substrate 6, as Fig. 1,
Step 3, the part mask in metal substrate 6 fronts is got rid of, exposed the zone that preparation etches partially on metal substrate 6, as Fig. 3,
Remaining mask layer on step 5, the removal metal substrate 6 is made plane button type ultra-thin packed substrate, as Fig. 8 (a).Can do further modification processing to the plane button type ultra-thin packed substrate of making as required.
Embodiment 2:
Its manufacture method also comprises following steps on the basis of embodiment 1 method:
Step 6, once more make metal substrate 6 just, the surface of the back side and salient point all is covered with mask layer 7, as Fig. 5,
Step 7, remove the mask layer in pin 2 fronts, carry out the zone of metal cladding in order to expose follow-up need, as Fig. 6 (a),
Step 8, the zone of removing mask layer in the last process is plated metal level 4, as Fig. 7 (a),
Remaining mask layer on step 9, the removal metal substrate 6 is made plane button type ultra-thin packed substrate, as Fig. 8 (b).
Embodiment 3:
Embodiment 3 structures are shown in Fig. 8 (c), and it is on the basis of embodiment 1, and 1 the two front is provided with metal level 4 on pin 2 and basic island.
Its manufacture method also comprises following steps on the basis of embodiment 1 method:
Step 6, once more make metal substrate 6 just, the surface of the back side and salient point all is covered with mask layer 7, as Fig. 5,
Step 7, remove pin 2 and basic island 1 the two positive mask layer, carry out the zone of metal cladding in order to expose follow-up need, as Fig. 6 (b),
Step 8, the zone of removing mask layer in the last process is plated metal level 4,, step 9, remove mask layer remaining on the metal substrate 6, make plane button type ultra-thin packed substrate, as Fig. 8 (c) as Fig. 7 (b).
Embodiment 4:
Its manufacture method also comprises following steps on the basis of embodiment 1 method:
Step 6, once more make metal substrate 6 just, the surface of the back side and salient point all is covered with mask layer 7, as Fig. 5,
Step 7, remove the mask layer at the pin 2 and 1 the two back side, basic island, carry out the zone of metal cladding in order to expose follow-up need, as Fig. 6 (c),
Step 8, the zone of removing mask layer in the last process is plated metal level 4, as Fig. 7 (c),
Remaining mask layer on step 9, the removal metal substrate 6 is made plane button type ultra-thin packed substrate, as Fig. 8 (d).
Embodiment 5:
Its manufacture method also comprises following steps on the basis of embodiment 1 method:
Step 6, once more make metal substrate 6 just, the surface of the back side and salient point all is covered with mask layer 7, as Fig. 5,
Step 7, remove pin 2 just, the backside mask layer on back of the body two sides and basic island 1, carry out the zone of metal cladding in order to expose follow-up need, as Fig. 6 (d),
Step 8, the zone of removing mask layer in the last process is plated metal level 4, as Fig. 7 (d),
Remaining mask layer on step 9, the removal metal substrate 6 is made plane button type ultra-thin packed substrate, as Fig. 8 (e).
Embodiment 6:
Embodiment 6 structures are shown in Fig. 8 (f), and it is on the basis of embodiment 1, and 1 the two front and back is provided with metal level 4 on pin 2 and basic island.
Its manufacture method also comprises following steps on the basis of embodiment 1 method:
Step 6, once more make metal substrate 6 just, the surface of the back side and salient point all is covered with mask layer 7, as Fig. 5,
Step 7, remove the two front and back mask layer of pin 2 and basic island 1, carry out the zone of metal cladding in order to expose follow-up need, as Fig. 6 (e),
Step 8, the zone of removing mask layer in the last process is plated metal level 4, as Fig. 7 (e),
Remaining mask layer on step 9, the removal metal substrate 6 is made plane button type ultra-thin packed substrate, as Fig. 8 (f).
Embodiment 7:
Embodiment 7 structures are shown in Fig. 8 (g), and it is on the basis of embodiment 2, is provided with activating substance layer 5 in the front of pin 2, is provided with metal level 4 on activating substance layer 5.
Its manufacture method before the zone of removal mask layer plates metal level 4 in to last process, plates activating substance layer 5 earlier, as Fig. 7 (f), Fig. 7 (k) in the step 8 of embodiment 2 methods.
Embodiment 8:
Embodiment 8 structures are shown in Fig. 8 (h), and it is on the basis of embodiment 3, and 1 the two front is provided with activating substance layer 5 on pin 2 and basic island, is provided with metal level 4 on activating substance layer 5.
Its manufacture method before the zone of removal mask layer plates metal level 4 in to last process, plates activating substance layer 5 earlier, as Fig. 7 (g), Fig. 7 (1) in the step 8 of embodiment 3 methods.
Embodiment 9:
Embodiment 9 structures are shown in Fig. 8 (i), and it is on the basis of embodiment 4, and 1 the two the back side is provided with activating substance layer 5 on pin 2 and basic island, is provided with metal level 4 on activating substance layer 5.
Its manufacture method before the zone of removal mask layer plates metal level 4 in to last process, plates activating substance layer 5 earlier, as Fig. 7 (h), Fig. 7 (m) in the step 8 of embodiment 4 methods.
Embodiment 10:
Embodiment 10 structures are shown in Fig. 8 (j), and it is on the basis of embodiment 5, pin 2 just, the back side on the back of the body two sides and basic island 1 is provided with activating substance layer 5, is provided with metal level 4 on activating substance layer 5.
Its manufacture method before the zone of removal mask layer plates metal level 4 in to last process, plates activating substance layer 5 earlier, as Fig. 7 (i), Fig. 7 (n) in the step 8 of embodiment 5 methods.
Embodiment 11:
Embodiment 11 structures are shown in Fig. 8 (k), and it is on the basis of embodiment 6, in that 1 the two front and back is provided with activating substance layer 5 on pin 2 and basic island, are provided with metal level 4 on activating substance layer 5.
Its manufacture method before the zone of removal mask layer plates metal level 4 in to last process, plates activating substance layer 5 earlier, as Fig. 7 (j), Fig. 7 (o) in the step 8 of embodiment 6 methods.
The above-mentioned metal level 4 that covers on the basic island 1 can be part and covers or all cover.Metal level 4 is gold or silver or copper or tin or nickel or nickel palladium, and metal level can be single or multiple lift, or regional area distributes.
Above-mentioned activating substance layer 3 is nickel or palladium or nickel palladium layer.
Claims (10)
1, a kind of electronic component plane button ultra-thin packed substrate, comprise Ji Dao (1) and pin (2), it is characterized in that pin (2) is convex dot shape and is distributed in substrate front side, have thin metal layer (3) to link between salient point and the salient point, Ji Dao (1) is lower than the pin plane distribution of convex dot shape in substrate front side; In the single electronic devices and components packaging body that forms when follow-up encapsulation, the quantity of Ji Dao (1) has one or more, and pin (2) is arranged in one or both sides or three sides of Ji Dao, or is trapped among the structure that forms a circle or multi-turn pin on every side of Ji Dao (1).
2, a kind of electronic component plane button ultra-thin packed substrate according to claim 1 is characterized in that the front of pin (2) is provided with metal level (4).
3, a kind of electronic component plane button ultra-thin packed substrate according to claim 1, it is characterized in that the two front of pin (2) and Ji Dao (1) or/and the back side is provided with metal level (4), the metal level (4) on the Ji Dao (1) is arranged on the part salient point or all salient points of unit Ji Dao.
4, a kind of electronic component plane button ultra-thin packed substrate according to claim 1, it is characterized in that pin (2) just, the back side of the back of the body two sides and Ji Dao (1) is provided with metal level (4).
5, a kind of electronic component plane button ultra-thin packed substrate according to claim 2 is characterized in that the front of pin (2) is provided with activating substance layer (5), is provided with metal level (4) on activating substance layer (5).
6, a kind of electronic component plane button ultra-thin packed substrate according to claim 3 is characterized in that the two front of pin (2) and Ji Dao (1) or/and the back side is provided with activating substance layer (5), is provided with metal level (4) on activating substance layer (5).
7, a kind of electronic component plane button ultra-thin packed substrate according to claim 4, it is characterized in that pin (2) just, the back side of the back of the body two sides and Ji Dao (1) is provided with activating substance layer (5), is provided with metal level (4) on activating substance layer (5).
8, a kind of manufacture method of electronic component plane button ultra-thin packed substrate is characterized in that this manufacture method comprises following steps:
Step 1, get a slice metal substrate,
Step 2, metal substrate just, the back of the body two sides be covered with mask layer separately,
Step 3, the part mask in metal substrate front is got rid of, is exposed the zone that preparation etches partially on metal substrate,
Step 4, the zone of removing mask layer in the last process is etched partially, on metal substrate, forms the Ji Dao and the partially etching area of depression, form the pin of convex dot shape simultaneously relatively,
Remaining mask layer on step 5, the removal metal substrate is made plane button type ultra-thin packed substrate.
9, a kind of electronic component plane button ultra-thin packed substrate according to claim 8 is characterized in that this manufacture method also comprises following steps:
Step 6, once more make metal substrate just, the surface of the back side and salient point all is covered with mask layer,
Step 7, remove the metal substrate front or/and the part mask layer at the back side, carry out the zone of metal cladding in order to expose follow-up need,
Step 8, the zone of removing mask layer in the last process is plated metal level,
Remaining mask layer on step 9, the removal metal substrate.
10, the manufacture method of a kind of electronic component plane button ultra-thin packed substrate according to claim 9 is characterized in that before plating metal level, plated the activating substance layer earlier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100399197A CN100392852C (en) | 2006-04-12 | 2006-04-12 | Electronic component plane button ultra-thin packed substrate and making method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100399197A CN100392852C (en) | 2006-04-12 | 2006-04-12 | Electronic component plane button ultra-thin packed substrate and making method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1862800A true CN1862800A (en) | 2006-11-15 |
| CN100392852C CN100392852C (en) | 2008-06-04 |
Family
ID=37390178
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2006100399197A Active CN100392852C (en) | 2006-04-12 | 2006-04-12 | Electronic component plane button ultra-thin packed substrate and making method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100392852C (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100392851C (en) * | 2006-04-12 | 2008-06-04 | 江苏长电科技股份有限公司 | Semiconductor component plane button type ultra-thin packed substrate and making method thereof |
| CN103646929A (en) * | 2013-12-05 | 2014-03-19 | 江苏长电科技股份有限公司 | Primary plating-prior-to-etching metal frame subtraction imbedded chip normal-installation flat pin structure and process method |
| CN103646936A (en) * | 2013-12-05 | 2014-03-19 | 江苏长电科技股份有限公司 | Secondary plating-prior-to-etching metal frame subtraction imbedded chip flip flat pin structure and process method |
| CN103646935A (en) * | 2013-12-05 | 2014-03-19 | 江苏长电科技股份有限公司 | Secondary plating-prior-to-etching metal frame subtraction imbedded chip flip bump structure and process method |
| CN103646939A (en) * | 2013-12-05 | 2014-03-19 | 江苏长电科技股份有限公司 | Secondary plating-prior-to-etching metal frame subtraction imbedded chip normal-installation bump structure and process method |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4257061A (en) * | 1977-10-17 | 1981-03-17 | John Fluke Mfg. Co., Inc. | Thermally isolated monolithic semiconductor die |
| CN1059982C (en) * | 1997-08-28 | 2000-12-27 | 华通电脑股份有限公司 | Method for automatically welding package of ball array integrated circuit by coil belt |
| CN1146976C (en) * | 1997-10-30 | 2004-04-21 | 株式会社日产制作所 | Semiconductor device and method for manufacturing the same |
| CN1172367C (en) * | 2000-11-02 | 2004-10-20 | 讯利电业股份有限公司 | Combined part of metal base |
| DE10059176C2 (en) * | 2000-11-29 | 2002-10-24 | Siemens Ag | Intermediate carrier for a semiconductor module, semiconductor module produced using such an intermediate carrier, and method for producing such a semiconductor module |
| TW544882B (en) * | 2001-12-31 | 2003-08-01 | Megic Corp | Chip package structure and process thereof |
| CN100392851C (en) * | 2006-04-12 | 2008-06-04 | 江苏长电科技股份有限公司 | Semiconductor component plane button type ultra-thin packed substrate and making method thereof |
-
2006
- 2006-04-12 CN CNB2006100399197A patent/CN100392852C/en active Active
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100392851C (en) * | 2006-04-12 | 2008-06-04 | 江苏长电科技股份有限公司 | Semiconductor component plane button type ultra-thin packed substrate and making method thereof |
| CN103646929A (en) * | 2013-12-05 | 2014-03-19 | 江苏长电科技股份有限公司 | Primary plating-prior-to-etching metal frame subtraction imbedded chip normal-installation flat pin structure and process method |
| CN103646936A (en) * | 2013-12-05 | 2014-03-19 | 江苏长电科技股份有限公司 | Secondary plating-prior-to-etching metal frame subtraction imbedded chip flip flat pin structure and process method |
| CN103646935A (en) * | 2013-12-05 | 2014-03-19 | 江苏长电科技股份有限公司 | Secondary plating-prior-to-etching metal frame subtraction imbedded chip flip bump structure and process method |
| CN103646939A (en) * | 2013-12-05 | 2014-03-19 | 江苏长电科技股份有限公司 | Secondary plating-prior-to-etching metal frame subtraction imbedded chip normal-installation bump structure and process method |
| CN103646939B (en) * | 2013-12-05 | 2016-02-24 | 江苏长电科技股份有限公司 | Secondary first plates rear erosion metal frame subtraction and buries chip formal dress bump structure and process |
| CN103646935B (en) * | 2013-12-05 | 2016-06-01 | 江苏长电科技股份有限公司 | First plate for two times and lose metal frame subtraction afterwards and bury flip-chip bump structure and processing method |
| CN103646936B (en) * | 2013-12-05 | 2016-06-01 | 江苏长电科技股份有限公司 | First plate for two times and lose metal frame subtraction afterwards and bury the flat leg structure of flip-chip and processing method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100392852C (en) | 2008-06-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN1189951C (en) | Edge-emitting light-emitting semiconductor device and method of manufacturing thereof | |
| CN1929130A (en) | Multi-chip stacking package structure | |
| CN1862800A (en) | Electronic component plane button ultra-thin packed substrate and making method thereof | |
| CN1819160A (en) | A substrate having a built-in chip and external connection terminals on both sides and a method for manufacturing the same | |
| CN1806346A (en) | Process for producing light-emitting diode element emitting white light | |
| CN1913149A (en) | Method of manufacturing a semiconductor device comprising stacked chips and a corresponding semiconductor device | |
| CN1777988A (en) | Taped lead frames and methods of making and using the same in semiconductor packaging | |
| CN1649118A (en) | Semiconductor device having conducting portion of upper and lower conductive layers, and method of fabricating the same | |
| CN1160934A (en) | Semiconductor device and manufacturing method thereof | |
| CN1855477A (en) | Circuit device | |
| CN1287434C (en) | Method for producing semiconductor device | |
| CN1652314A (en) | Lead frame, semiconductor chip package using the lead frame, and method of manufacturing the semiconductor chip package | |
| CN1520250A (en) | Method for mutually connecting multolayer printed circuit board | |
| CN101038525A (en) | Method for manufacturing electric resistance touch-control panel | |
| CN1309071C (en) | Lead frame and method for manufacturing said lead frame | |
| CN1681137A (en) | Light emitting nitride semiconductor device and method of fabricating the same | |
| CN1231971C (en) | Surface installation type chip semiconductor device and making method thereof | |
| EP1821347A3 (en) | Light emitting device having vertical structure and method for manufacturing the same | |
| CN1301043C (en) | Circuit device and its mfg. method | |
| CN1783115A (en) | RFID tag and method of manufacturing the same | |
| CN1862799A (en) | Semiconductor component plane button type ultra-thin packed substrate and making method thereof | |
| CN1851915A (en) | Flat-face saliant-point type packing base-board for integrated circuit or discrete device | |
| CN1192420C (en) | Semiconductor device and its mfg. method, circuit board and electronic device | |
| CN1968566A (en) | Multiple flexible wiring board, method for producing same, method for producing flexible wiring board, and flexible wiring board | |
| CN1183588C (en) | Ball pin array package substrate and making method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: CHANGJIANG ELECTRONICS TECHNOLOGY (CHUZHOU) CO., L Free format text: FORMER OWNER: JIANGSU CHANGJIANG ELECTRONICS TECHNOLOGY CO., LTD. Effective date: 20140219 |
|
| COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: 214431 WUXI, JIANGSU PROVINCE TO: 239000 CHUZHOU, ANHUI PROVINCE |
|
| TR01 | Transfer of patent right |
Effective date of registration: 20140219 Address after: 239000 Century Avenue, Anhui, Chuzhou, No. 999 Patentee after: Changjiang Electronics Technology (Chuzhou) Co., Ltd. Address before: 214431 Binjiang Middle Road, Jiangsu, China, No. 275, No. Patentee before: Jiangsu Changjiang Electronics Technology Co., Ltd. |
|
| TR01 | Transfer of patent right |