CN1183588C - Ball pin array package substrate and making method - Google Patents
Ball pin array package substrate and making method Download PDFInfo
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- CN1183588C CN1183588C CN 02101667 CN02101667A CN1183588C CN 1183588 C CN1183588 C CN 1183588C CN 02101667 CN02101667 CN 02101667 CN 02101667 A CN02101667 A CN 02101667A CN 1183588 C CN1183588 C CN 1183588C
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- heat dissipating
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- dissipating layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
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Abstract
The present invention relates to a ball pin array encapsulated basal plate and a manufacturing method thereof. The present invention is characterized in that one surface of the basal plate is provided with a single figure layer used for making a soldering tin ball connected to a conducting wire figure; a radiating layer is combined with the other surface of the basal plate, and the radiating layer provides a grounding figure and/or a power supply figure of a BGA basal plate so as to disperse area required by the grounding figure and/or the power supply figure of the figure layer of the basal plate; a grounding soldering tin ball and/or a power soldering tin ball of the basal plate are mutually connected with the radiating layer by using conductive glue which fully fills through holes. Except for a radiating layer, the radiating layer can be also used as the grounding figure and the power figure; therefore, the radiating layer can disperse the area required by the grounding figure and/or the power supply figure of the figure layer of the basal plate, increase the elasticity of topological design and enhance radiating performance.
Description
Technical field
The present invention discloses a kind of encapsulation technology relevant for BGA (ball grid array), be meant the have heat dissipating layer encapsulation technology of BGA substrate of (heat sink layer) especially, this heat dissipating layer can utilize the conduction perforation to be connected with ground connection solder ball (Solder ball for ground) or power supply solder ball (solderball for power), perhaps can comprise power supply pattern and grounding pattern, and utilize the conduction perforation to be connected with ground connection solder ball (Solder ballfor ground) respectively with power supply solder ball (Solder ball for Power).
Background technology
Along with the progress of integrated circuit manufacture process, dwindle by chip (die) overall dimensions, reduce unit cost, become trend, the semiconductor dealer more expects the performance of some aspect, for example execution speed, can therefore obtain significantly to improve, and one chip can inject more function.Yet chip size dwindles, though increase chip functions, under the situation that not anti-reflection of assembly increases, causes connecting more crypto set of lead, and therefore, the increase of parasitic capacitance of deriving and interconnect resistance all makes chip performance descend.
For addressing the above problem, semiconductor manufacturing industry reduces the lead resistance except the copper conductor that utilizes low resistance replaces traditional aluminum conductor, more seeks the problem that dielectric layer with low dielectric constant solves parasitic capacitance.Another has what Cost And Performance was had direct critical impact is encapsulation technology.Because can expect increasing when injecting new function when chip assembly, certainly will roll up the problem that output/input terminal is connected with system, the power consumption and the heat dissipation problem of chip also so more highlight simultaneously.For overcoming the problems referred to above, even if the flip-over type chip encapsulation technology of a new generation and the BGA encapsulation technology of ball grid array also need to be discussed.
Fig. 1-8 is the known bga substrate processing procedure that comprises heat dissipating layer.Step is as follows: at first please refer to Fig. 1, and a substrate 5 pressings one Copper Foil 8, and form TAB through hole 10 (sprocket hole), in the border of substrate 5, TAB through hole 10 helps the transmission of substrate 5 on conveyer belt.Substrate 5 can be one of insulating properties materials such as BT (bismaleimide-triazine) or glass fibre, stiffener rings epoxy resins, poly-vinegar ammonia.For T-BGA, all have only the layer of metal pattern on the typical substrate, Copper Foil 8 is the connection patterns in order to definition wire pattern and tin ball.
Subsequently as shown in Figure 2, TAB through hole 10 surperficial first unhairing limits (desmear), chemical polishing etc.Then, form the photoresistance (not shown) on Copper Foil 8, and impose lithographic process with define pattern.After developing, form the connection pattern 20 of electric lead pattern and/or solder ball as etch mask with the etching Copper Foil with the photoresistance pattern again, divest photoresistance at last again.
Subsequently, as shown in Figure 3, cover a back-adhesive film 25 again, adhere in order to prevent solder resist (solder mask) in substrate 5 back sides.Form the tool insulating properties subsequently again and prevent to adhere to the solder resist 30 of scolding tin on Copper Foil 8.Through lithographic process and development step the solder resist on the connection pattern 20 of Copper Foil 8 solder ball is removed again.
See also Fig. 4, then, carry out electroplating process, on Copper Foil 8, form nickel rete and golden membranous layer 35 in regular turn.And then remove back-adhesive film 25 again.
See also Fig. 5,, subsequently, paste an adhesion coating 42 again, again with the excision of substrate core region material, with the depressed area 40 that forms ccontaining chip in substrate 5 back sides with the substrate scribing.Also can form bus through hole and assembly through hole in case of necessity, last, again solder ball is formed on the golden membranous layer 35 with stencil printing.Its result as shown in Figure 6.
Conventional process needs again fin a slice to be connect a slice and pastes up for forming heat dissipating layer.Therefore, not only consuming time, and effect is limited.Because fin 55 is distant right across the power supply electric lead of one deck insulated substrate and positive patterned layer or grounding conductance line, do not connect each other.
Shown in Fig. 6,7, be the method for 3M company, 3M company utilizes the mode of clamp-oning conducting resinl to make the positive and heat dissipating layer conducting of substrate pattern after TAB through hole 10 forms again in the TAB through hole 10.But, above-mentioned connection does not also fully make the radiating effect performance of patterned layer, after all, connects the electric lead of voltage or the electric lead of ground connection and is not connected to heat dissipating layer.
Therefore, the BGA substrate heat dissipating layer poor effect of known techniques made is not further utilized.The present invention will provide new BGA substrate framework, improve the problems referred to above, and corresponding method of manufacture is provided.
Summary of the invention
The objective of the invention is to provide a kind of ball grid array package substrate and manufacture method thereof.
Another object of the present invention, be use grounding pattern that through hole makes BGA substrate pattern layer and heat dissipating layer with/or the power supply pattern be connected.Because the conducting of heat dissipating layer makes the grounding pattern of BGA substrate pattern and power supply pattern be scattered in heat dissipating layer, and then increase the harness wiring area or reduce the BGA substrate area.
Technical scheme of the present invention is: a kind of ball grid array package substrate, one side at the BGA substrate has the single pattern layer that connects solder ball, and heat dissipating layer is incorporated into the another side of this substrate, it is characterized in that: this heat dissipating layer is except that providing the heat radiation of BGA substrate, the ground connection and/or the power supply pattern of this BGA substrate also are provided simultaneously, in order to ground connection and/or the required area of power supply pattern that disperses this BGA substrate pattern layer, wherein the ground connection of this BGA substrate and/or power supply tin ball are to utilize the through hole that fills up conducting resinl to be connected with this heat dissipating layer.Wherein:
Described conducting resinl comprise at least elargol, copper glue one of them.
Described not mucous membrane is not have a film of compatibility with conducting resinl.
It is one kind of that described not mucous membrane comprises polyethylene film, polypropylene screen, polyester film or acrylic resin at least.
A kind of manufacture method of ball grid array package substrate comprises following steps at least:
One BGA substrate is provided, and this substrate upper and lower faces respectively has not mucous membrane of one deck;
Form several through holes and a depressed area in this substrate, this through hole is formed at the predetermined ground connection solder ball position of this substrate, and the depressed area is used for putting a chip;
Fill with conducting resinl in the through hole of this substrate;
Remove not mucous membrane;
Form a heat dissipating layer and a Copper Foil respectively at this substrate upper and lower faces;
On this Copper Foil, form pattern and the wire pattern that this BGA substrate solder ball connects;
Painting black printing ink on this heat dissipating layer;
In this depressed area, form a black ink;
On pattern that comprises this BGA substrate solder ball connection and wire pattern, be coated with solder resist;
Impose lithographic process, in order to the copper foil pattern of exposed this BGA substrate solder ball connection;
Impose electroplating process, in order to plated nickel film on this copper foil pattern and golden film;
On this gold film, form solder ball;
This chip is placed on the black ink, and the contact mat on this chip is connected with wire pattern with the pattern that this BGA substrate solder ball is connected with lead.Wherein:
Described one of them the conducting resinl of elargol, copper glue that comprises at least is with scraper or roll printing is one kind of flows in the through hole.
Described heat dissipating layer is before painting black printing ink, plates nickel dam at heat dissipating layer earlier.
A kind of manufacture method of ball grid array package substrate comprises following steps at least:
One substrate is provided, and the one side of this substrate includes one deck Copper Foil, and upper and lower faces respectively has not mucous membrane of one deck;
Form several through holes and a depressed area in this substrate, this through hole is formed at this substrate predetermined ground connection solder ball and power supply solder ball position, and this depressed area is used for putting a chip;
Form conducting resinl in the through hole of this substrate;
Remove not mucous membrane;
The another side that does not contain Copper Foil at this substrate forms a heat dissipating layer;
Form a black ink in this depressed area;
To this copper foil patternization, with the pattern that forms signal pattern and connect power supply tin ball and ground connection tin ball in wherein;
To this heat dissipating layer patterning, to form grounding pattern and power supply pattern in wherein;
On this heat dissipating layer, form black ink;
Comprise at this substrate on the one side of signal pattern and form solder resist;
Impose lithographic process, with the copper foil pattern of exposed part, the copper foil pattern of this part is in order to connect power supply tin ball and ground connection tin ball;
Impose electroplating process, in order to plated nickel film and golden film in regular turn on this exposed copper foil pattern;
On this gold film, form the tin ball, make the ground connection tin ball of this substrate and power supply tin ball be connected to the grounding pattern and the power supply pattern of this heat dissipating layer respectively by the conducting resinl of this substrate through hole;
This chip is placed on the black ink, and the contact mat on this chip is connected with wire pattern with the pattern that this BGA substrate solder ball is connected with lead.Wherein:
Described to this copper foil patternization and this heat dissipating layer patterning, utilize photoetching and etch process to carry out.
Described one of them the conducting resinl of elargol, copper glue that comprises at least is to inject this through hole with scraper or roll printing a kind of conducting resinl wherein.
Beneficial effect of the present invention:
With ground connection on the substrate/or the conduction tin ball that connects power supply utilize several through holes to be connected with electric lead with fin, therefore, help the heat radiation of substrate.
2. the through hole of above-mentioned connection substrate positive and negative is to utilize the mode of clamp-oning conducting resinl, adopts plating mode convenient and cheap than general through hole.Wherein, use not mucous layer for to prevent that the part that does not need to connect is stained with conducting resinl.Therefore must not worry that the Copper Foil front is stained with conducting resinl.
3. because the present invention is in the hot pressing mode with needed pattern and heat dissipating layer on the substrate (comprising its pattern) by once.Do not need the substrate that adheres to the fin slices.So can save manpower and material.
4. heat dissipating layer of the present invention is not only heat dissipating layer, can be used as grounding pattern and power supply pattern simultaneously, therefore, can disperse needed ground connection of BGA substrate pattern layer and the required area of power supply pattern.Can increase the elasticity of layout designs.
Description of drawings
Fig. 1-6, be the manufacture craft flow chart of traditional B GA substrate, be not connected between heat dissipating layer and the BGA patterned layer.
Fig. 7,8 is the manufacture craft flow chart of the BGA substrate of another kind of known techniques made, and the BGA patterned layer of substrate only connects heat dissipating layer by the TAB through hole.
Fig. 9-20 is the manufacture craft flow chart of the method for first embodiment of the invention, and in its BGA patterned layer, heat dissipating layer is connected the ground connection solder ball of BGA patterned layer by several conduction through holes.
Figure 21, the Organization Chart of the BGA substrate of making for the method for first and second embodiment of the present invention.
Figure 22-25 makes the process chart of BGA substrate for the method for second embodiment of the invention, only shows and the different part of the first embodiment technological process among the figure.
Figure 26-35 makes the process chart of BGA substrate for the method for third embodiment of the invention, and in the BGA patterned layer, ground connection solder ball and power supply solder ball are connected to the grounding pattern and the power supply pattern of heat dissipating layer respectively by through hole.
Figure 36, the Organization Chart of the BGA substrate of making for the method for third embodiment of the invention.
Embodiment
Because the background of invention technology is described, be pasted on the heat dissipating layer of substrate in the known techniques, be relative with patterned layer across substrate, therefore, accessible radiating effect must be limited.Even traditional B GA substrate has connection, for example, the patent of 3M company, a plate base has also only utilized about 8 through holes (sprocket hole) that kept on the conveyer belt, and increasable radiating effect is limited.In view of this,
The invention provides the ball grid array package substrate and the manufacture method thereof of improvement, can address the above problem.
Referring to Fig. 9-20, the technological process of the method for first embodiment of the invention making BGA substrate is as follows:
At first, referring to Fig. 9, respectively paste earlier not mucous membrane (releasefilm) 210a of one deck, 210b on the two sides of substrate 205.Mucous membrane is not selected for use with conducting resinl and is not had the film of compatibility, for example polyethylene film (polyethylenefilm), a polypropylene screen polyacryline film), polyester film (PET) or acrylic (acrylic) resin, wherein any all can.Subsequently, with the CO2 laser drill, to form through hole 215, cutting substrate so that among substrate 205, form depressed area 220.Predetermined ground connection solder ball (solder ball for ground) position is located in the position that please notes through hole 215.Then, as shown in figure 10, conducting resinl 225 is clamp-oned in the through hole 215 with roll printing mode or scraper.Owing to have not mucous membrane 210a, 210b on the substrate 205, therefore have only through hole 215 to adhere to conducting resinl 225, and after the formation rivet-like as shown in figure 10, remove the conducting resinl 225 that is higher than substrate 205 surfaces with scraper plate.And then, remove not mucous membrane 210a again, keep not mucous membrane 210b, the result as shown in figure 11.See also Figure 12,13, utilize hot pressing legal, on substrate 205, form a thicker Copper Foil, as heat dissipating layer 230.Then 220 surfaces form a black ink 235 in the depressed area, and black ink 235 has increases the fixed function that chip is fixed in the depressed area.
See also Figure 14, then, remove not mucous layer 210b.Second Copper Foil 206 is pressed on the not one side of radiation layer containing of substrate 205, as the conductive pattern layer of BGA substrate.Subsequently as shown in figure 15, form minus photoresistance 245, and with mask 250a and 250b as photoetching cover curtain, impose exposure manufacture process again with define pattern.Again through developing manufacture process formation photoresistance pattern 245c, 245a, 245b as shown in figure 16.Please note that so photoresistance pattern 245c will can not be developed removal behind the photoresistance irradiation owing to be the mask 250a of printing opacity on the heat dissipating layer 230.And on second Copper Foil 206 except the photoresistance pattern 245a that solder ball connects, and the photoresistance pattern 245b that electric lead (conductive trace) arranged is as etch mask.
Seeing also Figure 17, serves as cover curtain with photoresistance pattern 245c, 245a, 245b again, with acid solution or electric paste etching second Copper Foil 206 to form patterned layer 206a. Remove photoresistance pattern 245c, 245a, 245b at last again.
And then, as shown in figure 18, coat on the heat dissipating layer 230 as insulating barrier with black ink 252.Please noted painting black printing ink before heat dissipating layer, optionally earlier plate nickel dam at heat dissipating layer 230.Then be coated with solder resist 255 (solder mask) again on patterned layer 206a.
See also Figure 19, expose and developing manufacture process with mask pattern 260 again, the Copper Foil place that exposed tin ball will connect.At last with electroplating process nickel plating in regular turn and golden film 270 on exposed Copper Foil, its result is as shown in figure 20.At last the tin ball is inoculated on the gold-plated rete 270 with stencil printing.Chip 275 is placed in depressed area 220, and the contact mat on the chip 275 is connected on the patterned layer 206a with lead pin 280.At last, with resin 285 chip 275 and lead are coated again, obtain structure as shown in figure 21.
In the above-mentioned processing procedure program, part steps is can change sequencing and do not influence last result.
See also Figure 22, invent the method for second embodiment, conducting resinl 225 is being injected through hole 215, and remove the conducting resinl that is higher than substrate 205 surfaces and remove not mucous membrane 210a with scraper plate, behind the 210b (referring to Figure 10), be about to the two sides that Copper Foil 206 and heat dissipating layer 230 are pressed on substrate 205 simultaneously.
Then, as shown in figure 23, utilize photoetching technique, form photoresistance pattern 245a, 245b and 245c.
Subsequently, as shown in figure 24, carrying out etching again, serves as that the cover curtain forms patterned layer 206a with photoresistance pattern 245a, 245b and 245c, in order to form patterned layer and the wire pattern layer that connects solder ball.
Then, as shown in figure 25, painting black printing ink 252 on heat dissipating layer 230 as insulating barrier.Again a cuticula 232 is pasted on the patterned layer 206a.Subsequently, form black ink 235 again among depressed area 220.
Subsequently, cuticula 232 is torn off.As method coating solder resist 255 as described in first embodiment and carry out lithographic process, with the exposed Copper Foil that connects scolding tin, nickel plating and golden film again, and carry out the connection of solder ball.Its result as shown in figure 21.
Since the heat dissipating layer of substrate can be connected by the conduction through hole with patterned layer, the some power supply patterns and the grounding pattern of patterned layer then can be dispensed on the heat dissipating layer of substrate on the BGA substrate.Therefore, the method for third embodiment of the invention, details are as follows:
At first, see also Figure 26, respectively paste earlier not mucous layer (release film) 210a, 210b of one deck on the two sides of the substrate 205 that comprises one deck Copper Foil 206 (substrate front side).Mucous membrane is not to select for use with conducting resinl not have a film of compatibility.For example: polyethylene film (polyethylene film), polypropylene screen (polyacryline film), polyester film (PET) or acrylic (acrylic) resin is one kind of all can.Subsequently, with CO
2Laser drill to form through hole 215, reaches cutting substrate so that form depressed area 220 among substrate 205, as shown in figure 27.The position that please notes through hole 215 is to be located at predetermined ball pin ground connection (ball-grid for ground) position and predetermined ball pin power supply (ball-grid for power) position.Then, as shown in figure 28, conducting resinl 225 is clamp-oned in the through hole 215 with roll printing mode or scraper.Because substrate 205 upper and lower faces contain not mucous layer 210a, 210b respectively, therefore have only through hole 215 to adhere to conducting resinl 225, and form rivet-like as shown in figure 28.
Subsequently, remove the conducting resinl that is higher than substrate 205 surfaces with scraper plate.And then, remove not mucous layer 210b again, 210a, the result is as shown in figure 29.
See also Figure 30, utilize hot pressing legal, on substrate, form another thicker Copper Foil as heat dissipating layer 230.Then, on the Copper Foil 206 of substrate 205 and heat dissipating layer 230, respectively paste a cuticula 232.Subsequently, black ink 235 is coated 220 surfaces, depressed area, black ink 235 has the chip of adhesion and makes it be fixed in the function of depressed area 220 again.
See also Figure 31, then, after removing cuticula 232, coating minus photoresistance 245 on heat dissipating layer 230 and Copper Foil 206 respectively again, again with mask 250a and 250b as photoetching cover curtain, impose exposure manufacture process again with define pattern.The pattern that note that mask 250a comprises power supply pattern/grounding pattern.And the pattern of mask 250b comprises signal pattern and power supply/grounding pattern.
Shown in figure 32, photoresistance pattern 245a, the 245b that forms through developing manufacture process.Photoresistance pattern 245a on heat dissipating layer 230 is power supply pattern and grounding pattern.The conductive pattern that photoresistance pattern 245b on the Copper Foil 206 then connects for signal, and the power supply pattern and the grounding pattern that connect solder ball.Serve as cover curtain with photoresistance pattern 245a, 245b subsequently, impose etch process and form patterned layer 230a and 206a.In other words, utilize method of the present invention, power supply pattern required in the BGA patterned layer and grounding pattern can be moved to heat dissipating layer 230, bear by heat dissipating layer 230.And 206 of Copper Foils arrange the pattern of signal pattern and connection solder ball necessity to get final product.Therefore, because signal conductor at substrate simultaneously, and conductive patterns such as ground connection and power supply not only can dwindle the required area of whole BGA, and can reduce noise at the substrate another side.
As shown in figure 33, the residual photoresistor pattern is divested, painting black printing ink 252 is gone up as insulating barrier in radiating pattern layer 230a more subsequently.Please noted painting black printing ink before this heat dissipating layer, can optionally plate nickel dam earlier at heat dissipating layer 230a.And then, be coated with solder resist 255 (solder mask) again on patterned layer 206a.
Seeing also Figure 34, serves as the cover curtain with mask pattern 260a, 260b, exposes and developing manufacture process, to expose the Copper Foil place that the tin ball will connect.Exposed Copper Foil 206a is in order to be connected with power supply and ground connection solder ball.Serve as cover curtain with solder resist and black ink again, impose electroplating process, plated with nickel and golden membranous layer 270 in regular turn, its result is as shown in figure 35.
See also Figure 36, the tin ball is formed on the gold-plated rete with stencil printing.Chip 275 is placed in depressed area 220, and the contact mat on the chip is connected on the patterned layer 206a with lead 280.At last, with resin 285 chip 275 and lead are coated again.Obtain structure as shown in figure 36.
In sum, this BGA substrate has the single pattern layer, is connected in wire pattern in order to solder ball.One heat dissipating layer is incorporated into the another side of substrate, and heat dissipating layer also is a ground plane simultaneously, and in order to disperse the required area of ground connection conductive pattern of this BGA substrate, wherein the ground connection solder ball of this BGA substrate is to utilize the through hole that fills up conducting resinl to connect heat dissipating layer.Perhaps, heat dissipating layer also can be the power supply patterned layer, in order to disperse the required area of power supply pattern of this BGA substrate.
Moreover, heat dissipating layer also can provide the ground connection and the power supply pattern of BGA substrate simultaneously, in order to ground connection and the required area of power supply pattern that disperses this BGA substrate pattern layer, wherein the ground connection solder ball of this BGA substrate is to utilize the through hole that fills up conducting resinl to be connected the ground connection and the power supply pattern of heat dissipating layer respectively with the power supply solder ball.
The present invention makes the method for ball grid array package substrate: be earlier respectively to cover not mucous membrane of one deck at the substrate upper and lower surface, then, substrate boring and cutting to form several through holes and depressed area, inserted conducting resinl again in through hole.
In the first embodiment of the present invention, remove earlier the not mucous membrane of substrate one side, with the applying heat dissipating layer on this face, utilize the not mucous membrane that keeps to cover substrate surface, form black ink again in the depressed area, after waiting to remove the not mucous membrane of all the other one sides, form a Copper Foil again in substrate surface.Utilize photoetching and etching technique to form the BGA pattern, comprise wire pattern and form the pattern that solder ball is connected at copper-clad surface.Painting black printing ink is in the heat dissipating layer surface more afterwards, and in order to insulation, the BGA pattern plane then is covered in wire pattern with solder resist.Carry out nickel, golden membrane electroplating and screen printing at last and connect solder ball, and chip placing is made last chip in the depressed area, utilize pin to be connected with the BGA pattern subsequently, the resin that reinjects is sealed steps such as chip and pin.
In the second embodiment of the present invention, be after the conducting resinl of first embodiment injects through hole, remove not mucous membrane of substrate upper and lower surface simultaneously, again Copper Foil and heat dissipating layer are fitted on the substrate simultaneously.Again Copper Foil is formed the BGA pattern with photoetching and etching technique, then, on the BGA pattern plane, stick a cuticula, form black ink again and behind the depressed area, remove cuticula.Step is described in first embodiment later on.
And manufacturing has the method step of the manufacturing ball grid array package substrate of the heat dissipating layer that ground connection and power supply pattern are provided simultaneously, that is the third embodiment of the present invention, be that upper and lower surface to the substrate that comprises a copper-clad surface respectively covers not mucous membrane of one deck, afterwards, substrate boring is formed several through holes and cutting substrate to form the depressed area.Insert conducting resinl again in through hole, utilize mucous membrane not to prevent the adhesion of conducting resinl and substrate.After waiting to remove not mucous membrane, heat dissipating layer is pasted on substrate back.Form cuticula again in the positive and negative surface of substrate, form black ink again in the depressed area.Then, after removing all the other cuticula, utilize photoetching and etching technique to form the BGA pattern, comprise wire pattern, the pattern that is connected with the formation solder ball at copper-clad surface.And on heat dissipating layer, form grounding pattern and conductive pattern.And then painting black printing ink is in the heat dissipating layer surface, and in order to insulation, the BGA pattern plane then is covered in wire pattern with solder resist.Carry out nickel, golden membrane electroplating and screen printing at last and connect solder ball, chip placing is made last chip in the depressed area, utilize pin to be connected with the BGA pattern, the resin that reinjects is sealed steps such as chip and pin.
Claims (10)
1. ball grid array package substrate have the single pattern layer that connects solder ball in the one side of BGA substrate, and heat dissipating layer is incorporated into the another side of this substrate, it is characterized in that:
This heat dissipating layer is except that providing the heat radiation of BGA substrate, the ground connection and/or the power supply pattern of this BGA substrate also are provided simultaneously, in order to ground connection and/or the required area of power supply pattern that disperses this BGA substrate pattern layer, wherein the ground connection of this BGA substrate and/or power supply tin ball are to utilize the through hole that fills up conducting resinl to be connected with this heat dissipating layer.
2. ball grid array package substrate according to claim 1 is characterized in that: described conducting resinl comprise at least elargol, copper glue one of them.
3. ball grid array package substrate according to claim 1 is characterized in that: described not mucous membrane is not have a film of compatibility with conducting resinl.
4. ball grid array package substrate according to claim 1 is characterized in that: it is one kind of that described not mucous membrane comprises polyethylene film, polypropylene screen, polyester film or acrylic resin at least.
5. the manufacture method of a ball grid array package substrate comprises following steps at least:
One BGA substrate is provided, and this substrate upper and lower faces respectively has not mucous membrane of one deck;
Form several through holes and a depressed area in this substrate, this through hole is formed at the predetermined ground connection solder ball position of this substrate, and the depressed area is used for putting a chip;
Fill with conducting resinl in the through hole of this substrate;
Remove not mucous membrane;
Form a heat dissipating layer and a Copper Foil respectively at this substrate upper and lower faces;
On this Copper Foil, form pattern and the wire pattern that this BGA substrate solder ball connects;
Painting black printing ink on this heat dissipating layer;
In this depressed area, form a black ink;
On pattern that comprises this BGA substrate solder ball connection and wire pattern, be coated with solder resist;
Impose lithographic process, in order to the copper foil pattern of exposed this BGA substrate solder ball connection;
Impose electroplating process, in order to plated nickel film on this copper foil pattern and golden film;
On this gold film, form solder ball;
This chip is placed on the black ink, and the contact mat on this chip is connected with wire pattern with the pattern that this BGA substrate solder ball is connected with lead.
6. the manufacture method of ball grid array package substrate according to claim 5 is characterized in that: described one of them the conducting resinl of elargol, copper glue that comprises at least is with scraper or roll printing is one kind of flows in the through hole.
7. the manufacture method of ball grid array package substrate according to claim 5, described heat dissipating layer are before painting black printing ink, can plate nickel dam at heat dissipating layer earlier.
8. the manufacture method of a ball grid array package substrate comprises following steps at least:
One substrate is provided, and the one side of this substrate includes one deck Copper Foil, and upper and lower faces respectively has not mucous membrane of one deck;
Form several through holes and a depressed area in this substrate, this through hole is formed at this substrate predetermined ground connection solder ball and power supply solder ball position, and this depressed area is used for putting a chip;
Form conducting resinl in the through hole of this substrate;
Remove not mucous membrane;
The another side that does not contain Copper Foil at this substrate forms a heat dissipating layer;
Form a black ink in this depressed area;
To this copper foil patternization, with the pattern that forms signal pattern and connect power supply tin ball and ground connection tin ball in wherein;
To this heat dissipating layer patterning, to form grounding pattern and power supply pattern in wherein;
On this heat dissipating layer, form black ink;
Comprise at this substrate on the one side of signal pattern and form solder resist;
Impose lithographic process, with the copper foil pattern of exposed part, the copper foil pattern of this part is in order to connect power supply tin ball and ground connection tin ball;
Impose electroplating process, in order to plated nickel film and golden film in regular turn on this exposed copper foil pattern;
On this gold film, form the tin ball, make the ground connection tin ball of this substrate and power supply tin ball be connected to the grounding pattern and the power supply pattern of this heat dissipating layer respectively by the conducting resinl of this substrate through hole;
This chip is placed on the black ink, and the contact mat on this chip is connected with wire pattern with the pattern that this BGA substrate solder ball is connected with lead.
9. the manufacture method of ball grid array package substrate according to claim 8 is characterized in that: described to this copper foil patternization and this heat dissipating layer patterning, and utilize photoetching and etch process to carry out.
10. the manufacture method of ball grid array package substrate according to claim 8, described one of them the conducting resinl of elargol, copper glue that comprises at least is to inject this through hole with scraper or roll printing a kind of conducting resinl wherein.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 02101667 CN1183588C (en) | 2002-01-15 | 2002-01-15 | Ball pin array package substrate and making method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 02101667 CN1183588C (en) | 2002-01-15 | 2002-01-15 | Ball pin array package substrate and making method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1359150A CN1359150A (en) | 2002-07-17 |
| CN1183588C true CN1183588C (en) | 2005-01-05 |
Family
ID=4739593
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 02101667 Expired - Lifetime CN1183588C (en) | 2002-01-15 | 2002-01-15 | Ball pin array package substrate and making method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1183588C (en) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100350821C (en) * | 2004-06-08 | 2007-11-21 | 威盛电子股份有限公司 | Signal transmission device with hole and tin ball |
| CN100350819C (en) * | 2005-06-13 | 2007-11-21 | 威盛电子股份有限公司 | Structure of base plate for packaging ball grid array |
| JPWO2007138771A1 (en) * | 2006-05-26 | 2009-10-01 | 株式会社村田製作所 | Semiconductor device, electronic component module, and method of manufacturing semiconductor device |
| US9786518B2 (en) * | 2013-12-06 | 2017-10-10 | Enablink Technologies Limited | System and method for manufacturing a cavity down fabricated carrier |
| CN104701191A (en) * | 2013-12-06 | 2015-06-10 | 毅宝力科技有限公司 | System and method for manufacturing a carrier |
| EP2881978A1 (en) * | 2013-12-06 | 2015-06-10 | Ka Wa Cheung | System and method for manfacturing a fabricated carrier |
| CN110312348B (en) * | 2019-08-07 | 2024-05-24 | 深圳市炫鼎光电科技有限公司 | Three-point type flip constant current driving chip and LED lamp |
-
2002
- 2002-01-15 CN CN 02101667 patent/CN1183588C/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| CN1359150A (en) | 2002-07-17 |
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Granted publication date: 20050105 |