CN1822345A - 通过精确的晶片定位对准消除系统处理的成品率下降 - Google Patents
通过精确的晶片定位对准消除系统处理的成品率下降 Download PDFInfo
- Publication number
- CN1822345A CN1822345A CNA2005101373293A CN200510137329A CN1822345A CN 1822345 A CN1822345 A CN 1822345A CN A2005101373293 A CNA2005101373293 A CN A2005101373293A CN 200510137329 A CN200510137329 A CN 200510137329A CN 1822345 A CN1822345 A CN 1822345A
- Authority
- CN
- China
- Prior art keywords
- wafer
- semiconductor substrate
- jig
- line
- yield
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67259—Position monitoring, e.g. misposition detection or presence detection
- H01L21/67265—Position monitoring, e.g. misposition detection or presence detection of substrates stored in a container, a magazine, a carrier, a boat or the like
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
- H01L21/682—Mask-wafer alignment
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P80/00—Climate change mitigation technologies for sector-wide applications
- Y02P80/30—Reducing waste in manufacturing processes; Calculations of released waste quantities
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Drying Of Semiconductors (AREA)
Abstract
Description
Claims (10)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/992,982 | 2004-11-19 | ||
US10/992,982 US7214552B2 (en) | 2004-11-19 | 2004-11-19 | Eliminating systematic process yield loss via precision wafer placement alignment |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1822345A true CN1822345A (zh) | 2006-08-23 |
CN100382274C CN100382274C (zh) | 2008-04-16 |
Family
ID=36371573
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2005101373293A Expired - Fee Related CN100382274C (zh) | 2004-11-19 | 2005-11-21 | 通过精确的晶片定位对准消除系统处理的成品率下降 |
Country Status (3)
Country | Link |
---|---|
US (1) | US7214552B2 (zh) |
CN (1) | CN100382274C (zh) |
DE (1) | DE102005055145A1 (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113906548A (zh) * | 2019-05-20 | 2022-01-07 | 应用材料公司 | 处理套组外壳系统 |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7352440B2 (en) | 2004-12-10 | 2008-04-01 | Asml Netherlands B.V. | Substrate placement in immersion lithography |
US7381576B2 (en) * | 2005-08-15 | 2008-06-03 | Infineon Technologies Richmond, Lp. | Method and apparatus for monitoring precision of water placement alignment |
CN102280400B (zh) * | 2011-09-05 | 2013-02-27 | 清华大学 | 一种激光束加工处理中的晶圆片对准方法 |
US9966292B2 (en) * | 2016-07-12 | 2018-05-08 | Globalfoundries Inc. | Centering fixture for electrostatic chuck system |
JP6635888B2 (ja) | 2016-07-14 | 2020-01-29 | 東京エレクトロン株式会社 | プラズマ処理システム |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5194743A (en) * | 1990-04-06 | 1993-03-16 | Nikon Corporation | Device for positioning circular semiconductor wafers |
US6389366B1 (en) * | 1999-03-25 | 2002-05-14 | Advanced Micro Devices, Inc. | Methods for identifying sources of patterns in processing effects in manufacturing |
US6629053B1 (en) * | 1999-11-22 | 2003-09-30 | Lam Research Corporation | Method and apparatus for determining substrate offset using optimization techniques |
JP3990881B2 (ja) * | 2001-07-23 | 2007-10-17 | 株式会社日立製作所 | 半導体製造装置及びそのクリーニング方法 |
US6652656B2 (en) * | 2001-07-24 | 2003-11-25 | Tokyo Electron Limited | Semiconductor wafer holding assembly |
-
2004
- 2004-11-19 US US10/992,982 patent/US7214552B2/en not_active Expired - Fee Related
-
2005
- 2005-11-18 DE DE102005055145A patent/DE102005055145A1/de not_active Withdrawn
- 2005-11-21 CN CNB2005101373293A patent/CN100382274C/zh not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113906548A (zh) * | 2019-05-20 | 2022-01-07 | 应用材料公司 | 处理套组外壳系统 |
Also Published As
Publication number | Publication date |
---|---|
CN100382274C (zh) | 2008-04-16 |
US7214552B2 (en) | 2007-05-08 |
DE102005055145A1 (de) | 2006-06-01 |
US20060110836A1 (en) | 2006-05-25 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US9966290B2 (en) | System and method for wafer alignment and centering with CCD camera and robot | |
CN110265328B (zh) | 通过原位反馈的晶片放置和间隙控制最佳化 | |
CN100382274C (zh) | 通过精确的晶片定位对准消除系统处理的成品率下降 | |
CN107548518B (zh) | 用于由机器人进行晶片置放的光学校准的设备及方法 | |
US7381576B2 (en) | Method and apparatus for monitoring precision of water placement alignment | |
KR102662003B1 (ko) | 영상 기반 웨이퍼 노치 위치 측정 | |
KR101431950B1 (ko) | 반도체 검사 장치 | |
KR20070092096A (ko) | 제한된 영역의 스펙트럼 분석을 수행하는 방법 및 장치 | |
CN110462810B (zh) | 用于基板处理系统中的基板支撑件的基板位置校准方法 | |
KR20100063786A (ko) | 웨이퍼 보우 계측 장치 및 그 방법 | |
JP2022130533A (ja) | 調整可能/交換可能なエッジ結合リングのための検出システム | |
CN110176427B (zh) | 基板处理设备及使用该基板处理设备的基板处理方法 | |
US6815959B2 (en) | Systems and methods for measuring properties of conductive layers | |
KR101728390B1 (ko) | 식각 장치 및 플라즈마 처리 장치 | |
TWI776619B (zh) | 用於針對移動的工序套件測量侵蝕及校準位置的方法及裝置 | |
KR20200038417A (ko) | 플라즈마 처리 장치, 및 링 부재의 두께 측정 방법 | |
US6753498B2 (en) | Automated electrode replacement apparatus for a plasma processing system | |
KR20200089616A (ko) | 플라즈마 처리 장치, 및 링 부재의 위치 어긋남 측정 방법 | |
KR20230058486A (ko) | 배치 프로세싱 챔버들을 위한 프로세스 갭 제어부를 갖는 히터 조립체 | |
JP2022542945A (ja) | カメラウエハを使用した台座セットアップ | |
KR20040046204A (ko) | 이온 주입 장치의 모니터링 방법 및 이를 수행하기 위한섀도우 지그를 갖는 이온 주입 장치 | |
KR20170039461A (ko) | 기판 처리 장치 및 로봇 티칭 방법 | |
CN113793827B (zh) | 一种晶圆承载结构及半导体检测设备 | |
KR100499172B1 (ko) | 이온 주입 공정의 기판 경사각 측정 방법 | |
US6881592B2 (en) | Method and device for minimizing multi-layer microscopic and macroscopic alignment errors |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
ASS | Succession or assignment of patent right |
Owner name: QIMONDA NORTH AMERICA CORP. Free format text: FORMER OWNER: INFINEON TECHNOLOGIES RICHMOND Effective date: 20110923 Owner name: INFINEON TECHNOLOGIES AG Free format text: FORMER OWNER: QIMONDA NORTH AMERICA CORP. Effective date: 20110923 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20110923 Address after: North Carolina Patentee after: Qimonda North America Corp. Address before: Virginia, USA Patentee before: Infineon Technologies Richmond, L.P. Effective date of registration: 20110923 Address after: Munich, Germany Patentee after: QIMONDA AG Address before: North Carolina Patentee before: Qimonda North America Corp. |
|
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20151225 Address after: German Berg, Laura Ibiza Patentee after: Infineon Technologies AG Address before: Munich, Germany Patentee before: QIMONDA AG |
|
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20080416 Termination date: 20151121 |
|
EXPY | Termination of patent right or utility model |