CN1749837A - Staggered column drive circuit systems and methods - Google Patents
Staggered column drive circuit systems and methods Download PDFInfo
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- CN1749837A CN1749837A CN 200510093576 CN200510093576A CN1749837A CN 1749837 A CN1749837 A CN 1749837A CN 200510093576 CN200510093576 CN 200510093576 CN 200510093576 A CN200510093576 A CN 200510093576A CN 1749837 A CN1749837 A CN 1749837A
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Abstract
A system and method for staggered actuation of columns of interferometric modulators comprising microelectromechanical systems (MEMS). In one embodiment, the method determines data for actuating two or more groups of columns in the array, each group having one or more columns, and provides the data to the array to actuate two or more group of columns so that each group is activated during a group addressing period. In another embodiment, a display includes at least one driving circuit and an array comprising a plurality of interferometric modulators disposed in a plurality of columns and rows, said array being configured to be driven by said driving circuit which is configured to stagger the actuation of the plurality of columns during an array addressing period.
Description
Technical field
Technical field of the present invention relates to MEMS (micro electro mechanical system) (MEMS).
Background technology
MEMS (micro electro mechanical system) (MEMS) comprises micromechanical component, driver and electronic component.Micromechanical component can adopt deposition, etching or other several portions that can etch away substrate and/or institute's deposited material layer maybe can add several layers and make with the micromachined technology that forms electricity and electromechanical assembly.One type MEMS device is called as interferometric modulator.Interferometric modulator can comprise the pair of conductive plate, one of them or the two all can be transparent whole or in part and/or be reflectivity, and can relative motion when applying a suitable electric signal.One of them plate can comprise a quiescent layer that is deposited on the substrate, and another plate can comprise a metal partion (metp) that separates by a clearance and this quiescent layer.Said apparatus is with a wide range of applications, and in this technology, utilizes and/or revises the characteristic of these types of devices so that its performance can be used for improving existing product and makes still undeveloped at present new product will be rather useful.
Summary of the invention
System of the present invention, method and device all have many aspects, and arbitrary single aspect all can not determine its desired characteristic separately.Now, its main characteristic is carried out brief description, this not delimit the scope of the invention.Checking this argumentation, especially reading title for after the part of " embodiment ", how people provides the advantage that is better than other display device if can understanding feature of the present invention.
In one first embodiment, the present invention includes a kind of display, it comprises at least one driving circuit, and one comprises a plurality of arrays of interferometric modulators that are arranged to a plurality of row and row, described array is configured to be driven by described driving circuit, and wherein said driving circuit is configured to apply signal for two or more row alternately.
In aspect of described first embodiment, alternately for two or more row apply signal, and wherein said driving circuit further is configured to during a line-addressing cycle to use a signal to come the one or more row of gating to described driving circuit in a row addressing period.
In the second aspect of described first embodiment, described driving circuit further is configured to apply signal listing of two groups or two above groups, wherein each group all has a group addresing cycle during described row addressing period, and each group all has one or more row, and wherein the described group addresing cycle of each group is different from the group addresing cycle of arbitrary other groups at least in part.
In the third aspect of described first embodiment, described driving circuit further is configured to apply signal listing of two groups or two above groups, each group all is activated during the group addresing cycle in described row addressing period, and each group all has one or more row.
In the fourth aspect of described first embodiment, it is that the row of two groups or two above groups apply signal that described driving circuit further is configured to, each group all is activated during the group addresing cycle in a row addressing period, each group all has one or more row, and wherein the relative start time in each group addresing cycle is all different in time.
Described first embodiment one the 5th aspect in, described driving circuit further was configured to be one first row during the cycle very first time, be that a secondary series applies a signal that at least a portion in the wherein said cycle very first time betides the different moment with described second time cycle during one second time cycle.
Described first embodiment one the 6th aspect in, each group all has row.
Described first embodiment one the 7th aspect in, described driving circuit applies signal by a predesigned order for each group.
In the eight aspect of described first embodiment, described driving circuit is that one or more groups apply signal by a predesigned order.
Described first embodiment one the 9th aspect in, described driving circuit is that one or more groups apply signal with order at random.
Described first embodiment 1 the tenth aspect in, each group all comprises the row of equal number.
In 1 the tenth one side of described first embodiment, one or more groups comprise the row of a varying number.
Described first embodiment 1 the 12 aspect in, described driving circuit applies signal by a succession order for each row.
Described first embodiment 1 the 13 aspect in, described driving circuit applies signal by a non-succession order for two or more row at least.
In one second embodiment, the present invention includes a display, it comprises at least one driving circuit, and an array, described array comprise a plurality of interferometric modulators row and a plurality of interferometric modulator capable, described array is configured to be driven by described driving circuit, wherein said driving circuit is configured to receive the column data that is used for described a plurality of row, and further is configured to use described column data in that side by side each does not list and applies a signal and applying a signal on each row during the line-addressing cycle in one or more row in two or more interferometric modulators row during the row addressing period.
In one the 3rd embodiment, the present invention includes and a kind ofly have the method that a plurality of interferometric modulators row and the capable array of interferometric modulator provide data to one, described method comprises: during the one first group addresing cycle in an array addressing period, be that each row applies a signal in the row of first group according to one first data acquisition; During the second group addresing cycle of described array address one in cycle, using one second data acquisition is that each row applies a signal in the row of second group, and the described second group addresing cycle overlaps during portion of time the described first group addresing cycle; And in one first row, applying a signal during the described time portion, to encourage the interferometric modulator in described first row.
In aspect of described the 3rd embodiment, described first group comprises a number of columns that is different from described second group.
In the second aspect of described the 3rd embodiment, described first group addresing cycle and the described second group addresing cycle are by a predesigned order.
In the third aspect of described the 3rd embodiment, described first group addresing cycle and the described second group addresing cycle are by at random an order.
In the fourth aspect of described the 3rd embodiment, described first group comprises the row with described second group's equal number.
In one the 4th embodiment, the present invention includes and a kind ofly have the method that a plurality of interferometric modulators row and the capable array of interferometric modulator provide data to one, described method comprises: receive the data of the row be used for two or more groups of described array, each group all has one or more row; And apply signal, so that begin in two or more groups, to apply signal and have a time cycle that in all groups, applies signal simultaneously in the different moment according to the data of described two or more groups.
In aspect of described the 4th embodiment, each group all comprises the row of equal number.
In the second aspect of described the 4th embodiment, a group addresing cycle of each group is different from the group addresing cycle of arbitrary other groups at least in part.
In the third aspect of described the 4th embodiment, a group addresing cycle of each group all begins in a different in time moment.
In the fourth aspect of described the 4th embodiment, the group addresing cycle of two or more groups is by a predesigned order.
Described the 4th embodiment one the 5th aspect in, the group addresing cycle of two or more groups is by at random an order.
In one the 5th embodiment, the present invention includes a kind of display, it comprises: one comprises the array of a plurality of interferometric modulators, and each in the described interferometric modulator all is connected to a row electrode and a column electrode; And one drive circuit, it is connected to the row electrode and the column electrode of described array and is configured to drive described array, and described driving circuit is configured to begin to list at two or more two different moment apply signal.
In one the 6th embodiment, the present invention includes a kind of driving circuit, it is configured to drive an array that is made of a plurality of interferometric modulators, in the described interferometric modulator each all is connected to a row electrode and a column electrode, described driving circuit comprises: one is used for the memory storage of storing predetermined video data, one telltale that carries out data communication with described memory storage, described telltale is configured to not apply signal on each row electrode simultaneously in two or more row, and wherein said signal is based on described predetermined video data.
Description of drawings
Fig. 1 is an isometric drawing, it shows the part of an embodiment of an interferometric modulator display, wherein one of one first interferometric modulator removable reflection horizon is in an off-position, and a removable reflection horizon of one second interferometric modulator is in an excited target position.
Fig. 2 is a system block diagram, and it shows that one comprises an embodiment of the electronic installation of one 3 * 3 interferometric modulator displays.
Fig. 3 is the removable mirror position of an exemplary embodiment of interferometric modulator shown in Figure 1 and the graph of a relation of the voltage that applies.
Fig. 4 is one group of synoptic diagram that can be used for driving the row and column voltage of interferometric modulator display.
Fig. 5 A and Fig. 5 B show an exemplary sequential chart that can be used for writing to 3 * 3 interferometric modulator displays shown in Figure 2 the row and column signal of a frame of display data.
Fig. 6 A is the sectional view of a device shown in Figure 1.
Fig. 6 B is a sectional view of an alternate embodiment of an interferometric modulator.
Fig. 6 C is a sectional view of another alternate embodiment of an interferometric modulator.
Fig. 7 is the synoptic diagram in the exemplary currents that flows on alignment during the quick changes in voltage.
Fig. 8 one will be used for making the staggered circuit of row excitation to incorporate the partial schematic diagram of an embodiment of the bi-stable display device (for example interferometric modulator display) of column drive circuit into.
Fig. 9 shows and can be used for using an interlace scheme that applies signal to come a capable signal that one 3 * 3 interferometric display are write and an exemplary sequential chart of column signal.
Figure 10 A and 10B are system block diagrams, and it shows that one comprises an embodiment of the visual display unit of a plurality of interferometric modulators.
Embodiment
Below describe in detail and relate to some embodiments of the invention.But, the present invention can implement by being permitted different ways.In this explanation, can be with reference to accompanying drawing, in the accompanying drawings, identical parts use identical number-mark from start to finish.Find out easily that according to following explanation the present invention can be used for display image-no matter be dynamic image (for example video) or still image (for example rest image) in arbitrary configuration, no matter be character image or picture-device in implement.More specifically, the present invention can implement in inferior numerous kinds of electronic installations or is associated with these electronic installations for example (but being not limited to): mobile phone, wireless device, personal digital assistant (PDA), handheld computer or portable computer, gps receiver/omniselector, camera, the MP3 player, video camera, game machine, wrist-watch, clock, counter, TV monitor, flat-panel monitor, computer monitor, automotive displays (for example stadimeter display etc.), driving cabin control device and/or display, video camera scenery display (for example rear view camera display of vehicle), electronic photo, electronics billboard or label, projector, building structure, packing and aesthetic structures (for example display image on a jewelry).The MEMS device that has similar structures with MESE device described herein also can be used for non-display application, for example is used for electronic switching device.
Show an interferometric modulator display embodiment who contains an interfere type MEMS display element among Fig. 1.In these devices, pixel is in bright state or dark state.Under bright (" opening (on) " or " opening (open) ") state, display element reflexes to the user with most of incident visible light.Be in dark (" closing (off) " or " closing (closed) ") state following time, display element reflects the incident visible light to the user hardly.Decide on different embodiment, can put upside down the light reflectance properties that " on " reaches " off " state.The MEMS pixel can be configured to mainly and reflects under selected color, also can realize colored the demonstration except that black and white.
Fig. 1 is an isometric drawing of describing two neighbors in a series of pixels of a visual displays, and wherein each pixel all comprises a MEMS interferometric modulator.In certain embodiments, an interferometric modulator display comprises a row/column array that is made of these interferometric modulators.Each interferometric modulator includes a pair of reflection horizon, and this is positioned to each other to have at least one variable-sized optical resonator at a distance of a variable and controlled distance to form one to the reflection horizon.In one embodiment, one of them reflection horizon can be moved between the two positions.Be referred to herein as on the primary importance of release conditions, the local reflex layer that the position of this displaceable layers distance one is fixed is far away relatively.On the second place, the position of this displaceable layers is more closely near this local reflex layer.Decide position according to removable reflection horizon, from the incident light of this two layers reflection can with mutually long or mutually the mode of disappearing interfere, thereby form the mass reflex or the non-reflective state of each pixel.
The pixel array portion of describing in Fig. 1 comprises two adjacent interferometric modulator 12a and 12b.In the interferometric modulator 12a in left side, demonstration one movably high reflection layer 14a is in an off-position, and this off-position is apart from fixing local reflex layer 16a one preset distance.In the interferometric modulator 12b on right side, show that movably high reflection layer 14b is in an excited target position, this excited target position is near fixing local reflex layer 16b.
Fixed bed 16a, 16b conduction, local transparent and local be reflectivity, and can on a transparent substrates 20, deposit layer making of one or more respectively do for oneself chromium and tin indium oxides by (for example).Described each layer is patterned into parallel band, and can form the column electrode in the display device, hereinafter will be further to this explanation.Displaceable layers 14a, 14b can form by being deposited on one or more depositing metal layers on pillar 18 tops (and column electrode 16a, 16b quadrature) and and be deposited on the series of parallel band that the middle expendable material between the pillar 18 constitutes.After etching away expendable material, these deformable metal levels separate with the air gap 19 of the metal level of fixing by a regulation.These deformable layer can use one to have high conductivity and reflexive material (for example aluminium), and those bands can form the row electrode in the display device.
When not applying voltage, chamber 19 remains between a layer 14a, the 16a, and deformable layer is in the mechanical relaxed state shown in pixel 12a among Fig. 1.Yet after a selected row and column applies potential difference (PD), the capacitor that forms at the respective pixel place of described row and column electrode intersection becomes charged state, and electrostatic force pulls to these electrodes together.If voltage is enough high, then displaceable layers generation deformation, and be forced on the fixed bed (can on fixed bed, deposit a dielectric material (not shown in this Figure), preventing short circuit, and the control separation distance), shown in the pixel 12b on the right side among Fig. 1.Regardless of the potential difference (PD) polarity that is applied, the behavior is all identical.Like this, used row/row encourage similar in many aspects in the row of the non-relatively reflective pixel state of may command reflection/row excitation and traditional LCD and other display techniques.
Fig. 2 to Fig. 5 shows the example process and the system that use an interferometric modulator array in a display application.Fig. 2 is a system block diagram, and this figure shows that one can embody an embodiment of the electronic installation of each side of the present invention.In this exemplary embodiment, described electronic installation comprises a processor 21-, and it can be any general purpose single-chip or multicore sheet processor, for example ARM, Pentium
, Pentium II
, PentiumIII
, Pentium IV
, Pentium
Pro, 8051, MIPS
, Power PC
, ALPHA
, or any application specific processor, for example digital signal processor, microcontroller or programmable gate array.According to convention in the industry, processor 21 can be configured to carry out one or more software modules.Except that carrying out an operating system, also this processor can be configured to carry out one or more software applications, comprise web browser, telephony application, e-mail program or any other software application.
In one embodiment, processor 21 also is configured to communicate with an array controller 22.In one embodiment, this array control unit 22 comprises a horizontal drive circuit 24 and the column drive circuit 26 that signal is provided to a pel array 30.Array sectional view shown in Fig. 1 illustrates with line 1-1 in Fig. 2.For the MEMS interferometric modulator, described row/row excitation protocol can utilize the hysteresis property of these devices shown in Figure 3.It for example may need, and one 10 volts electric potential difference makes a displaceable layers be deformed into actuated state from release conditions.Yet, when described voltage when this value reduces, reduce when being back to below 10 volts at described voltage, described displaceable layers will keep its state.In the exemplary embodiment of Fig. 3, before voltage drop was low to moderate below 2 volts, displaceable layers can not discharge fully.Therefore, in example shown in Figure 3, exist one to be approximately the voltage range that 3-7 lies prostrate, exist one to apply voltage window in this voltage range, described device is stabilized in and discharges or actuated state in this window.In this article Jiang its Cheng Wei Roll lag windwo for an array of display with hysteresis characteristic shown in Figure 3, OK/the row excitation protocol can be designed to be expert at during the gating, the pixel that is energized is applied about 10 a volts voltage difference to selected in current, and to d/d pixel being applied one near 0 volt voltage difference.After gating, it is poor to apply about 5 a volts steady state voltage to pixel, and gating makes its residing any state so that its maintenance is expert at.After being written into, in this example, each pixel is all born a potential difference (PD) that is in the 3-7 volt " stability window ".This characteristic makes pixel design shown in Figure 1 be stabilized in an existing foment or release conditions under identical the voltage conditions that applies.Because each pixel of interferometric modulator, no matter be in foment or release conditions, in fact all be one by described fixed reflector and capacitor that mobile reflection horizon constituted, therefore, this steady state (SS) can be kept under the voltage in the lag windwo and consumed power hardly.If the current potential that is applied is constant, then there is not electric current to flow into pixel basically.
In the typical case uses, can be by determining that according to one group of desired actuated pixels in first row one group of row electrode forms a display frame.After this, a horizontal pulse is put on the electrode of the 1st row, thereby encourage the pixel corresponding with determined alignment.After this, determined one group of row electrode is become corresponding with desired one group of actuated pixels in second row.After this, with a pulse put on the 2nd the row electrode, thereby according to determined row electrode encourage the 2nd the row in respective pixel.The pixel of the 1st row is not subjected to the influence of the pulse of the 2nd row, thereby the state that keeps it to set at the impulse duration of the 1st row.The property mode repeats above-mentioned steps to the row of whole series in order, to form described frame.Usually, repeating this process by the speed with a certain desired frame number/second refreshes and/or upgrades these frames.Also have a variety of row and the row electrodes that are used to drive pel array to be known by people, and can use with the present invention with the agreement that forms display frame.
Fig. 4 and Fig. 5 show a kind of possible excitation protocol that is used for forming a display frame on 3 * 3 arrays shown in Figure 2.Fig. 4 shows one group of possible row and column voltage level of can be used for having the pixel of hysteresis curve shown in Figure 3.In the embodiment of Fig. 4, encourage a pixel to comprise row accordingly be set to-Vbias, and will go accordingly be set to+Δ V-its can correspond respectively to-5 volts and reach+5 volts.Discharge pixel then to be set to by being listed as accordingly+Vbias and will going accordingly is set to identical+Δ V, form one 0 volts electric potential difference at described pixel two ends thus realizes.In the row of 0 volt of those wherein capable voltages maintenance, pixel is stable at its initial residing state, and is in+V with these row
BiasStill-V
BiasIrrelevant.
Fig. 5 B is the sequential chart of a series of row of demonstration and column signal, and those signals put on 3 * 3 arrays shown in Figure 2, and it will form the demonstration shown in Fig. 5 A and arrange that wherein actuated pixels is non-reflectivity.Before writing the frame shown in Fig. 5 A, pixel can be in any state, and in this example, all row all are in 0 volt, and all row all be in+5 volts.Under these institute's voltages that apply, all pixels are stable at its existing actuated state or release conditions.
In the frame shown in Fig. 5 A, pixel (1,1), (1,2), (2,2), (3,2) and (3,3) are encouraged.For realizing this effect, during one " line time " of the 1st row, the 1st row and the 2nd row are set at-5 volts, the 3rd row are set at+5 volts.This can not change the state of any pixel, because all pixels all remain in the stability window of 3-7 volt.After this, rise to 5 volts of pulses that are back to 0 volt that descend again then by one from 0 volt and come gating the 1st row.Actuate pixel (1,1) and (1,2) and discharge pixel (1,3) thus.Other pixels in the array are all unaffected.For the 2nd row is set at desired state, the 2nd row are set at-5 volts, the 1st row and the 3rd row are set to+5 volts.After this, apply identical strobe pulse with actuate pixel (2,2) and discharge pixel (2,1) and (2,3) to the 2nd row.Equally, other pixels in the array are all unaffected.Similarly, by the 2nd row and the 3rd row are set at-5 volts, and be listed as the 1st be set at+5 volts to the 3rd capable the setting.The strobe pulse of the 3rd row is set at the state shown in Fig. 5 A with the 3rd row pixel.After writing incoming frame, the row electromotive force is 0, and the row electromotive force can remain on+5 or-5 volts, and after this demonstration will be stable at the layout shown in Fig. 5 A.Should be appreciated that, can use identical programs the array that constitutes by tens of or hundreds of row and columns.The timing, order and the level that should also be clear that the voltage that is used to implement the row and column excitation can alter a great deal in above-described General Principle, and above-mentioned example only is exemplary, and any actuation voltage method all can be used with the present invention.
Detailed structure according to the interferometric modulator of above-mentioned principle operation can be ever-changing.For example, Fig. 6 A-6C shows three kinds of different embodiment of moving lens structure.Fig. 6 A is a sectional view embodiment illustrated in fig. 1, wherein deposition one strip of metal material 14 on the support member 18 that quadrature extends.In Fig. 6 B, movably reflecting material 14 only is on the tethers 32 at corner and is attached to support member.In Fig. 6 C, movably reflecting material 14 is suspended on the deformable layer 34.Because the structural design and the material therefor of reflecting material 14 can be optimized aspect optical characteristics, and the structural design of deformable layer 34 and material therefor can be optimized aspect the desired mechanical property, so this embodiment has some advantages.In many open files, comprise that for example No. 2004/0051929 U.S. discloses in the application case, the production of various dissimilar interference devices has been described.Can use the known technology of a variety of people to make said structure, this comprises a series of material depositions, patterning and etching step.
One MEMS interferometric modulator array is formed with the parallel current-carrying plate that reflected light is modulated by can toward each other or moving away from each other.Because pixel has capacitive character, thereby the variation of the voltage that applies on the row electrode can cause big initial current, as shown in Figure 7.The generation of this peak point current may require to use big, expensive capacitor, and this can increase the cost of MEMS interferometric modulator and influence its commercial viability.The display drive method that can reduce or eliminate big momentary current helps to reduce the cost of the display that comprises this kind interferometric modulator technology.
A kind ofly reduce big momentary current and do not need the method for big, expensive capacitor to be on the row of display and row, to apply the mode of voltage.Commercially available display column drivers is to list at all simultaneously to apply voltage.All voltages that list set simultaneously meetings are caused when column voltage changes, big momentary current from power supply in driving circuit inflow display.By making the moment that on the row electrode of one or more row, at first applies voltage staggered at least slightly, can obviously reduce the current spike of drawing from power supply.
Should be appreciated that for circuit of display driving, most of peak point current can be provided to the row electrode by the electrical power by-pass capacitor usually.Staggered by the moment that on each row electrode, applies voltage signal, just can use not too expensive, little pass capacitor.The peak point current driver IC of also flowing through, this can be because of the stray inductance in the closing line on the sheet of inside causes ground bounce on integrated circuit, even damages this parts.Apply signal and then help to alleviate this problem respectively listing alternately.
Show among Fig. 8 one be used for be alternately a modulator capable-column array applies an embodiment of the circuit of two or more column signals, this figure shows to have to the described column drive circuit 26 of Fig. 2 of the output of exemplary row 1,2,3 and N.Driving circuit 26 comprises a shift register 25, and shift register 25 can load to be used in reference to and be shown in the data that a particular moment respectively is listed as desired value.Driving circuit 26 is connected to a data latches 27, and data latches 27 receives data from shift register 25, and applies signal according to the data of being stored in the shift register 25 on one or more row electrodes.According to this embodiment, latch 27 has a data input pin, a clock input end, a power input and an output terminal to this array.In one embodiment, latch 27 is configured to when an incident takes place-for example import (for example when detecting the forward position of a time clock) when effective when the clock of latch 27, carry out " latching " to providing, for example on the output terminal of latch 27, apply signal and it is provided to the row electrode that is connected to the data of the input end of latch 27.Latch 27 can be configured to make the output terminal of latch 27 keep its data value constant before in that an incident (for example clock becomes effectively once more) takes place once more.In another embodiment, when the clock input of latch 27 becomes invalid (for example detecting the falling edge of a time clock), data are latched.Then, clock become once more invalid before, the output terminal of latch 27 will keep its data value constant.
Column data is loaded in the shift register 25, and displacement downwards is till it " is expired " in shift register 25 thereby make column data, and this moment, these data were promptly prepared to wait to latch.In this embodiment, thereby be not to apply row to whole latch 27 to allow signal to make this latch on all row electrodes, apply desired signal simultaneously, but, in this embodiment, be configured to provide one with driving circuit 26 " roll and allow ", for example so that latch 27 to apply the moment of signal on each row electrode staggered.For example, in one embodiment, driving circuit 26 can be included in and be called the circuit that a latch allows register 29 herein with regard to function, and latch allows register 29 to be connected to latch 27 and to allow latch 27 to apply staggered signal on each row electrode.
Should be appreciated that, can use different circuit to implement " roll and allow ", for example for each output of latch 27, these circuit all can have built-in delay, and perhaps latch 27 can be configured to according to the input of the output of a control lock storage 27 signal is applied to one or more row electrodes.In different embodiment, it is high that latch 27 can be applied to signal each row alternately, so that can will apply each signal respectively, for example by row apply or be that unit applies with the row (wherein for example the row of each group (" group ") all comprise one or more row) of two or more groups.Latch 27 during a specific time span-be called the group addresing cycle in this article, during it betides a row addressing period in an array addressing period-in a group each lists and apply signal.
Used herein term " group addresing cycle " is a broad terms, and it is used to describe cycle time, during this time cycle, at first applies signal in the row of a group of delegation-column array on each row electrode.Used herein term " row addressing period " is a broad terms, and it is used to describe cycle time, during this time cycle, at first applies signal on each electrode of desired row.Used herein term " row addressing " cycle is a broad terms, and it is used to describe cycle time, during this time cycle, applies signal (for example gating signal or pulse signal) in the delegation of delegation-column array.Used herein term " array address cycle " is a broad terms, and it is used to describe a time cycle that comprises a row addressing period and a line-addressing cycle.Should be appreciated that when listing when applying signal one during the row addressing period, this signal can be maintained, so that the capable signal that is applied can change a pixel corresponding to a specific row and column during line-addressing cycle.For arbitrary specific row group, its addressing period can be different from the addressing period of one or more other groups at least slightly.Row in an array can form two or more groups, and wherein each group has one or more row.Each group addresing cycle can overlap or be different actually.If each overlaps in group addresing cycle, then in these groups the part of the overlapping between any group both can be identical also can be different.The group addresing cycle both can be by a predesigned order, for example by the succession order of each row, and also can be by at random an order.Hereinafter also will illustrate in greater detail these and other embodiment of the present invention.
Fig. 9 shows and can be used for using a staggered drive scheme that applies signal on each row electrode to come a capable signal that one 3 * 3 interferometric display are write and an exemplary sequential chart of column signal.In this scheme, by a staggered order apply signal on each row electrode or by the staggered row electrode of order in two or more groups on apply signal (for example each row electrode being configured to two or more groups) so that substantially side by side in group, apply signal on each row electrode.In an array addressing period 62 a row addressing period 66 and a line-addressing cycle 68.The time span in array address cycle 62 can be different length and can be depending on application.Therefore, the time span of row addressing period 66 and line-addressing cycle 68 also can be different length.For example, in one embodiment, the time span in array address cycle 62 can be about 500 microseconds, and row addressing period 66 can be about 400 microseconds, and line-addressing cycle can be about 100 microseconds.If latch makes its output staggered by row, so that its per 2 microseconds apply signal on another row electrode, then in this example can be during the array address cycle 62 of this 500 microsecond the delegation of refresh display, and in about 1/10th seconds 200 row of refresh display.
Still referring to Fig. 9, the output of row driver 26 is the signals on each the row electrode that puts in three row electrodes 31.At the moment 1 place, column drive circuit 26 applies signal on row 1, and this signal remains to the moment 4 always.At the moment 2 places, column drive circuit 26 applies signal on row 2, and this signal remains to the moment 5 always, and at the moment 3 places, column drive circuit 26 applies signal on row 3, and this signal remains to the moment 6 always.Correspondingly, constantly 3 with the moment 4 between cycle during, all three list and all are applied with signal.Constantly 3 with time cycle between 4 constantly during this row 1 addressing period 68, a gating signal is applied to row 1 corresponding to row 1 addressing period 68, list the signal that is applied with basis at these and encourage or discharge pixel in the row 1.Can repeat this same process to each row so that 2 addressing periods 68 of being expert at ' during (6 with constantly between 7 constantly) gating signal is applied to row 2,3 addressing periods 68 of being expert at " during (constantly 9 and the moment 10 between) gating signal is applied to row 3.
Shown in this example, the output that is used for row 1 and 2 of column drive circuit 26 at first is set to-V
Bias, the output that exports row 3 to is set to+V
BiasWhen applying a positive horizontal pulse to row 1, pixel (1,1) and (1,2) are encouraged, and pixel (1,3) is released.The output that is used for row 1 and 3 of column drive circuit 26 is set to+V subsequently
BiasAnd the output that exports row 2 to is set to-V
BiasApply a positive horizontal pulse to row 2 and can discharge pixel (2,1) and (2,1) and actuate pixel (2,2).The output that is used for row 2 and 3 of column drive circuit 26 is set to-V subsequently
BiasAnd the output that exports row 1 to is set to+V
BiasApply a positive horizontal pulse to row 2 and can discharge pixel (3,1) and actuate pixel (3,2) and (3,3).The pixel arrangement that obtains thus in this example is identical with the pixel arrangement shown in Fig. 5 A.
In certain embodiments, driving circuit 26 can make during the row addressing period staggered to the signal that applies two or more groups, even each row in the group are substantially side by side applied, this also can reduce current spike.This embodiment can be particularly useful for having the display of a large amount of row.In certain embodiments, row 1-N is clustered to some groups, and wherein each group all comprises the row of specific quantity, for example four row.In each group, at least substantially side by side apply signal on the row electrode of each row, for example during the same group addresing cycle.Driving circuit 26 is that first group applies signal during one first group addresing cycle, is that second group applies signal subsequently during one second group addresing cycle, and the rest may be inferred, until applying signal for all groups.In other embodiments, the quantity of the row in each group can be one, two, three or more than four.
Therein each row is configured among some embodiment of some groups, each group all can have the row of equal number.Yet in certain embodiments, the quantity of the row in each group can be different, and perhaps some group can have the row of equal number and other groups can have the row of varying number.For example, have in the display of eight row one, one first group can comprise row 1 and 2, one second groups can only comprise row 3, and one the 3rd group can comprise row 4,5,6,7 and 8.
In certain embodiments, driving circuit 26 successions ground (for example row 1, row 2, the rest may be inferred) applies signal for each row.In other embodiments, be to apply each signal by non-succession order (for example row 3, row 1, row 2, or the like).Therein each row is configured among the embodiment of two or more groups, property order or non-succession order apply signal for each group in order.For example, can at first be that row that comprise in first group of row 3 apply signal, be then one comprise row 4,5,6, and 7 second group in each row apply signal, be that each row that comprises in the 3rd group of row 1 and 2 apply signal at last.In certain embodiments, the order of one or more groups is scheduled in these groups, and in certain embodiments, the order of one or more groups is at random, and in other embodiments, the order of these groups can be the combination of predesigned order and random order.
At least a portion in the group addresing cycle of each group overlaps mutually, thereby can apply gating signal to a row during this overlapping cycle (for example line-addressing cycle) and encourage interferometric modulator desired in this row.Can with each group addresing cycle begin relatively be configured to the influence during the row addressing period the needed magnitude of current of arbitrary moment.
Figure 10 A and 10B are the system block diagrams of an embodiment of demonstration one display device 2040.Display device 2040 for example can be cellular phone or mobile phone.Yet the same components of display device 2040 and the form of doing slightly to change thereof also can be used as for example illustration of all kinds such as TV and portable electronic device display device.
The display 2030 of exemplary display device 2040 can be any in the numerous kinds of displays, comprises bi-stable display as herein described.In other embodiments, display 2030 comprises flat-panel monitors such as plasma scope for example mentioned above, EL, OLED, STN LCD or TFT LCD or non-tablet display such as CRT or other tubular devices for example, and these displays are known by the those skilled in the art.Yet for the purpose of the explanation present embodiment, display 2030 comprises interferometric modulator display as indicated above.
Figure 10 B schematically shows the assembly among the embodiment of exemplary display device 2040.Example illustrated display device 2040 comprises a shell 2041, and can comprise that other are closed in assembly wherein at least in part.For example, in one embodiment, exemplary display device 2040 comprises a network interface 2027, and this network interface 2027 comprises that one is coupled to the antenna 2043 of a transceiver 2047.Transceiver 2047 is connected to processor 2021, and processor 2021 is connected to again regulates hardware 2052.Regulating hardware 2052 can be configured to a signal is regulated (for example a signal being carried out filtering).Regulate hardware 2052 and be connected to a loudspeaker 2045 and a microphone 2046.Processor 2021 also is connected to an input media 2048 and a driving governor 2029.Driving governor 2029 is coupled to one frame buffer 2028 and is coupled to array driver 2022, and array driver 2022 is coupled to an array of display 2030 again.One power supply 2050 is all component power supply according to the designing requirement of particular exemplary display device 2040.
Network interface 2027 comprises antenna 2043 and transceiver 2047, so that exemplary display device 2040 can communicate by network and one or more device.In one embodiment, network interface 2027 also can have some processing capacity, to reduce the requirement to processor 2021.Antenna 2043 is to launch being used to known to the those skilled in the art and any antenna of received signal.In one embodiment, this antenna is launched according to IEEE802.11 standard (comprising IEEE 802.11 (a), (b), or (g)) and is received the RF signal.In another embodiment, this antenna is launched according to bluetooth (BLUETOOTH) standard and is received the RF signal.If be cellular phone, then this antenna is designed to receive CDMA, GSM, AMPS or other and is used for the known signal that communicates at the mobile phone network.2047 pairs of signals that receive from antenna 2043 of transceiver carry out pre-service, so that it can be received and further be handled by processor 2021.Transceiver 2047 is also handled the signal that self processor 2021 receives, so that they can be by antenna 2043 from exemplary display device 2040 emissions.
In an alternate embodiment, can replace transceiver 2047 by a receiver.In another alternate embodiment, can replace network interface 2027 by an image source, this image source can store or produce and send out the view data of delivering to processor 2021.For example, this image source can be the software module that hard disk drive or that digital video disk (DVD) or contains view data produces view data.
The overall operation of processor 2021 common control examples display device 2040.Processor 2021 automatic network interfaces 2027 or an image source receive data (for example Ya Suo view data), and this data processing is become raw image data or is processed into a kind of form that is easy to be processed into raw image data.Then, the data after processor 2021 will be handled are sent to driving governor 2029 or are sent to frame buffer 2028 and store.Raw data typically refers to the information that can discern the picture characteristics of each position in the image.For example, described picture characteristics can comprise color, saturation degree and gray level.
In one embodiment, processor 2021 comprises a microcontroller, CPU or is used for the logical block of the operation of control examples display device 2040.Regulating hardware 2052 generally includes and is used for sending signals and being used for amplifier and wave filter from loudspeaker 2046 received signals to loudspeaker 2045.Adjusting hardware 2052 can be the discrete component in the exemplary display device 2040, perhaps can incorporate in processor 2021 or other assemblies.
Driving governor 2029 direct self processors 2021 or receive the raw image data that produces by processor 2021 from frame buffer 2028, and suitably with the raw image data reformatting so as high-speed transfer to array driver 2022.Particularly, driving governor 2029 is reformated into a data stream with raster-like format with raw image data, so that it has a chronological order that is suitable for scanning array of display 2030.Then, the information after driving governor 2029 will format is sent to array driver 2022.Although driving governor 2029 (for example lcd controller) normally as one independently integrated circuit (IC) be associated with system processor 2021, yet these controllers also can make up by many kinds of modes.It can be used as hardware and is embedded in the processor 2021, is embedded in the processor 2021 or fully integrated with example, in hardware and array driver 2022 as software.
Usually, the self-driven controllers 2029 of array driver 2022 receive the information after the format and video data are reformated into one group of parallel waveform, and the parallel waveform per second of this group many times is applied to from hundreds of of the x-y pel array of display, thousands of lead-in wires sometimes.
In one embodiment, driving governor 2029, array driver 2022, and array of display 2030 be applicable to the display of arbitrary type as herein described.For example, in one embodiment, driving governor 2029 is a traditional display controller or bistable display controllers (a for example interferometric modulator controller).In another embodiment, array driver 2022 is a legacy drive or a bistable display driver (a for example interferometric modulator display).In one embodiment, a driving governor 2029 is integrated mutually with array driver 2022.This embodiment is very common in the integrated system of for example cellular phone, wrist-watch and other small-area display equal altitudes.In another embodiment, array of display 2030 is a typical array of display or a bistable array of display (a for example display that comprises an interferometric modulator array).
Power supply 2050 can comprise numerous kinds of energy storing devices, and this is well-known in affiliated field.For example, in one embodiment, power supply 2050 is a rechargeable accumulator, for example a nickel-cadmium accumulator or lithium-ions battery.In another embodiment, power supply 2050 is a regenerative resource, capacitor or solar cell, comprises plastic solar cell and solar cell lacquer.In another embodiment, the socket that is configured to from the wall of power supply 2050 receives electric power.
In certain embodiments, programmability is as indicated above is present in the driving governor in control, and this driving governor can be arranged on several positions of electronic display system.In some cases, the control programmability is present in the array driver 2022.The those skilled in the art will know, can reach the above-mentioned optimization of enforcement in different configurations in number of hardware and/or the component software arbitrarily.
Although above shown, illustrated and pointed out the novel feature of the present invention that is applicable to different embodiment, yet should be appreciated that, the those skilled in the art can be on form and details to the device separated of example or technology make and variously leave out, substitute and change, this does not deviate from spirit of the present invention.Category of the present invention be by enclose claims but not by above the explanation indicate.All still belong to the meaning of equal value of claims and the modification in the scope all will be encompassed in the category of claims.
Claims (32)
1, a kind of device, it comprises:
One display, it comprises that one is arranged to the interferometric modulator array of a plurality of row and row; And
One is coupled to the driving circuit of described array, and wherein said driving circuit comprises:
One column drive circuit, it is configured to according to a series of images data line a series of column signal set is applied to described row, and
One horizontal drive circuit, it is configured to each row in the described array of gating when the column signal set with a correspondence is applied to described row, so that the each delegation of described driving circuit ground is written to described array with view data, wherein said driving circuit is configured to be in application to that described column signal to be applied during the process of few column signal set staggered.
2, device according to claim 1, alternately for two or more row apply a signal, and wherein said driving circuit further is configured to during a line-addressing cycle to use a signal to come the one or more row of gating to wherein said driving circuit in a row addressing period.
3, device according to claim 2, wherein said driving circuit further is configured to apply signal in two or more row groups, wherein each group all has a group addresing cycle during described row addressing period, and each group all has one or more row, and wherein the described group addresing cycle of each group is different from the described group addresing cycle of at least one other group at least in part.
4, device according to claim 2, wherein said driving circuit further is configured to apply signal in two or more row groups, wherein each group all is activated during the group addresing cycle in described row addressing period, and each group all has one or more row.
5, device according to claim 3, wherein said driving circuit further is configured to apply signal for two or more row groups, wherein each group all is activated during the group addresing cycle in a row addressing period, and each group all has one or more row, and wherein the start time in each group addresing cycle is all different in time.
6, device according to claim 1, wherein said driving circuit further was configured to be one first row during the cycle very first time, and be that a secondary series applies a signal that at least a portion in the wherein said cycle very first time betides the different moment with described second time cycle during one second time cycle.
7, device according to claim 3, wherein each group all has row.
8, device according to claim 3, wherein said driving circuit applies signal by a predesigned order for each group.
9, device according to claim 3, wherein said driving circuit are that one or more groups apply signal by a predesigned order.
10, device according to claim 3, wherein said driving circuit are that one or more groups apply signal by a random order.
11, device according to claim 3, wherein each group all comprises the row of equal number.
12, device according to claim 3, wherein one or more groups comprise the row of varying number.
13, device according to claim 1, wherein said driving circuit applies signal by a succession order for each row.
14, device according to claim 1, wherein said driving circuit applies signal by a non-succession order for two or more row at least.
15, device according to claim 1, it further comprises:
One processor that communicates with described display electricity, described processor is configured to image data processing; And
One memory storage that communicates with described processor electricity.
16, device according to claim 15, it further comprises:
One controller, it is configured to send to described driving circuit at least a portion of described view data.
17, device according to claim 15, it further comprises:
One image source module, it is configured to send view data to described processor.
18, device according to claim 17, wherein said image source module comprise a receiver, transceiver, reach at least one in the transmitter.
19, device according to claim 15, it further comprises:
One input media, it is configured to receive the input data and transmits described input data to described processor.
20, a kind of device, it comprises:
An array, it comprises a plurality of interferometric modulators that are arranged to a plurality of row and row;
One is coupled to the driving circuit of described array, and wherein said driving circuit comprises:
One column drive circuit, it is configured to according to a series of images data line a series of column signal set is applied to described row, and
One horizontal drive circuit, it is configured to each row in the described array of gating when the column signal set with a correspondence is applied to described row, so that the each delegation of described driving circuit ground is written to described array with view data, wherein said driving circuit is configured to be expert between the gating and applies column signal in the different moment for some different row at least, so that some transition that is listed between the different voltage statuss betides with some is listed as the different moment at least.
21, a kind of device, it comprises:
Be used to show the member of an image;
Be used to drive the member of described display member, wherein said drive member comprises:
Be used to apply the member of a series of column signal set, and
The member that is used for the each several part of the described display member of gating, wherein said drive member make described column signal apply staggered member during comprising the process that is used to be in application to a column signal set less.
22, a kind of method that comprises the display of an array that constitutes by row of display elements and row that drives, described method comprises:
Apply first set that constitutes by one or more column signals to first group that constitutes by one or more columns of display elements;
Apply second set that constitutes by one or more column signals to second group that constitutes by one or more columns of display elements,
Wherein said first and second column signal set is to apply in the different moment; And
Use one first row signal to come gating one first row of display elements.
23, method according to claim 22 wherein when applying described first and second column signal set, is carried out the gating to described first row of display elements.
24, method according to claim 23, it further comprises:
Apply the 3rd set that constitutes by one or more column signals to the 3rd group that constitutes by one or more columns of display elements;
Apply the 4th set that constitutes by one or more column signals to a four group group that constitutes by one or more columns of display elements,
The set of the wherein said the 3rd and the 4th column signal is to apply in the different moment; And
Use one second row signal to come gating one second row of display elements.
25, method according to claim 24 wherein when applying the set of the described the 3rd and the 4th column signal, is carried out the gating to described second row of display elements.
26, method according to claim 22, it further comprises:
Apply the 3rd set that constitutes by one or more column signals to described first group that constitutes by one or more columns of display elements;
Apply the 4th set that constitutes by one or more column signals to described second group that constitutes by one or more columns of display elements,
The the wherein said the 3rd and the 4th column signal is to apply in the different moment; And
Use one second row signal to come gating one second row of display elements.
27, method according to claim 26 wherein when applying the set of the described the 3rd and the 4th column signal, is carried out the gating to described second row of display elements.
28, method according to claim 26, wherein said first and second row signal is to apply in the different moment.
29, according to claim 22,23,24,25,26,27 or 28 described methods, wherein said display element is an interferometric modulator.
30, a kind of driving one comprises the method for the display of a plurality of row of display elements and row, and described method comprises:
Apply a voltage transitions to succession to a series of at least two columns of display elements;
Apply one and define current potential and come gating one first row of display elements by instantaneous;
Succession ground applies a voltage transitions at least two columns of display elements of described series; And
Apply one and define current potential and come gating one second row of display elements by instantaneous.
31, method according to claim 30, it comprises each row of display elements is applied and described gating step with repeating described succession.
32, method according to claim 31, wherein said display element is an interferometric modulator.
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| US60489304P | 2004-08-27 | 2004-08-27 | |
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| CN 200580027721 Pending CN101006490A (en) | 2004-08-27 | 2005-08-16 | Current mode display driver circuit realization feature |
| CN2005800287674A Expired - Fee Related CN101010715B (en) | 2004-08-27 | 2005-08-23 | MEMS display device and method of driving such a device |
| CNB2005100935768A Expired - Fee Related CN100418002C (en) | 2004-08-27 | 2005-08-26 | Staggered column drive circuit systems and methods |
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| CN2005800287674A Expired - Fee Related CN101010715B (en) | 2004-08-27 | 2005-08-23 | MEMS display device and method of driving such a device |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103150985A (en) * | 2008-02-11 | 2013-06-12 | 高通Mems科技公司 | Measurement and apparatus for electrical measurement of electrical drive parameters for MEMS based display |
| CN114023248A (en) * | 2020-07-16 | 2022-02-08 | 华源智信半导体(深圳)有限公司 | Display device with two-dimensional shared lines for controlling distributed driving circuits |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101828146B (en) * | 2007-10-19 | 2013-05-01 | 高通Mems科技公司 | Display with integrated photovoltaic device |
| KR101614903B1 (en) * | 2009-02-25 | 2016-04-25 | 삼성디스플레이 주식회사 | Interference light modulator and display imploying the same |
| US20120235968A1 (en) * | 2011-03-15 | 2012-09-20 | Qualcomm Mems Technologies, Inc. | Method and apparatus for line time reduction |
| US9035934B2 (en) * | 2012-05-02 | 2015-05-19 | Qualcomm Mems Technologies, Inc. | Voltage biased pull analog interferometric modulator with charge injection control |
| US10153021B1 (en) | 2017-06-09 | 2018-12-11 | Micron Technology, Inc. | Time-based access of a memory cell |
| US10153022B1 (en) | 2017-06-09 | 2018-12-11 | Micron Technology, Inc | Time-based access of a memory cell |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6680792B2 (en) * | 1994-05-05 | 2004-01-20 | Iridigm Display Corporation | Interferometric modulation of radiation |
| US7123216B1 (en) * | 1994-05-05 | 2006-10-17 | Idc, Llc | Photonic MEMS and structures |
| US6590549B1 (en) * | 1998-12-30 | 2003-07-08 | Texas Instruments Incorporated | Analog pulse width modulation of video data |
| US6388661B1 (en) * | 2000-05-03 | 2002-05-14 | Reflectivity, Inc. | Monochrome and color digital display systems and methods |
| CN100353404C (en) * | 2002-10-16 | 2007-12-05 | 新知科技股份有限公司 | High resolution ratio driving method for LED colour displaying board |
| CN1492721A (en) * | 2002-10-22 | 2004-04-28 | Driving circuit and system of organic film electric driven luminous module |
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2005
- 2005-08-16 CN CN 200580027721 patent/CN101006490A/en active Pending
- 2005-08-23 CN CN2005800287674A patent/CN101010715B/en not_active Expired - Fee Related
- 2005-08-26 CN CNB2005100935768A patent/CN100418002C/en not_active Expired - Fee Related
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103150985A (en) * | 2008-02-11 | 2013-06-12 | 高通Mems科技公司 | Measurement and apparatus for electrical measurement of electrical drive parameters for MEMS based display |
| CN114023248A (en) * | 2020-07-16 | 2022-02-08 | 华源智信半导体(深圳)有限公司 | Display device with two-dimensional shared lines for controlling distributed driving circuits |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100418002C (en) | 2008-09-10 |
| CN101010715A (en) | 2007-08-01 |
| CN101010715B (en) | 2011-09-07 |
| CN101006490A (en) | 2007-07-25 |
| HK1086349A1 (en) | 2006-09-15 |
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