CN1731576A - Power semiconductor composed by duplex-metal and china and its manufacturing method - Google Patents
Power semiconductor composed by duplex-metal and china and its manufacturing method Download PDFInfo
- Publication number
- CN1731576A CN1731576A CNA2004100626967A CN200410062696A CN1731576A CN 1731576 A CN1731576 A CN 1731576A CN A2004100626967 A CNA2004100626967 A CN A2004100626967A CN 200410062696 A CN200410062696 A CN 200410062696A CN 1731576 A CN1731576 A CN 1731576A
- Authority
- CN
- China
- Prior art keywords
- ceramic
- substrate
- power semiconductor
- metal
- bimetallic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Abstract
The invention relates to a power semiconductor, especially a power semiconductor taking double metal and ceramic as base materials. The present invention includes: metallising surface of ceramic base plate having preset capacity slot, placing two metal base plates having two extensive connectors behind the two sides of ceramic base plate; placing chip in the capacity slot to sinter the metal and ceramic base plates and getting a power semiconductor structure that consists of double metal and ceramic. The present invention has the advantages of low sealing heat with good heat transfer efficiency of ceramic and bigger heat dissipation areas.
Description
Technical field
The present invention relates to a kind of power semiconductor, refer to that especially a kind of bimetallic and pottery of utilizing is power semiconductor and manufacture method thereof that base material constituted.
Background technology
Such as industry, household electrical appliances, electric power system, traffic, commerce, aviation, computer communication all can be seen the trace that power electronics uses to military use, in electric and electronic technical field, often utilize power semiconductor assembly to reach various demands.The common power semiconductor structure schematic diagram that is shown in Figure 1, it is the made silicon 10 of this material by silicon (or germanium) that its power semiconductor inside is provided with one, and be outward extended with electric pin 11 by silicon 10, simultaneously carry out Plastic Package (claiming sealing or encapsulating processing procedure again) with the epoxy resin 20 of non-conductive material, and then utilize electric pin 11 to constitute continuing of overall power semiconductor and electric circuit in silicon 10 outsides.
Above-mentioned power semiconductor can produce high temperature when actual operation, and then influences the operating state of power semiconductor; Also therefore, general power semiconductor assembly is many can to set firmly one in advance by the made heat-conducting plate 30 of copper material on the surface of epoxy resin 20, make heat-conducting plate 30 and silicon 10 mutually mutual connection establish, with heat exchanger effectiveness, and then reach the purpose that reduces the power semiconductor temperature by heat-conducting plate 30 increases and air.
But, when the heat energy that produces during the power semiconductor running is conveyed to the epoxy resin 20 on encapsulation top layer, because epoxy resin 20 poor thermal conductivity on encapsulation top layer, therefore under long-term the use, epoxy resin 20 can absorb heat energy and heat energy sealed up for safekeeping be difficult for loss in power semiconductor, cause this moment power semiconductor whole overheated and can't normal operation easily, shorten the useful life of power semiconductor simultaneously.
And the heat conduction efficiency of general epoxy resin 20 is 0.0032, with regard to the pyroconductivity of non-conductive material, is not the splendid material of a conduction efficiency; In other words, the semi-conductive pyroconductivity of this overall power was along with the volume of epoxy resin 20 and the volume of heat-conducting plate 30 change when the heat that is produced when silicon 10 was definite value, if with epoxy resin 20 with the preferable pottery of heat transfer efficiency (heat transfer efficiency of pottery is about 25 times of epoxy resin) when substituting, can improve heat transfer efficiency, and make power semiconductor be easy to heat radiation.
Moreover, if with ceramic alternate collar epoxy resins, can close utilizing high temperature sintering technology and metal heat-conducting to harden again behind the pre-type of pottery earlier, thus, its processing procedure just need not need pass through the numerous and diverse flow process and the equipment of Plastic Package (claiming sealing or encapsulating again) processing procedure as conventional process, can simplify processing procedure, improve automated production efficient.
In addition, above-mentioned conventional power semiconductors is by being exposed to single outer heat-conducting plate 30 heat radiations; If can a slice heat-conducting plate respectively be set on the two sides in the power semiconductor outside, area of dissipation will be doubled, significantly improve radiating efficiency.
Summary of the invention
The power semiconductor that the object of the present invention is to provide a kind of bimetallic and pottery to form, make the ceramic base plate surface metallization by the high temperature sintering technology, both sides are engaged with metal substrate respectively, to pass through metal substrate when electric current, when making the silicon running, the heat energy that silicon produced, utilized ceramic substrate promptly to conduct to two metal substrates, construct compared to conventional power semiconductors, the heat conduction efficiency of ceramic substrate of the present invention is good than epoxy resin, the heat energy of sealing up for safekeeping also greatly reduces, and the area of dissipation of two metal substrates minimum be traditional twice, the power semiconductor of bimetallic of the present invention and ceramic co-fired knot is long-term used in the hot environment, and increases useful life.
Another object of the present invention is to provide the power semiconductor manufacture method of a kind of bimetallic with the pottery composition, can close utilizing high temperature sintering technology and metal heat-conducting to harden again behind the pre-type of pottery earlier during manufacturing, thus, its processing procedure just need not need can be simplified processing procedure through the numerous and diverse flow process and the equipment of Plastic Package as conventional process, improves automated production efficient.
The object of the present invention is achieved like this: a kind of bimetallic and the ceramic power semiconductor of forming, this power semiconductor is made of silicon, ceramic substrate and bimetallic substrate, wherein: be provided with one on the ceramic substrate at least in order to be installed with the storage tank of silicon, the ceramic substrate both sides engage with the bimetallic substrate respectively in the high temperature sintering mode, make the silicon both sides respectively with metal substrate mutually mutual connection establish conducting, simultaneously all be extended with pin on each metal substrate.
A kind of bimetallic and the ceramic power semiconductor manufacture method of forming include the following step:
The ceramic base plate surface metallization that one, will have a storage tank at least is with as the usefulness that engages with metal substrate;
Two, will be provided with two pre-types of metal substrate of pin, and type metal cream;
Three, silicon is got and is put, and silicon is arranged at wherein on a slice metal substrate, makes silicon be positioned at storage tank on the ceramic substrate, puts another sheet metal substrate side by side;
Four, two metal substrates and ceramic substrate are tied with high temperature co-firing, and the metal substrate of silicon and ceramic substrate both sides is connected.
Described bimetallic and the ceramic power semiconductor manufacture method of forming, wherein, the metallized method of ceramic base plate surface further includes the following step:
One, conductor printing is to be printed with the conductive pastes that element mixed such as utilizing elargol and glass on ceramic substrate;
Two, high temperature sintering is sintered on the ceramic substrate conductive paste;
Three, nickel plating is in order to prevent the disengaging of conductive paste;
Four, zinc-plated, make ceramic substrate be able to carry out sintering with metal substrate.
Description of drawings
Fig. 1 is a schematic diagram of commonly using power semiconductor.
Fig. 2 is a schematic diagram of the present invention.
Fig. 3 is a decomposing schematic representation of the present invention.
Fig. 4 is a generalized section of the present invention.
Fig. 5 is a manufacturing flow chart of the present invention.
Fig. 6 is the metallized manufacturing flow chart of ceramic base plate surface of the present invention.
Fig. 7 implements illustration for second of ceramic substrate of the present invention.
Embodiment
For the ease of the effect of understanding content of the present invention and reaching, cooperate graphic detailed description below.
Bimetallic of the present invention and the ceramic power semiconductor of forming, see also Fig. 2 to shown in Figure 4, this power semiconductor mainly is made of silicon 10, ceramic substrate 40 and two metal substrates 50, wherein is preset with storage tank 41 on the ceramic substrate 40, in order to ccontaining silicon 10; And engage with bimetallic substrate 50 respectively in the high temperature sintering mode in ceramic substrate 40 both sides, make silicon 10 and bimetallic substrate 50 mutually mutual connection establish conducting, all be extended with pin 51 on each metal substrate 50 simultaneously, use the power semiconductor that constitutes a bimetallic and pottery composition.
Because the power semiconductor that bimetallic and pottery are formed is on using, when electric current makes silicon 10 runnings of 50 of metal substrates by pin 51, relatively can produce heat energy, this moment is by the ceramic substrate 40 of 50 sintering of bimetallic substrate, with the metal substrate 50 of thermal energy conduction, and carry out heat exchange by two metal substrates 50 and air to both sides.
The pyroconductivity of above-mentioned ceramic substrate 40 is approximately 0.078, compare (pyroconductivity of epoxy resin is 0.0032) with epoxy resin, its pyroconductivity is 24.375 times of epoxy resin, therefore power semiconductor of the present invention can improve heat conduction efficiency by ceramic substrate 40, the heat energy of sealing up for safekeeping in ceramic substrate 40 inside is greatly reduced, can see through the heat exchange area that two metal substrates 50 increase overall power semiconductor and air simultaneously, so can significantly improve heat conduction and radiating efficiency, make the power semiconductor of bimetallic and ceramic co-fired knot can be long-term used in hot environment, and increase its useful life.
And the manufacture method of the power semiconductor that this bimetallic and pottery are formed sees also Fig. 3 and shown in Figure 5, consists predominantly of the following step:
One, the moulding of ceramic substrate 40 and surface metalation: be provided with a storage tank 41 on the ceramic substrate 40 at least, and with ceramic substrate 40 surface metalations, with as the usefulness that engages with metal substrate 50;
Two, the pre-type of bimetallic substrate 50 and type metal cream: can be used on the metal substrate 50 and need be provided with pin 51, and metal cream 52 be arranged at bimetallic substrate 50 surface printings; Metal cream 52 should be with tin cream for it, and the then visual use of pin 52 needs and disposes straight type or curved (only representing with straight type pin among the figure);
Three, silicon 10 is got and is put: on silicon 10 a slice metal substrates 50 located therein, in regular turn ceramic substrate 40 and another sheet metal substrate 50 rows are put, make silicon 10 be positioned at storage tank 41 on the ceramic substrate 40;
Four, with bimetallic substrate 50 and ceramic substrate 40 co-sinterings, make bimetallic substrate 50 be fixed in the both sides of ceramic substrate 40, greatly slightly 350-400 ℃ of its sintering temperature, making silicon 10 be able to connect, and then constitute the power semiconductor that a bimetallic and pottery are formed with the metal substrate 50 of ceramic substrate 40 both sides.
In the above-mentioned processing procedure, the metallized method of ceramic base plate surface further includes the following step as shown in Figure 6:
1, conductor printing is the screen printing technology of utilizing on ceramic substrate 40, is printed with the conductive pastes that element mixed 42 such as utilizing elargol and glass, as shown in Figure 3;
2, high temperature sintering utilizes 600-800 ℃ high temperature, and conductive paste 42 is sintered on the ceramic substrate 40;
3, nickel plating is in order to prevent the disengaging of conductive paste 40;
4, zinc-plated, make ceramic substrate 40 be able to carry out high temperature sintering with metal substrate 50.
See also shown in institute's drawings attached, because power semiconductor of the present invention mainly is by utilizing ceramic substrate 40 and bimetallic substrate 50 to be packaged in the outside of silicon 10, the pyroconductivity of while ceramic substrate 40 is again 24.375 times of general epoxy resin, and ceramic substrate 40 both sides all are provided with metal substrate 50, therefore can utilize ceramic substrate 40 that the heat energy that silicon 10 is produced is conducted to metal substrate 50 fast, two metal substrates 50 increase and the area of air heat exchange and see through, so can increase the useful life of the power semiconductor of bimetallic and pottery composition, and this power semiconductor is long-term used under the hot environment.
What deserves to be mentioned is, ceramic substrate 40 can be done the variation of different-thickness and size according to the demand of different electric currents, the heat energy that when electric current makes silicon 10 runnings by bimetallic substrate 50, is produced, be able to carry out sealing up for safekeeping of heat energy by the ceramic substrate 40 of different-thickness and different sizes, and heat energy is disengaged by bimetallic substrate 50 by ceramic substrate 40, use that bimetallic and the ceramic power semiconductor of forming are long-term used in the hot environment, and increase the useful life of the power semiconductor of bimetallic and pottery composition.
In order to illustrate that the more traditional power semiconductor of thermal conduction effect of the present invention has better thermal conduction effect, careful pyroconductivity with aforementioned general epoxy resin is as follows:
1, as previously mentioned, the heat conduction efficiency of general epoxy resin is 0.0032, and the pyroconductivity of ceramic substrate 40 is 0.078, so the pyroconductivity of ceramic substrate 40 is 24.375 times of epoxy resin;
2,40 both sides of the ceramic substrate among the present invention are respectively arranged with a metal substrate 50, use the heat energy of being sealed up for safekeeping in the ceramic substrate 40 is on average guided on the metal substrate 50 of both sides, to increase the heat exchange area between overall power semiconductor and the air;
3 moreover, the pyroconductivity of aforementioned ceramic substrate 40 is 24.375 times of general epoxy resin, if shared big more its heat transfer efficiency of volume of ceramic substrate 40 is good more.
Obvious thus, under identical volume, the present invention has better thermal conduction effect than the power semiconductor that known techniques is utilized epoxy resin purely and constituted really.
Except the advantage in the above-mentioned heat radiation, can be when the present invention makes earlier with behind the pre-type of pottery, utilizing high temperature sintering technology and metal heat-conducting to harden again closes, thus, its processing procedure just need not need pass through the numerous and diverse flow process and the equipment of Plastic Package as conventional process, can simplify processing procedure, improve automated production efficient.
In addition, can as shown in Figure 7 plural storage tank 41 be set further on ceramic substrate 40 during the invention process, make ceramic substrate 40 be able in each storage tank 41, be installed with a silicon respectively, and then constitute a power semiconductor with twin-core sheet.
Claims (5)
1, a kind of bimetallic and the ceramic power semiconductor of forming, it is characterized in that, this power semiconductor is made of silicon, ceramic substrate and bimetallic substrate, wherein: be provided with one on the ceramic substrate at least in order to be installed with the storage tank of silicon, the ceramic substrate both sides engage with the bimetallic substrate respectively in the high temperature sintering mode, make the silicon both sides respectively with metal substrate mutually mutual connection establish conducting, simultaneously all be extended with pin on each metal substrate.
2, bimetallic according to claim 1 and the ceramic power semiconductor of forming is characterized in that metal substrate is made of copper material.
3, a kind of bimetallic and the ceramic power semiconductor manufacture method of forming include the following step:
The ceramic base plate surface metallization that one, will have a storage tank at least is with as the usefulness that engages with metal substrate;
Two, will be provided with two pre-types of metal substrate of pin, and type metal cream;
Three, silicon is got and is put, and silicon is arranged at wherein on a slice metal substrate, makes silicon be positioned at storage tank on the ceramic substrate, puts another sheet metal substrate side by side;
Four, two metal substrates and ceramic substrate are tied with high temperature co-firing, and the metal substrate of silicon and ceramic substrate both sides is connected.
4, bimetallic according to claim 3 and the ceramic power semiconductor manufacture method of forming, wherein, the metallized method of ceramic base plate surface further includes the following step:
One, conductor printing is to be printed with the conductive pastes that element mixed such as utilizing elargol and glass on ceramic substrate;
Two, high temperature sintering is sintered on the ceramic substrate conductive paste;
Three, nickel plating is in order to prevent the disengaging of conductive paste;
Four, zinc-plated, make ceramic substrate be able to carry out sintering with metal substrate.
5, bimetallic according to claim 3 and the ceramic power semiconductor manufacture method of forming, wherein, the pin of metal substrate includes straight type and curved at least.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2004100626967A CN100341142C (en) | 2004-08-06 | 2004-08-06 | Power semiconductor composed by duplex-metal and china and its manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2004100626967A CN100341142C (en) | 2004-08-06 | 2004-08-06 | Power semiconductor composed by duplex-metal and china and its manufacturing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1731576A true CN1731576A (en) | 2006-02-08 |
| CN100341142C CN100341142C (en) | 2007-10-03 |
Family
ID=35963905
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2004100626967A Expired - Fee Related CN100341142C (en) | 2004-08-06 | 2004-08-06 | Power semiconductor composed by duplex-metal and china and its manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100341142C (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100424847C (en) * | 2006-05-11 | 2008-10-08 | 林茂昌 | Method for preparing transistor and combined improved structure obtained thereby |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10163353A (en) * | 1996-02-27 | 1998-06-19 | Toshiba Corp | Microwave device package |
| JPH1187575A (en) * | 1997-09-11 | 1999-03-30 | Fuji Electric Co Ltd | Semiconductor device |
| JP3830372B2 (en) * | 2001-10-30 | 2006-10-04 | 京セラ株式会社 | Ceramic circuit board |
| JP2003197826A (en) * | 2001-12-26 | 2003-07-11 | Toshiba Corp | Ceramic circuit board and semiconductor module using the same |
| CN1434506A (en) * | 2002-01-25 | 2003-08-06 | 华瑞股份有限公司 | Wire solder free semiconductor device and package method thereof |
-
2004
- 2004-08-06 CN CNB2004100626967A patent/CN100341142C/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100424847C (en) * | 2006-05-11 | 2008-10-08 | 林茂昌 | Method for preparing transistor and combined improved structure obtained thereby |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100341142C (en) | 2007-10-03 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105185913A (en) | Large-area perovskite solar cell module and manufacturing method thereof | |
| CN104979477A (en) | Z type serial perovskite solar cell assembly and preparation method therefor | |
| CN107910324A (en) | A kind of modularized encapsulation method based on the two-sided interconnecting silicon carbide MOS device of nano mattisolda | |
| CN200965886Y (en) | LED light source package structure for low temperature co-fired ceramic with thermo separation design | |
| CN101877282B (en) | Dye-sensitized solar cell module and preparation method thereof | |
| JP5964751B2 (en) | Photovoltaic battery conductor having two parts, a high temperature printed part and a low temperature printed part | |
| CN205016565U (en) | Large tracts of land perovskite solar battery subassembly | |
| CN100341142C (en) | Power semiconductor composed by duplex-metal and china and its manufacturing method | |
| CN203521463U (en) | High-thermal conductivity LED-COB packaging substrate | |
| Li et al. | Improved electrical performance of low-temperature-cured silver electrode for silicon heterojunction solar cells | |
| CN110620094A (en) | Packaging structure and packaging process of power semiconductor device | |
| CN105506402A (en) | Electronic packaging material | |
| CN204216071U (en) | A kind of LED-COB base plate for packaging of high heat conduction | |
| CN201022077Y (en) | Silicon underling plane LED integration chip | |
| CN203859122U (en) | All-back contact solar cell electrode | |
| KR102106269B1 (en) | Generating apparatus including organic thermoelectric device | |
| US7446401B2 (en) | Structure of power semiconductor with twin metal and ceramic plates | |
| CN1866513A (en) | Packaging structure with mixed circuitry and composite substrate | |
| CN108417545A (en) | A kind of power device and preparation method thereof | |
| CN101071830A (en) | Method for preparing dye sensitized solar cel electrode | |
| CN202308070U (en) | Light-emitting diode (LED) device with heat conductivity, heat dissipation, insulation and pressure resistance | |
| CN210575922U (en) | Packaging structure of power semiconductor device | |
| CN204303868U (en) | Improve the light emitting semiconductor device of heat radiation and three-dimensional LED light source | |
| CN115020523B (en) | Solar cell unit, preparation method thereof and solar cell module | |
| CN203722918U (en) | Aluminum base circuit board and fully packaged electronic component |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20071003 Termination date: 20180806 |