CN1728223B - 显示设备驱动电路 - Google Patents

显示设备驱动电路 Download PDF

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CN1728223B
CN1728223B CN2005100875697A CN200510087569A CN1728223B CN 1728223 B CN1728223 B CN 1728223B CN 2005100875697 A CN2005100875697 A CN 2005100875697A CN 200510087569 A CN200510087569 A CN 200510087569A CN 1728223 B CN1728223 B CN 1728223B
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driving circuit
signal
shift register
token
output terminal
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CN1728223A (zh
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托马斯·施万恩伯格
海因里希·谢曼
西洛·马克斯
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InterDigital CE Patent Holdings SAS
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Thomson Licensing SAS
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
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    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
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    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
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    • G09G2310/0264—Details of driving circuits
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Abstract

本发明提供了一种驱动电路，用于带有以行和/或列布置的显示元件的显示器，该驱动电路具有令牌通过其移位的移位寄存器。该移位寄存器的并行输出端被锁存并且其依照令牌使能开关单元。将控制信号提供给控制输出信号的脉冲宽度和/或信号形状的开关单元。缓存器输出信号到所连接的显示器。独立缓存器或缓存器组连接到不同的电源电压。移位寄存器可以具有多于一个的输入端从而允许使用仅仅一个时钟周期并行地移位令牌到(例如)每第二个输出端。而且，提供输入端用于倒置令牌的行进方向、倒置输出的信号的形状或将所有的输出端切换到预定的状态。

Description

显示设备驱动电路
技术领域
本发明涉及一种用于显示设备(具体涉及带有以行和/或列排列的显示元件的显示设备)的驱动电路。根据本发明的显示设备是(比如)使用有机发光二极管的设备，经常被缩写为OLED或LCD设备。本驱动电路特别适合在有源矩阵显示器中使用。
背景技术
有源矩阵显示器具有与显示元件关联的开关元件或其他控制元件。使用驱动电路来选择显示器的行或列，从而能够对与显示元件关联的控制元件进行寻址。一旦寻址了显示元件，可将电压或电流施加于控制元件以将显示元件设置到期望的状态。但是，对不同类型的显示元件需要不同驱动方式。而且，期望可以驱动分屏(split screen)应用。再进一步，某些显示设备可能需要在与单个显示元件的控制元件连接的不同控制线上存在不同的电压电平。因此，期望使用适合驱动分屏应用或适合在不同控制线上提供不同电压电平的驱动电路。
发明内容
本发明驱动电路包括具有串行输入端和并行输出端的移位寄存器。将被称为令牌的比特模式输入并且从输出端送出以在每个时钟周期进行输出。如果输入由单个比特表示的令牌，则在一个时钟周期期间在每个输出端将存在逻辑高电平。每个时钟周期都将显示逻辑高电平的输出移位。将锁存电路连接到每个输出端。该锁存电路锁存令牌。开关单元连接到锁存电路的输出端。由锁存在锁存电路中的逻辑信号分别使能或禁止开关单元。将至少一个第一控制信号提供给开关单元。当使能开关单元时，第一控制信号控制开关单元的输出信号。上述的控制开关单元的输出信号包括对输出脉冲的调制以及上升和/或下降沿的成形。
在本发明驱动电路的开发例中，将缓存器电路连接到开关单元的输出端。该缓存器电路连接到电源电压。不同开关单元的缓存器电路可以连接到不同的电源电压。在本发明驱动电路的一个实施例中，每个第二缓存器电路连接到与其他缓存器电路的电源电压不同的电源电压。这有利地允许对显示设备的控制，该控制需要两条控制线来选择显示元件。因为用于选择显示元件的两条控制线不需要相同的电压，所以通过提供在每种情况下所需要的控制电压可以显著地减少驱动电路中的功率损耗。
在本发明的另一个实施例中，移位寄存器具有第一和第二输入端。在每个时钟周期将施加于第一输入端的令牌移位成该移位寄存器的每第二个输出。即该令牌顺序出现在第一、第三、第五输出端等等。提供到移位寄存器第二输入端的令牌将顺序地出现在第二、第四、第六输出端等等。以适当的方式将令牌施加于移位寄存器的输入端允许以所要求的顺序容易地选择具有两条控制线的显示元件的控制线。同时，可以只使用一个独立的时钟周期对两条并行控制线进行逐行的选择。还将这种控制模式称为双扫描模式。而且，驱动电路使将完整的图像帧分为两个场的隔行(interlaced)显示模式得以简单实现。每个场包括显示线的视频信息。奇数场包括具有奇数线号码的所有线，而偶数场包括具有偶数线号码的所有线。用于隔行显示的令牌进入到移位寄存器的第一输入端并且每个时钟周期都被移位两个位置，即令牌在奇数输出端出现。在该令牌退出移位寄存器后，其被重新输入到移位寄存器的第二输入端，再于每个时钟周期被移位两个位置，即令牌出现在具有偶数号码的输出端。
在本发明驱动电路的另一个实施例中，使用第一和第二输入端来控制分屏应用。由输入于第一输入端的令牌选择的输出端控制第一显示或显示器的第一部分，而输入于移位寄存器的第二输入端的令牌控制用于第二显示或显示器的第二部分的输出端。
在本发明驱动电路的开发例中提供了用于倒置令牌行进方向的输入端。
在本发明驱动电路的另一个开发例中，可以将驱动电路的所有输出端设置为通过对应地施加信号于对应的输入端而激活的预定状态。这有利地允许(比如为测试目的)接通显示器中的所有显示元件。
在本发明驱动电路的再一个开发例中，提供用于倒置输出信号的输入端。这允许为需要倒置驱动方案的显示器使用所建立的驱动方案。
可以在单扫描和双扫描模式间进行切换就减少了电路的成本以及所需的布线(wiring)。
附图说明
现在参照附图来说明本发明。在附图中：
图1示出了根据本发明的驱动电路的方框图；
图2示出了根据本发明的开关单元；
图3示出了本发明开关单元的细节；
图4示出了相对于时钟信号的所述驱动电路的所选择的输出端的输出信号；
图5a示出了本发明驱动电路的方框示意图；
图5b示出了在第一操作模式中经过所述驱动电路的信号路径；
图5c示出了在第二操作模式中经过所述驱动电路的信号路径；
图5d示出了在第三操作模式中经过所述驱动电路的信号路径；
图5e示出了在第四操作模式中经过所述驱动电路的信号路径；
图6示出了发明的驱动电路和所连接的需要两个驱动信号的显示元件的细节；以及
图7示出了图5的不同控制线所需的不同电源电压。
在附图中用相同的标号来表示相同或类似的元件。
具体实施方式
图1示出了本发明驱动电路100的方框图。驱动电路100包括移位寄存器200、锁存电路300、开关单元400和缓存器500。移位寄存器200是带有n个并行输出端的串行输出n比特移位寄存器。因此，提供了n个锁存电路300、开关单元400和缓存器500。相应地该驱动电路100的输出端具有n条输出线。
图2示出了开关单元400的方框图。开关单元400具有被提供有信号LS、CS1、CS2、ALL_ON和POL_REV的核心电路401。该开关核心401还包括输出端OUT。信号LS是从锁存电路300来的使能信号。信号CS1和CS2用于控制输出信号的脉冲宽度和/或脉冲形状。控制信号CS1和CS2还可控制输出信号OUT的最大和最小电压。并行地将信号ALL_ON和POL_REV提供给所有开关单元。与其他信号相反，信号ALL_ON将独立于从锁存电路来的使能信号LS而使得输出信号为最大电压。这就为校准或测试目的而允许接通所有显示元件，而不用为这个目的施加专用的令牌给移位寄存器。因为必须通过对应数目的时钟周期才能将适当的令牌传递到移位寄存器的所有输出端，所以相比于使用ALL_ON信号，使用专用的令牌是一个较慢的过程。所有显示元件的立即接通减少了因为漏电流而引起的亮度变化，其影响存储在信号存储装置中的信号。POL_REV信号确定使用ALL_ON信号所强制的输出信号是为最大还是最小电压。而且，可以在正常操作期间使用POL_REV信号倒置输出信号，因此允许使用n型或p型显示元件。n型或p型显示元件使用的开关类型是不同的，即开关的控制信号极性不同。
图3示出了开关核心401的细节。使能信号LS控制两个开关402和403。以交替接通方式来设计开关，即当开关402导通时开关403不导通并且反之亦然。当开关402导通时，将出现在开关402的输入端的控制信号CS1传送到开关核心401的输出端。当开关403导通时，将出现在开关403的输入端的控制信号CS2传送到开关核心401的输出端。
图4示例地分别示出相邻开关单元的选择输出和时钟信号CLK以及控制信号CS1和CS2。控制信号CS1和CS2与时钟信号CLK同步，但是在占空比和脉冲宽度或形状方面是自由的。在第一时钟周期C1期间，通过移位寄存器所移位的对应令牌影响锁存信号LS[m]以表现为(assume)逻辑高电平。当信号LS[m]为逻辑高时施加控制信号CS1。输出信号OUT[m]是锁存信号LS[m]和控制信号CS1进行逻辑与运算的结果。对于完整的驱动序列控制信号CS2的状态为低。因此，当锁存信号LS[m]为逻辑低时将控制信号CS2施加于输出端OUT[m]。在随后的时钟周期c2，将令牌传递到移位寄存器的下个输出端。因此，锁存信号LS[m+1]具有逻辑高电平。输出信号OUT[m+1]为控制信号CS1和锁存信号LS[m+1]的逻辑与组合的结果。该输出信号依赖于控制信号CS1和CS2。如果控制信号CS1具有梯形形状，则对应的输出信号也具有相同的梯形形状。这允许对输出信号的形状控制不仅是对电平而且是对上升和/或下降沿、或总过渡过程的控制。对于减小相邻组件或信号线之间的电磁干扰，控制输出信号是非常有用的。在图中，没有考虑在实际应用中可能发生的延迟。
图5a示出了本发明驱动电路的方框示意图。由多路转换器(multiplexer)201表示移位寄存器。根据信号DIR和MODE来选择多路转换器的输入端，在这个示例电路中，其选择移位方向和步宽。在图中，只示出了移位寄存器的7个单元。但是，在本发明驱动电路中的移位寄存器可以有任意数量的单元。多路转换器的输出端连接到锁存电路300。锁存电路300使能或禁止各个开关核心400。开关核心400的输出端连接到构成该驱动电路输出端的各个缓存器500。开关211到214根据它们的状态被用作至移位寄存器的输入端或输出端TI1、TI2、TO1和TO2。需要注意尽管它们被指定，但是输入端和输出端还可以被分别配置为输出端和输入端。
图5b示出了在第一操作模式中令牌的信号路径。令牌在TI1输入。因此开关211建立到多路转换器201的第一输入端的连接。粗虚线示出了信号路径。选择信号DIR和MODE从而选择所有多路转换器的第一输入端。这样，在每个时钟周期，将令牌移位到该移位寄存器的下个单元。最后，在输出端TO1该令牌退出移位寄存器。因此，开关214将锁存电路300的输出端连接到输出端。
图5c示出了在第二操作模式中令牌的路径。令牌再次于输入端TI1输入。第一多路转换器201的第一和第二输入端互相连接。从锁存电路300的输出端到下个多路转换器的第一输入端和在线路中随后第二个多路转换器的第二输入端建立连接。选择信号DIR和MODE从而选择所有多路转换器的第二输入端。这样在每个时钟周期令牌都通过移位寄存器的每第二个单元行进。最终，令牌在输出端TO2退出。对应地对开关213进行开关动作。
图5d示出了在第三种操作模式中令牌的信号路径。这次令牌在输入端TO1输入。对应地开关214进行开关动作。选择信号DIR和MODE从而选择每个多路转换器的第四个输入端。各个锁存电路300的每个输出端连接到在前的多路转换器的第四输入端和线路中在前的第二多路转换器的第三输入端。在这种情况下，在每个时钟周期令牌行进到移位寄存器的在前单元。
图5e示出了在第四种操作模式中令牌的信号路径。令牌再次输入到输入端TO1。对应地开关214进行开关动作。选择信号DIR和MODE从而选择每个多路转换器的第三输入端。多路转换器的第三和第四输入端互相连接。在每个时钟周期通过移位寄存器的每第二个单元令牌从右向左行进。
在上述第二和第四操作模式中省略了访问所述单元，可以在各个输入端TI2和TO2输入令牌。必须对应地设置开关212和213。
依照驱动电路所期望的输出端数量和开关寄存器的单元的数量，可以级联多个移位寄存器。
对于单扫描显示器和显示元件，根据显示器类型，可以将用于选择行或列的选择脉冲或令牌输入到两个独立输入管脚TI1和TI2。将令牌发送到移位寄存器并且令牌逐周期地逐一选择输出端，直到其出现在输出管脚TO1或TO2为止。控制信号DIR确定双向令牌传递的方向。可控制行的数量可以变化。
输入控制信号MODE还允许选择将被并行发送到驱动电路的一个或多个令牌。在这种情况下，依照控制信号DIR，第一令牌输入于TI1并且在TO2退出，或反之亦然。依照控制信号DIR，第二令牌输入于TI2并且在TO1退出。两个令牌的令牌传递方向是相同的，但也可以选择。使用这个功能，可以影响双扫描模式，允许用两个扫描输入来驱动显示元件或划分屏幕应用。每个令牌出现在每第二输出端。比如，在带有n个对应锁存器300、开关单元400和缓存器500的n比特移位寄存器布置中，令牌1选择行1、3、5等，而令牌2选择行2、4、6等。
图6结合显示元件示出了发明驱动电路的细节。显示元件需要必须以预定的顺序被激活的两条控制线。显示元件是(例如)OLED元件，其具有与发光OLED 603关联的开关装置602和电流控制装置601。显示元件是电流控制类型。电流控制类型显示元件需要施加于电流控制装置601以进行操作所必须的电流。提供了存储装置604，其保持编程的电流恒定直到随后的编程周期为止。在电流编程期间，显示元件必须不是激活的。因此在电流编程期间，选择锁存信号LS[m+1]从而输出信号OUT[m+1]断开开关602。一旦断开开关602，锁存信号LS[m]激活开关单元400[m]。施加控制信号CS1和CS2从而输出信号OUT[m]激活开关606和607。通过激活电流源608编程控制电流。所需要的电流从电源VDD流经电流控制装置601和开关607。同时，在电流控制装置601的控制端上建立控制电压。在存储装置604中存储控制电压。当电流已经稳定(settled)时，断开开关606和607并且闭合开关602。存储装置604保持维持编程的电流所需的电势直到随后的编程周期为止。现在编程的电流流过发光元件603。由通过移位寄存器移位的各个令牌控制信号OUT[m]和OUT[m+1]。控制信号CS1和CS2传递到由令牌选择的各个输出端。
通过为输出缓存器500增加第二电源而减少了在这个所谓双扫描模式中的功率消耗。在这个例子中出现了三个不同的电源电压：
VDD-VSS：显示元件的电源电压
VCC1-GND1：开关606、607的电源电压
VCC2-GND2：开关602的电源电压
对于缓存器输出端OUT[m]，电源电压必须足够高以确保在各个操作模式中将开关606、607关断。通常使用场效应晶体管(或FET)作为开关。因此VCC1的最小电压为VDD+VX，其中VX是将晶体管关断所需的FET的栅源极电压。在另一方面，必须将开关606、607导通以存储代表存储装置604中的视频数据内容的信号。因此，GND1的最大电压为VDD-(2*VGS)-VDS，其中VDS是当FET导通(即饱和模式)时横跨在FET的漏极端子和源极端子之间的电压。
对于缓存器输出端OUT[m+1]，电源电压必须足够高以确保在编程模式中将开关602关断。因此VCC2的最小电压为VDD-VGS+VX-VDS。GND2的最大电压确保开关602在操作VDD-(2*VGS)-VDS期间是完全断开的。在上述的例子中，假设缓存器的输出端能够到达电源电压。在这种情况下，缓存器没有轨到轨输出端，则必须考虑在缓存器中的电压降。
在VDD是+21V、VX是+3V、VDS(sat)是1V并且VGS是10V的例子中，其中晶体管在饱和模式中操作。因此VCC1至少是24V，GND1必须低于或等于0V，VCC2必须是至少13V，并且GND2必须低于或等于0V。非常明显VCC1几乎是VCC2的两倍。因此，VDD、VCC1和VCC2的独立电源减少了总功率消耗。
图7示出了驱动图6的电路的不同控制线所需的不同电源电压。由电压VEE和地电势VSS定义了数字电路的电源电压范围。数字电源电压VEE通常的范围是3到5伏特。但是，其他电压也是可能的。显示元件的电源电压范围是从地VSS到电源电压VDD。通常，电源电压VDD比数字电路VEE的电源电压要高得多。输出线OUT[m]的电源电压范围依赖于哪一条线连接到显示元件的哪一个开关。参照图6中使用的标号，驱动器所需的、激活开关602的电源电压VCC2必须比数字电路的电源电压高。但是，其可以低于显示元件的电源电压VDD。而且，低电势GND2必须低于显示器和数字电路的地电势VSS。但是，开关606和607进行开关动作所需的电源电压范围与其他电源电压范围不同。所需的电源电压VCC1高于显示元件的电源电压VDD，而低电势GND1低于低电势GND2。能够将不同的电源电压提供给独立输出端或输出端组的驱动器500使得驱动器中的散耗(dissipated)功率减小。
在将驱动电路集成到集成电路(IC)的情况下，可以从外部施加各种电源电压到IC，或者可以由芯片上(on-chip)的DC到DC转换器产生各种电源电压。在组件成本方面后者更加有效并且可以提供改进的噪声隔离。

Claims (10)

1.一种驱动电路(100)，用于带有以行和/或列排列的显示元件的显示器，其中提供移位寄存器(200)用于选择单个显示元件或显示元件组，并且其中提供缓存器电路(500)用于缓存驱动信号，其特征在于用于第一和第二缓存器电路(500)的电源电压是独立可选择的。
2.根据权利要求1所述的驱动电路(100)，其特征在于开关单元(400)连接到缓存器电路(500)的输入端，其中所述开关单元(400)连接到至少一个第一控制信号，其中所述开关单元(400)的输出信号依赖于所述至少一个第一控制信号。
3.根据权利要求2所述的驱动电路(100)，其特征在于，通过所述至少一个第一控制信号可控制在所述开关单元(400)的输出端上存在的信号的形状和/或斜率。
4.根据权利要求1所述的驱动电路(100)，其特征在于锁存电路(300)连接到所述移位寄存器(200)的输出端。
5.根据权利要求2所述的驱动电路(100)，其特征在于将第二控制信号(ALL_ON)施加于所述开关单元(400)，其中所述第二控制信号(ALL_ON)将所述开关单元(400)的输出端设置为预定的状态。
6.根据权利要求2所述的驱动电路(100)，其特征在于将第三控制信号(POL_REV)施加于所述开关单元(400)，其中所述第三控制信号(POL_REV)倒置在所述开关单元(400)的输出端存在的信号。
7.根据权利要求1所述的驱动电路(100)，其特征在于所述移位寄存器(200)具有第一串行输入端(TI1)和并行输出端，多路转换器(201)带有所述移位寄存器(200)的每个单元的各个内部并行输入端，其中将所述移位寄存器(200)的相邻单元的输出信号提供给所述移位寄存器(200)的各个相邻内部并行输入端，并且由各个控制信号(DIR、MODE)控制多路转换器(201)。
8.根据权利要求7所述的驱动电路(100)，其特征在于所述移位寄存器(200)具有用于输入令牌的第二串行输入端(TI2)和/或用于输出令牌的第二和/或第一串行输出端(TO2、TO1)。
9.根据权利要求8所述的驱动电路(100)，其特征在于在每个时钟周期，在第一输入端(TI1)输入的第一令牌被移位到所述移位寄存器(200)的各个第一单元，并且在第二输入端(TI2)输入的第二令牌被移位到所述移位寄存器(200)的各个第二单元。
10.根据权利要求9所述的驱动电路(100)，其特征在于可以由所述控制信号(DIR、MODE)控制所述第一令牌和第二令牌的步宽和行进方向。
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CN1728223A (zh) 2006-02-01
KR20060046788A (ko) 2006-05-17

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