CN1715941A - Chip needle detector - Google Patents
Chip needle detector Download PDFInfo
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- CN1715941A CN1715941A CN 200410050062 CN200410050062A CN1715941A CN 1715941 A CN1715941 A CN 1715941A CN 200410050062 CN200410050062 CN 200410050062 CN 200410050062 A CN200410050062 A CN 200410050062A CN 1715941 A CN1715941 A CN 1715941A
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- contact mat
- substrate
- liquid crystal
- chip
- syndeton
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- 239000004973 liquid crystal related substance Substances 0.000 claims abstract description 90
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 77
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 77
- 239000010703 silicon Substances 0.000 claims abstract description 77
- 239000000523 sample Substances 0.000 claims abstract description 52
- 239000004065 semiconductor Substances 0.000 claims abstract description 32
- 239000000758 substrate Substances 0.000 claims description 92
- 238000005538 encapsulation Methods 0.000 claims description 42
- 238000012360 testing method Methods 0.000 claims description 28
- 238000004519 manufacturing process Methods 0.000 abstract 1
- 238000000034 method Methods 0.000 description 27
- 239000011521 glass Substances 0.000 description 17
- 229920002120 photoresistant polymer Polymers 0.000 description 5
- 239000012774 insulation material Substances 0.000 description 4
- 238000012545 processing Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000002950 deficient Effects 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 238000002407 reforming Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910004205 SiNX Inorganic materials 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000001413 cellular effect Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
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- Measuring Leads Or Probes (AREA)
Abstract
The chip needle detector is one auxiliary device for detecting unpacked semiconductor chip to raise the qualified packed product rate in liquid crystal display panel manufacture. It includes bearing seat, tray set on the surface of the bearing seat, the second connection structure and probe clamp over the tray. The tray includes at least one notch for bearing the unpacked silicon liquid crystal display panel and one connection structure on one side of the notch. The second connection structure includes the first part for contacting electrically with the first contact pad and the second part connected electrically to the first part. The probe clamp includes at least two probes for contacting electrically the second contact pad and connecting the second part of the connection structure.
Description
Technical field
The invention belongs to and make display panels servicing unit, particularly a kind of Chip needle detector.
Background technology
(liquid crystal on silicon LCOS) not only has technical advantages such as little picture element size, high brightness and high-res to liquid crystal silicon wafer display panel, also has advantages such as simple, the with low cost and volume of processing procedure is little.Therefore, liquid crystal silicon wafer display panel has been widely used in the portable person-to-person communication audio-visual devices of hand camera, WAP cellular phone etc. and the audio-visual equipment of projection TV and multimedia projector etc.
As shown in Figure 1 and Figure 2, when known making liquid crystal silicon wafer display panel is made, at first, provide semiconductor substrate 10; And semiconductor substrate 10 comprises several chips 14, and each chip 14 all comprises the active-matrix circuit (active matrix array, show) of the pixel circuit that is used as liquid crystal silicon wafer display panel 16 and be used for liquid crystal silicon wafer display panel 16 is electrically connected to several weld pads 26 of external circuit.Then, form alignment film 20a in the surface of semiconductor substrate 10; Form gasket seal patterns 22 in the neighboring area of each chip 14 more subsequently.
Then, provide and semiconductor substrate 10 parallel relative glass substrates 12, and on the surface of transparency carrier 12, form conductive light resistance layer 18 and alignment film 20b in regular turn.Conductive light resistance layer 18 is used as common electrode and colored filter, and alignment film 20a, 20b all are used for adjusting the orientation of liquid crystal molecule, and it comprises polyimide (polyimide) resin, silicon dioxide (SiO
2) or silicon nitride materials such as (SiNx).Then, carry out pressure programming (assembly process), so that glass substrate 12 binds to semiconductor substrate 10 via each gasket seal patterns 22, again along the Cutting Road 11 on Cutting Road on the glass substrate 12 13 and the semiconductor substrate 10, glass substrate 12 and semiconductor substrate 10 are cut into each liquid crystal silicon wafer display panel 16 subsequently.Irritate brilliant processing procedure afterwards, liquid crystal molecule is poured between glass substrate 12 and the semiconductor substrate 10,, thereby finish each liquid crystal silicon wafer display panel 16 with formation layer of liquid crystal molecule 24 between glass substrate 12 and semiconductor substrate 10.At last, carry out encapsulation procedure, so that each liquid crystal silicon wafer display panel 16 is packaged into the required display element of various electronic installations.
It should be noted that; owing to being formed at conductive light resistance layer 18 on the glass substrate 12 and binding to the process rate of semiconductor substrate 10 glass substrate 12 low; therefore, regular meeting produces defective during liquid crystal silicon wafer display panel 16, thereby reduces display quality or can't display frame.Yet as shown in Figure 2, for the display panels 16 of not encapsulation, the conductive light resistance layer 18 of glass substrate 12 is positioned at two opposite sides with the contact mat 26 of semiconductor substrate 10, and the design of at present general pin survey machine (prober) can't be carried out testing electrical property to this kind element, therefore these just produce the liquid crystal silicon wafer display panel 16 of defective before encapsulation, usually after encapsulation is finished, just can be detected, thereby increase packaging cost and reduce the encapsulation quality.Hereat, seeking to can be used to test the not pin survey machine of the liquid crystal silicon wafer display panel 16 of encapsulation, is the important key that addresses the above problem.
Summary of the invention
The purpose of this invention is to provide and a kind ofly can check encapsulated semiconductor quality not, reduce the encapsulation procedure cost, promote the Chip needle detector of encapsulation procedure yield.
The present invention is used for testing at least one liquid crystal silicon wafer display panel that comprises first and second substrate that is respectively equipped with first and second contact mat and be arranged at the layer of liquid crystal molecule between first and second substrate; It comprises load bearing seat, be arranged at the lip-deep pallet of load bearing seat and be installed in the probe of pallet top; Pallet comprise be used for bearing at least one not the encapsulation liquid crystal silicon wafer display panel at least one groove and be installed in the conductive syndeton of groove one side; Second syndeton comprises the first that is used for first contact mat electrically contacts and reaches the second portion that is electrically connected with first; Probe is arranged on the pallet, and it comprises at least two probes in order to electrical contact second contact mat and syndeton second portion.
Wherein:
Liquid crystal silicon wafer display panel first substrate and second substrate portion are overlapping, and first contact mat be positioned at not with the first overlapping substrate surface of second substrate on; Second contact mat is positioned at second not overlapping with first substrate substrate surface.
Second substrate is a semiconductor substrate; First substrate is a transparency carrier.
First contact mat that is positioned on first substrate is the conductive light resistance layer; Second contact mat that is positioned on second substrate is a weld pad.
First substrate is a semiconductor substrate; Second substrate is a transparency carrier.
First contact mat that is positioned on first substrate is a weld pad; Second contact mat that is positioned on second substrate is the conductive light resistance layer.
The second portion of syndeton is a contact mat.
The first of syndeton is the electric conductivity anchor clamps.
The first of syndeton comprises at least one electric conductivity probe.
Syndeton first is the contact mat that is arranged at tray surface.
Place a not liquid crystal silicon wafer display panel of encapsulation in each groove of pallet.
Place several liquid crystal silicon wafer display panels that do not encapsulate that link to each other in each groove of pallet.
A kind of Chip needle detector, it is used for testing the chip that comprises at least one first contact mat and at least one second contact mat; It comprises load bearing seat, be arranged at the lip-deep pallet of load bearing seat and be installed in the probe of pallet top; Pallet comprise be used at least one unpackaged chip of bearing at least one groove and be installed in the conductive syndeton of groove one side; Syndeton comprises the first that is used for first contact mat electrically contacts and reaches the second portion that is electrically connected with first; Probe is arranged on the pallet, and it comprises at least two probes in order to electrical contact second contact mat and syndeton second portion.
Feng Zhuan chip is not the liquid crystal silicon wafer display panel that does not encapsulate.
Not Feng Zhuan liquid crystal silicon wafer display panel comprise transparency carrier, and the partly overlapping semiconductor substrate of transparency carrier, be arranged at layer of liquid crystal molecule between transparency carrier and the semiconductor substrate, be located on the transparency carrier surface and part be positioned at transparency carrier and liquid crystal molecule between the conductive light resistance layer and at least one be located at not with the overlapping semiconductor substrate surface of transparency carrier on weld pad.
First contact mat is the conductive light resistance layer; Second contact mat is a weld pad.
First contact mat is a weld pad; Second contact mat is the conductive light resistance layer.
The second portion of syndeton is the contact mat that is arranged on the tray surface.
The first that is electrically connected with second portion is the electric conductivity anchor clamps.
The first that is electrically connected with second portion comprises at least one electric conductivity probe.
The first that is electrically connected with second portion is the contact mat that is arranged on the tray surface.
Place a not chip of encapsulation in each groove of pallet.
Place several chips that do not encapsulate that link to each other in each groove of pallet.
Because the present invention comprises load bearing seat, be arranged at the lip-deep pallet of load bearing seat and be installed in the probe of pallet top; Pallet comprise be used for bearing at least one not the encapsulation liquid crystal silicon wafer display panel at least one groove and be installed in the conductive syndeton of groove one side; Second syndeton comprises the first that is used for first contact mat electrically contacts and reaches the second portion that is electrically connected with first; Probe is arranged on the pallet, and it comprises at least two probes in order to electrical contact second contact mat and syndeton second portion.Compared to known techniques, the present invention has the pallet that includes groove and be located at the syndeton of groove one side, and, because each probe on the probe can be via syndeton, and electrically be contacted with on the liquid crystal silicon wafer display panel of not encapsulation, therefore, the present invention can carry out testing electrical property to the liquid crystal silicon wafer display panel of not encapsulation, be that the present invention can check the not display quality of the liquid crystal silicon wafer display panel of encapsulation earlier, and then differentiate liquid crystal silicon wafer display panel whether can be in order to display frame, if liquid crystal silicon wafer display panel can then be proceeded follow-up encapsulation procedure in order to display frame; But, test result can't be used for display frame if showing liquid crystal silicon wafer display panel, then directly scrap the liquid crystal silicon wafer display panel or the processing procedure of reforming, can not only check not encapsulated semiconductor quality, and reduce encapsulation procedure cost, lifting encapsulation procedure yield, thereby reach purpose of the present invention.
Description of drawings
Fig. 1, be the method synoptic diagram of known making liquid crystal silicon wafer display panel.
Fig. 2, be not the encapsulation liquid crystal silicon wafer display panel structure diagrammatic side view.
Fig. 3, for partial structurtes synoptic diagram of the present invention.
Fig. 4, for support holder structure diagrammatic top view of the present invention.
Fig. 5, for user mode synoptic diagram of the present invention.
Fig. 6, for support holder structure diagrammatic top view of the present invention (syndeton first comprises at least one electric conductivity probe).
Fig. 7, for support holder structure diagrammatic top view of the present invention (syndeton first is a contact mat).
Fig. 8, be support holder structure diagrammatic top view of the present invention (comprise respectively bearing one not several grooves of encapsulated liquid crystal silicon wafer display panel).
Fig. 9, be support holder structure diagrammatic top view of the present invention (comprise respectively bearing several not several grooves of encapsulated liquid crystal silicon wafer display panel).
Figure 10, be not liquid crystal silicon wafer display panel structure diagrammatic top view of encapsulation that several link to each other.
Embodiment
Encapsulated liquid crystal silicon wafer display panel 16 does not comprise first substrate 12, second substrate 10 and is arranged at layer of liquid crystal molecule 24 between first and second substrate 12,10.First substrate 12 is a transparency carrier, and which is provided with is the conductive light resistance layer 18 of first contact mat.Second substrate 10 is a semiconductor substrate, which is provided with second contact mat 26 into weld pad.First and second substrate 12,10 is overlapped.First contact mat is positioned at not first substrate 12 surfaces overlapping with second substrate 10.Second contact mat 26 is positioned at not second substrate 10 surfaces overlapping with first substrate 10.
Not Feng Zhuan liquid crystal silicon wafer display panel 16 comprise transparency carrier 12, and transparency carrier 12 partly overlapping semiconductor substrates 10, be arranged at layer of liquid crystal molecule 24 between transparency carrier 12 and the semiconductor substrate 10, be located at that transparency carrier 12 surfaces are gone up and part between transparency carrier 12 and layer of liquid crystal molecule 24 conductive light resistance layer 18 and at least onely be located at not the semiconductor substrate 10 lip-deep weld pads 26 overlapping with transparency carrier 12.
As shown in Figure 3, Chip needle detector 30 of the present invention comprise cavity (not being shown in Fig. 3), be arranged at cavity interior load bearing seat (chuck) 32, be arranged at load bearing seat 32 lip-deep pallets (tray) 34, be installed in the probe (probe card) 36 of pallet 34 tops and be used for controlling the control structure 38 of probe 36.
As Fig. 4, shown in Figure 5, pallet 34 comprises groove 40, is covered in the insulation material layer 41 of groove 40 inwalls and is installed in the conductive syndeton 42 of groove 40 1 sides.
Groove 40 is positioned at the central part of pallet 34, and is used for the liquid crystal silicon wafer display panel 16 that bearing do not encapsulate.
The second portion 422 that syndeton 42 has first 421 and is electrically connected with first 421.In most preferred embodiment of the present invention, first 421 is electric conductivity anchor clamps (conductive clamp), and it is by the splendid metal of electric conductivity, and for example gold constitutes.Second portion 422 is contact mat (contact pad), and it is made of the copper metal and via latch-up structure 46, for example screw is fixed on the pallet 34.
41 of insulation material layers are made of stupalith.In addition, pallet 34 comprises 44 and two holes 48 that are positioned at groove 40 bottoms of three position guiding pins (guide pin) in addition.
Position guiding pin 44 is used for pallet 34 is fixed on the surface of load bearing seat 32 removably.
Hole 48 runs through pallet 34 and the surface of sensible load bearing seat 32.
Therefore in the testing electrical property process, the vacuum environment in the Chip needle detector 30 can closely attract pallet 34 and liquid crystal silicon wafer display panel 16 and be fixed on load bearing seat 32 surfaces, comes off in the testing electrical property process to avoid liquid crystal silicon wafer display panel 16.
As shown in Figure 5, when Chip needle detector 30 desires to carry out testing electrical property in the liquid crystal silicon wafer display panel 16 of not encapsulation, the liquid crystal silicon wafer display panel 16 that at first utilizes machine or manually will not encapsulate is packed in the groove 40 of pallet 34, and make electric conductivity anchor clamps 421 clamp glass substrate 12, and allow electric conductivity anchor clamps 421 electrically contact the electric conductivity photoresist layer 18 on glass substrate 12 surfaces; Pallet 34 is fixed on load bearing seat 32 surfaces subsequently; Then, carry out chip alignment procedures (wafer alignment step), utilize the position of aforesaid location structure mensuration and mobile load bearing seat 32 and pallet 34, so that the contact mat 26 of semiconductor substrate 10 is positioned at correct position to be measured, should be noted that, contact mat 26 both sides that are used to aim at must have identical pattern, just can guarantee the precision of this chip alignment procedures.Subsequently, carry out probe alignment step (needle alignment step), to calibrate the position of each probe 361, treat that 361 calibrations of each probe are finished after, electrically contact contact mats 26 and syndeton 42 are the second portion 422 of contact mat respectively with each probe 361 again.At last, control structure 38 is to probe 36 input presumptive test formulas (test program), make probe 36 utilize each probe 361 that electric signal is inputed to contact mat 26 and syndeton 42 is the second portion 422 of contact mat according to the presumptive test formula, and by syndeton 42 for the second portion 422 of contact mat with electric signal via be passed to electric conductivity photoresist layer 18 for the first 421 of electric conductivity anchor clamps, to carry out the testing electrical property of liquid crystal silicon wafer display panel 16, the result of testing electrical property then is back to control structure 38 via each probe 361 again, and by the result of control structure 38 Treatment Analysis testing electrical properties.
Compared to general chip testing machine, chip testing machine 30 of the present invention has dismountable pallet 34, and pallet 34 is provided with groove 40 and syndeton 42.Syndeton 42 is included as electric conductivity anchor clamps first 421 and is the second portion 422 of contact mat.It should be noted that, because syndeton 42 is the second portion 422 of contact mat for what the first 421 of electric conductivity anchor clamps was electrically connected to pallet 34 surfaces, and can electrically contact the electric conductivity photoresist layer 18 on glass substrate 12 surfaces, therefore each probe 361 on the probe 36 can be the second portion 422 of contact mat with syndeton 42 via electrical contact contact mat 26 just, and measured not the electrical performance of the liquid crystal silicon wafer display panel 16 of encapsulation, and then differentiate liquid crystal silicon wafer display panel 16 whether can be in order to display frame, if liquid crystal silicon wafer display panel 16 can then be proceeded follow-up encapsulation procedure in order to display frame; But can't be used for display frame if test result shows liquid crystal silicon wafer display panel 16, then directly scrap liquid crystal silicon wafer display panel 16 or the processing procedure of reforming (rework), so just can reduce the cost of encapsulation procedure, and promote the yields of encapsulation procedure.
In addition, be not the unique embodiment of the present invention as Fig. 3, Fig. 4, pallet 34 shown in Figure 5.
Also can be as shown in Figure 6, pallet 34a includes groove 40, be covered in groove 40 inwall insulation material layer 41 and be installed in groove 40 1 sides and conductive syndeton 42a.
Syndeton 42a comprises the 421a of first, second portion 422a and is electrically connected on the 421a of first and the lead 423 of second portion 422b.
The 421a of first comprises at least one electric conductivity probe.
Second portion 422a is a contact mat.
The electric conductivity probe of the 421a of first can via lead 423 be electrically connected for the second portion 422b of contact mat.And, each electric conductivity probe 421 of the 421a of first is used for electrically contacting the electric conductivity photoresist layer 18 on glass substrate 12 surfaces, therefore each probe 361 on the probe 36 can be the second portion 422a of contact mat via electrical contact contact mat 26 and syndeton 42a just, and is measured the not electrical performance of the liquid crystal silicon wafer display panel 16 of encapsulation.
Also can be as shown in Figure 7, pallet 34b includes groove 40, be covered in groove 40 inwall insulation material layer 41 and be installed in groove 40 1 sides and conductive syndeton 42b.
The second portion 422b that syndeton 42b comprises the 421b of first and is electrically connected second portion 422b and is electrically connected with the 421b of first.
First and second part 421b, 422b are all contact mat.
For the 421b of first of contact mat is used for electrically contacting the electric conductivity photoresist layer 18 on glass substrate 12 surfaces, therefore each probe 361 on the probe 36 can be the second portion 422b of contact mat via electrical contact contact mat 26 and syndeton 42b just, and is measured the not electrical performance of the liquid crystal silicon wafer display panel 16 of encapsulation.
Also can be as shown in Figure 8, pallet 34c comprises in the mode of arranged and is located at several grooves 40 in it and is individually fixed in several conductive syndetons of each groove 40 1 side.It should be noted that, each groove 40 all is used for the not liquid crystal silicon wafer display panel 16 of encapsulation of one of bearing, and each syndeton can be Fig. 3, Fig. 6, any syndeton 42 (42a, 42b) shown in Figure 7, therefore the Chip needle detector 30 of present embodiment can be written into several liquid crystal silicon wafer display panels 16 simultaneously, and then one a pair of each liquid crystal silicon wafer display panel 16 carry out testing electrical property, thus, more can reduce the time of changing pallet.But, what must be careful is that each liquid crystal silicon wafer display panel 16 all must just can utilize probe 36 to carry out testing electrical property, to guarantee the correct position of each liquid crystal silicon wafer display panel 16 through after the chip alignment procedures.
As Fig. 9, shown in Figure 10, pallet 34d includes several parallel groove 40d and is individually fixed in several conductive syndetons 42 of each groove 40d one side.And each groove 40d is used for several not liquid crystal silicon wafer display panels 16 of encapsulation that link to each other of bearing, and each syndeton 42 is included as the first 421 of electric conductivity anchor clamps and is the second portion 422 of contact mat.It should be noted that, because the glass substrate 12 of each the liquid crystal silicon wafer display panel 16 in each groove 40d is connected with each other, as long as think the electric conductivity anchor clamps first 421 clamp the glass substrate 12 of one of them the liquid crystal silicon wafer display panel 16 in each groove 40d, just pallet 34d can be fixed in load bearing seat 32 surfaces then, and each the liquid crystal silicon wafer display panel 16 in each groove 40d is carried out testing electrical property.But, what must be careful is that first liquid crystal silicon wafer display panel 16 in each groove 40d must just can utilize each the liquid crystal silicon wafer display panel 16 in 36 couples of each groove 40d of probe to carry out testing electrical property through after the chip alignment procedures.In the same manner, the Chip needle detector 30 of present embodiment can be written into several liquid crystal silicon wafer display panels 16 simultaneously, and then a pair of each liquid crystal silicon wafer display panel 16 carries out testing electrical property, so, just can reduce the time of changing pallet 34.On the other hand, the first for syndeton 42 can be the electric conductivity anchor clamps, also replaceable one-tenth electric conductivity probe or contact mat.
In addition, in each above-mentioned embodiment, syndeton 42 (42a, 421 (the 421a of first 42b), 421b) electrically contact the conductive light resistance layer 18 of glass substrate 12, yet the present invention is not limited to this, the present invention also can pack liquid crystal silicon wafer display panel 16 in the groove 40 of Chip needle detector 30 of the present invention into inverse manner, so that syndeton 42 (42a, 421 (the 421a of first 42b), 421b) the electrical weld pad 26 on contact semiconductor substrate 10 surfaces, but must allow the 421 (421a of first by the location structure (not shown) this moment, 421b) can accurately aim at each weld pad 26 on semiconductor substrate 10 surfaces.
Compared to known techniques, Chip needle detector 30 of the present invention has dismountable pallet 34 (34a, 34b, 34c, 34d), and pallet 34 (34a, 34b, 34c, 34d) includes groove 40 (40a, 40b, 40c) and be located at the syndeton 42 (42a, 42b) of a side of groove 40 (40a, 40b, 40c).And, because each probe 361 on the probe 36 can be via syndeton 42 (42a, 42b), and electrically be contacted with on the liquid crystal silicon wafer display panel 16 of not encapsulation, therefore, Chip needle detector 30 of the present invention can carry out testing electrical property to the liquid crystal silicon wafer display panel 16 of not encapsulation.In addition, because Chip needle detector 30 can carry out testing electrical property to the liquid crystal silicon wafer display panel 16 of not encapsulation, therefore the present invention can check the not display quality of the liquid crystal silicon wafer display panel 16 of encapsulation earlier, and then carry out encapsulation procedure, thereby can reduce the cost of encapsulation procedure, and promote the yields of encapsulation procedure.
Claims (23)
1, a kind of Chip needle detector, it is used for testing at least one liquid crystal silicon wafer display panel that comprises first and second substrate that is respectively equipped with first and second contact mat and be arranged at the layer of liquid crystal molecule between first and second substrate; It is characterized in that it comprises load bearing seat, is arranged at the lip-deep pallet of load bearing seat and is installed in the probe of pallet top; Pallet comprise be used for bearing at least one not the encapsulation liquid crystal silicon wafer display panel at least one groove and be installed in the conductive syndeton of groove one side; Second syndeton comprises the first that is used for first contact mat electrically contacts and reaches the second portion that is electrically connected with first; Probe is arranged on the pallet, and it comprises at least two probes in order to electrical contact second contact mat and syndeton second portion.
2, Chip needle detector according to claim 1 is characterized in that described liquid crystal silicon wafer display panel first substrate and second substrate portion are overlapping, and first contact mat be positioned at not with the first overlapping substrate surface of second substrate on; Second contact mat is positioned at second not overlapping with first substrate substrate surface.
3, Chip needle detector according to claim 2 is characterized in that described second substrate is a semiconductor substrate; First substrate is a transparency carrier.
4,, it is characterized in that described first contact mat that is positioned on first substrate is the conductive light resistance layer according to claim 2 or 3 described Chip needle detectors; Second contact mat that is positioned on second substrate is a weld pad.
5, Chip needle detector according to claim 2 is characterized in that described first substrate is a semiconductor substrate; Second substrate is a transparency carrier.
6, Chip needle detector according to claim 5 is characterized in that described first contact mat that is positioned on first substrate is a weld pad; Second contact mat that is positioned on second substrate is the conductive light resistance layer.
7, Chip needle detector according to claim 1, the second portion that it is characterized in that described syndeton is a contact mat.
8, according to claim 1 or 7 described Chip needle detectors, the first that it is characterized in that described syndeton is the electric conductivity anchor clamps.
9,, it is characterized in that the first of described syndeton comprises at least one electric conductivity probe according to claim 1 or 7 described Chip needle detectors.
10,, it is characterized in that described syndeton first is the contact mat that is arranged at tray surface according to claim 1 or 7 described Chip needle detectors.
11, Chip needle detector according to claim 1 is characterized in that placing in each groove of described pallet a not liquid crystal silicon wafer display panel of encapsulation.
12, Chip needle detector according to claim 1 is characterized in that placing in each groove of described pallet several liquid crystal silicon wafer display panels that do not encapsulate that link to each other.
13, a kind of Chip needle detector, it is used for testing the chip that comprises at least one first contact mat and at least one second contact mat; It is characterized in that it comprises load bearing seat, is arranged at the lip-deep pallet of load bearing seat and is installed in the probe of pallet top; Pallet comprise be used at least one unpackaged chip of bearing at least one groove and be installed in the conductive syndeton of groove one side; Syndeton comprises the first that is used for first contact mat electrically contacts and reaches the second portion that is electrically connected with first; Probe is arranged on the pallet, and it comprises at least two probes in order to electrical contact second contact mat and syndeton second portion.
14, Chip needle detector according to claim 13, the chip that it is characterized in that described not encapsulation is the liquid crystal silicon wafer display panel that does not encapsulate.
15, Chip needle detector according to claim 14, it is characterized in that the described not liquid crystal silicon wafer display panel of encapsulation comprise transparency carrier, with the partly overlapping semiconductor substrate of transparency carrier, be arranged at layer of liquid crystal molecule between transparency carrier and the semiconductor substrate, be located on the transparency carrier surface and partly be positioned at transparency carrier and liquid crystal molecule between the conductive light resistance layer and at least one be located at not with the overlapping semiconductor substrate surface of transparency carrier on weld pad.
16, Chip needle detector according to claim 15 is characterized in that described first contact mat is the conductive light resistance layer; Second contact mat is a weld pad.
17, Chip needle detector according to claim 15 is characterized in that described first contact mat is a weld pad; Second contact mat is the conductive light resistance layer.
18, Chip needle detector according to claim 15, the second portion that it is characterized in that described syndeton is the contact mat that is arranged on the tray surface.
19, Chip needle detector according to claim 18 is characterized in that the described first that is electrically connected with second portion is the electric conductivity anchor clamps.
20, Chip needle detector according to claim 18 is characterized in that the described first that is electrically connected with second portion comprises at least one electric conductivity probe.
21, Chip needle detector according to claim 18 is characterized in that the described first that is electrically connected with second portion is the contact mat that is arranged on the tray surface.
22, Chip needle detector according to claim 13 is characterized in that placing in described each groove a not chip of encapsulation.
23, Chip needle detector according to claim 13 is characterized in that placing in described each groove several chips that do not encapsulate that link to each other.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB200410050062XA CN100371726C (en) | 2004-06-29 | 2004-06-29 | Chip needle detector |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB200410050062XA CN100371726C (en) | 2004-06-29 | 2004-06-29 | Chip needle detector |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1715941A true CN1715941A (en) | 2006-01-04 |
| CN100371726C CN100371726C (en) | 2008-02-27 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB200410050062XA Expired - Lifetime CN100371726C (en) | 2004-06-29 | 2004-06-29 | Chip needle detector |
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| CN (1) | CN100371726C (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100451742C (en) * | 2007-07-06 | 2009-01-14 | 友达光电股份有限公司 | Liquid crystal panel detecting method and device |
| CN101587850B (en) * | 2008-05-21 | 2011-05-25 | 瑞鼎科技股份有限公司 | Bearing structure and testing device |
| CN101645435B (en) * | 2008-08-04 | 2011-07-27 | 和舰科技(苏州)有限公司 | Probing pad structure and manufacturing method thereof |
| CN106782234A (en) * | 2015-11-24 | 2017-05-31 | 飞腾动力公司 | System and method for promoting the inspection to the device to be tested including multiple panels |
| CN107068024A (en) * | 2017-03-14 | 2017-08-18 | 惠科股份有限公司 | Display device testing method and display device |
| CN109444165A (en) * | 2018-10-29 | 2019-03-08 | 中国电子科技集团公司第十三研究所 | Chip strip microscopic examination fixture |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6115341A (en) * | 1984-07-02 | 1986-01-23 | Canon Inc | Wafer prober |
| KR920022574A (en) * | 1991-05-03 | 1992-12-19 | 김광호 | Chip Life Test Device of Semiconductor Device |
| JPH04364485A (en) * | 1991-06-11 | 1992-12-16 | Mitsubishi Electric Corp | Inspecting method of hybrid integrated circuit device |
| JPH0669296A (en) * | 1992-08-19 | 1994-03-11 | Tokyo Electron Ltd | Testing apparatus |
| CN1038784C (en) * | 1994-02-28 | 1998-06-17 | 吉林大学 | High-speed circuit electro-optic sampling analyser |
| CN1208822C (en) * | 2003-03-14 | 2005-06-29 | 威盛电子股份有限公司 | Wafer grade testing and salient point process and chip struture with testing pad |
-
2004
- 2004-06-29 CN CNB200410050062XA patent/CN100371726C/en not_active Expired - Lifetime
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100451742C (en) * | 2007-07-06 | 2009-01-14 | 友达光电股份有限公司 | Liquid crystal panel detecting method and device |
| CN101587850B (en) * | 2008-05-21 | 2011-05-25 | 瑞鼎科技股份有限公司 | Bearing structure and testing device |
| CN101645435B (en) * | 2008-08-04 | 2011-07-27 | 和舰科技(苏州)有限公司 | Probing pad structure and manufacturing method thereof |
| CN106782234A (en) * | 2015-11-24 | 2017-05-31 | 飞腾动力公司 | System and method for promoting the inspection to the device to be tested including multiple panels |
| CN106782234B (en) * | 2015-11-24 | 2022-05-13 | 奥宝科技有限公司 | System and method for facilitating inspection of a device under test comprising a plurality of panels |
| CN107068024A (en) * | 2017-03-14 | 2017-08-18 | 惠科股份有限公司 | Display device testing method and display device |
| CN109444165A (en) * | 2018-10-29 | 2019-03-08 | 中国电子科技集团公司第十三研究所 | Chip strip microscopic examination fixture |
| CN109444165B (en) * | 2018-10-29 | 2021-06-15 | 中国电子科技集团公司第十三研究所 | Chip strip microscope inspection clamp |
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| Publication number | Publication date |
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| CN100371726C (en) | 2008-02-27 |
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