CN1707764A - Method for testing wafer packaging - Google Patents

Method for testing wafer packaging Download PDF

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Publication number
CN1707764A
CN1707764A CNA2004100111462A CN200410011146A CN1707764A CN 1707764 A CN1707764 A CN 1707764A CN A2004100111462 A CNA2004100111462 A CN A2004100111462A CN 200410011146 A CN200410011146 A CN 200410011146A CN 1707764 A CN1707764 A CN 1707764A
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CN
China
Prior art keywords
equipment
electric crystal
cutting
cut
lead frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CNA2004100111462A
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Chinese (zh)
Inventor
资重兴
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
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Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to CNA2004100111462A priority Critical patent/CN1707764A/en
Publication of CN1707764A publication Critical patent/CN1707764A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/4824Connecting between the body and an opposite side of the item with respect to the body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting

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  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

The wafer packing and testing process includes the following steps: A. packing step comprising fixing cut chips on un-cut wire holder, drawing line and coating outer glue to form several connected electric crystals; B. pre-cutting to eliminate conducting parts and excessive parts of the wire holder to form un-separated electric crystals capable of being tested; C. testing and inspecting the un-separated electric crystals to find electric crystal with fault; D. generating test file via recoding the packing quality and use efficiency of the electric crystals; E. printing product type, brand, producing place, etc on the surface of the packing surface; and F. cutting the wire holder with cutting machine to form independent electric crystals and eliminating under-proof product. The present invention can realize automatic test, and can result in high product quality and low cost.

Description

Wafer packaging and testing method
Technical field
The present invention relates to a kind of wafer packaging and testing method.
Background technology
Known wafer encapsulation fabrication schedule, include wafer cutting, bonding wire, routing, sealing, lettering in regular turn, cut key steps such as list and detection, make operational electric crystal or microprocessor by this, but by above-mentioned known wafer encapsulation procedure as seen, it is before the Quality Detection of carrying out electric crystal, and lettering is in the adhesive body surface of each crystal in advance, therefore, as detect the back and find to have situations such as faulty materials or quality be bad, the electric crystal finished product that it is eliminated will make the waste that seems of lettering program.Secondly, known trace routine, be after will connecting the lead frame cutting and separating of each electric crystal, (promptly to cut list), just detect at each electric crystal, the shape particle because electric crystal has become to loose, therefore be difficult to carry out testing one by one, only can so be difficult for choosing real product defective with this electric crystal of manual work sampling Detection; Otherwise, as desire each electric crystal is detected, because of it has been diffusing from state, certainly will waste many times in the manual work action of taking and putting, for the lifting and the reduction of quality management cost of detection rates, real genus is unfavorable.In addition, above-mentioned known sampling Detection operation, only to loose from several electric crystals extract, therefore, the processing procedure that can only find this batch electric crystal finished product has the flaw problem, can not predict which electric crystal of not cutting before single accurately flaw often takes place, thus can't effectively carry out adjustment, correction or replacing to its sealed in unit, mould or program, will be under the situation of not having precognition the many flaw products of production.
Summary of the invention
The objective of the invention is to solve product defect incidence height, the slow problem of detection speed that the above-mentioned wafer package detecting method of commonly seeing exists, and a kind of wafer packaging and testing method that overcomes above-mentioned shortcoming is provided.
The present invention's method may further comprise the steps:
(A), encapsulation: several wafers after will cut are fixedly arranged on respectively on the lead frame of cutting and separating not, and implement the canned program of routing and the coating of peripheral adhesive body, to form several electric crystals state that is connected;
(B), cut in advance:, form not independent separate and can carry out detected state of each electric crystal with the current-carrying part or the redundance excision of lead frame;
(C), test: will whole unsegregated electric crystals carry in checkout equipment and test and check, with the electric crystal of discovery flaw;
(D), produce the test archives: by the encapsulation quality and the effective utilization of the automatic record of checkout equipment or each electric crystal of manual record;
(E), lettering: seal is provided with printed words such as product type, brand and the place of production in above-mentioned adhesive body surface;
(F), cut list: utilize cutting machine that lead frame is cut, make each electric crystal form separate state, and when cutting, extract flaw or the bad finished product of quality out.
The present invention can reach automation and detect operation, promote quality management speed, reduce cost, and can comprehensively detect each electric crystal, with acquisition, storage and statistics detection data, and then obtain to find that the effect in source takes place flaw, so that sealed in unit is safeguarded, reduce the product defect incidence.
Description of drawings
Fig. 1 is the embodiments of the invention FB(flow block).
Fig. 2 is for finishing the crystal circle structure schematic diagram of encapsulation with the present invention's method.
The schematic diagram that Fig. 3 carries for electric crystal collective in the present invention's the method.
Embodiment
See also shown in Figure 1ly, be the embodiments of the invention FB(flow block), this method comprises the following steps:
(A), encapsulation: see also shown in Figure 2, several wafers 1 after the cutting are fixedly arranged on respectively on the lead frame 2 of cutting and separating not, this lead frame 2 is known article, detailed structure is not given unnecessary details in addition, and implement 21 of each pins that several metal wires 3 are connected to the signal contact of wafer 1 and lead frame 2, be said routing operation, and peripheral or this metal wire 3 is provided with the position and is provided with the canned program that adhesive body 4 coats in wafer 1, to form several electric crystals 10 with lead frame 2 state that neatly is connected;
(B), cut in advance: see also shown in Figure 3, be with automation conveying equipment 30 or manual type, whole unsegregated electric crystal 10 collectives are carried in cutting equipment or punching equipment place, by this with the particular conductivity part of lead frame 2 as a few pins of selecting 21 or unnecessary material part 22 excisions, still mat lead frame 2 is continuous to form each electric crystal 10, and be not independent separate and can carry out detected state, wherein, this automation conveying equipment 30 can be conveyer belt apparatus or mechanical arm device etc.;
(C), test: with automation conveying equipment 30 or manual type, whole unsegregated electric crystal 10 collectives are carried test in the checkout equipment place and check, to find and the difference flaw, quality electric crystal bad or that efficient is lower, wherein, this automation conveying equipment 30 can be conveyer belt apparatus or mechanical arm device etc., and checkout equipment can be the probe test instrument with the test result of use, or can be the metal wire 3 connection effects of x-ray examination machine to inspect adhesive body 4 inside, or other is as ultrasonic scanner, electron microscope, temperature cycles device and pressure cooker etc.;
(D), produce the test archives: by above-mentioned the checkout equipment quality and the effective utilization of record or each electric crystal 10 encapsulation of manual record automatically, and wherein automatically record can be that the software that prestores carries out comparison of digitisation data and storage, tape stores or paper card is printed modes such as storage and reached; And manual record can be quality management operating personnel operation the detection data is changed into digitisation archives, tape save File or paper card archives etc.;
(E), lettering:, whole unsegregated electric crystal 10 collectives are carried in the typing equipment place, and be provided with the sign of printed words such as product type, brand and the place of production in the surface of above-mentioned adhesive body 4 seal with automation conveying equipment 30 or manual type; Wherein, this automation conveying equipment 30 can be conveyer belt apparatus or mechanical arm device etc., and this typing equipment can be known printing-type equipment, transfer-type equipment or laser beam marking equipment etc.;
(F), cut list: with automation conveying equipment 30 or manual type, whole unsegregated electric crystals 10 are delivered to cutting equipment or punching equipment place again, utilize this cutting equipment that each lead frame 2 is cut, make each electric crystal 10 form a separate single state, and the detection data according to above-mentioned checkout equipment is extracted flaw or the bad electric crystal of quality out when cutting, and encapsulation is good, the preferable electric crystal finished product of quality effect and keep.
Above-mentioned implementation procedure of the present invention, step and mode, because of having the program of cutting in advance (B), so can keep several electric crystals 10 forms not diffusing from becoming single state, carry with automation conveying equipment 30 or manual type for convenient, and carry out follow-up trace routine (C) and draw word program (E) with other the said equipment, so can obtain carry to move fast, can make things convenient for complete detection and make things convenient for effect such as lettering, to reduce the cost of its package detection.
Secondly, because of the present invention carries out lettering program (E) afterwards again in trace routine (C), therefore this typing equipment can be according to the data of the test Documentor (D) that is produced after the trace routine (C), only select and on the electric crystal of non-defective unit, carry out lettering, or the different qualities seals of foundation are established different model, and get rid of that seal is established flaw wherein and the electric crystal estimating to eliminate so can promote actual print speed by this, prevents unnecessary lettering time and waste of material.
In addition, the present invention's method is to keep several electric crystals 10 and be and loose from being single state to cut program (B) in advance, therefore afterwards in trace routine (C), can be according to comparison data that produces test Documentor (D) or statistics etc., in time find sealed in unit or cut equipment (can with cut set up identical fully) in advance and cause which zone or which electric crystal often to encapsulate flaw or cutting flaw, so can find out the product poor prognostic cause according to this data, at sealed in unit or cut equipment adjustment in advance, safeguard or replacing, improving its encapsulation procedure, and reach the benefit that improves yields by this.

Claims (5)

1, a kind of wafer packaging and testing method, this method may further comprise the steps:
(A), encapsulation: several wafers that will cut are fixedly arranged on respectively on the lead frame of cutting and separating not, and implement the canned program of routing and the coating of peripheral adhesive body, to form several electric crystals state that is connected;
(B), cut in advance: unsegregated several electric crystal collectives are carried in cutting equipment or punching equipment place, with the specific part excision of lead frame, with form each electric crystal still the mat lead frame link to each other and be not independent separate and can carry out detected state;
(C), test: will unsegregated several electric crystal collectives carry and test in the checkout equipment place and check, with the electric crystal of discovery flaw;
(D), produce the test archives: the encapsulation quality and the effective utilization that write down each electric crystal via checkout equipment;
(E), lettering: unsegregated several electric crystal collectives are carried in the typing equipment place, and seal is provided with sign in the adhesive body surface;
(F), cut list: unsegregated electric crystal collective is delivered to cutting equipment or punching equipment place again, each lead frame is cut, make each electric crystal form separate single state, and when cutting, extract flaw or the bad electric crystal of quality out.
2, a kind of wafer packaging and testing method according to claim 1 is characterized in that: described electric crystal collective mode of movement is automation conveying equipment or manual type; Automation equipment wherein is conveyer belt apparatus or mechanical arm device.
3, a kind of wafer packaging and testing method according to claim 1 is characterized in that: described checkout equipment is probe test instrument or x-ray examination machine or ultrasonic scanner or electron microscope or temperature cycles device or pressure cooker.
4, a kind of wafer packaging and testing method according to claim 1, it is characterized in that: described checkout equipment is recorded as automatic record or manual record mode.
5, a kind of wafer packaging and testing method according to claim 1 is characterized in that: described typing equipment is printing-type equipment or transfer-type equipment or laser beam marking equipment.
CNA2004100111462A 2004-10-11 2004-10-11 Method for testing wafer packaging Pending CN1707764A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNA2004100111462A CN1707764A (en) 2004-10-11 2004-10-11 Method for testing wafer packaging

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNA2004100111462A CN1707764A (en) 2004-10-11 2004-10-11 Method for testing wafer packaging

Publications (1)

Publication Number Publication Date
CN1707764A true CN1707764A (en) 2005-12-14

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ID=35581538

Family Applications (1)

Application Number Title Priority Date Filing Date
CNA2004100111462A Pending CN1707764A (en) 2004-10-11 2004-10-11 Method for testing wafer packaging

Country Status (1)

Country Link
CN (1) CN1707764A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101112776B (en) * 2006-07-27 2010-12-15 中芯国际集成电路制造(上海)有限公司 Instrument for accurate cutting of crystal round examples and method of use thereof
CN102916092A (en) * 2011-08-04 2013-02-06 政美应用股份有限公司 Device and method for detection and classification of wafer
CN103730376A (en) * 2012-10-15 2014-04-16 华邦电子股份有限公司 Packaging test method
WO2017054104A1 (en) * 2015-09-28 2017-04-06 Boe Technology Group Co., Ltd. Method for forming display substrate for display panel
CN106800272A (en) * 2017-02-17 2017-06-06 烟台睿创微纳技术股份有限公司 A kind of MEMS wafer cutting and wafer scale release and method of testing
CN107403737A (en) * 2016-05-18 2017-11-28 财团法人工业技术研究院 Automatic packaging production line, packaging method and packaging system
CN109891231A (en) * 2016-11-04 2019-06-14 浜松光子学株式会社 Apparatus for ultrasonic examination and ultrasonic inspection method

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101112776B (en) * 2006-07-27 2010-12-15 中芯国际集成电路制造(上海)有限公司 Instrument for accurate cutting of crystal round examples and method of use thereof
CN102916092A (en) * 2011-08-04 2013-02-06 政美应用股份有限公司 Device and method for detection and classification of wafer
CN102916092B (en) * 2011-08-04 2015-12-02 政美应用股份有限公司 The device and method of detection and classification wafer
CN103730376A (en) * 2012-10-15 2014-04-16 华邦电子股份有限公司 Packaging test method
CN103730376B (en) * 2012-10-15 2018-04-03 华邦电子股份有限公司 Packaging and testing method
WO2017054104A1 (en) * 2015-09-28 2017-04-06 Boe Technology Group Co., Ltd. Method for forming display substrate for display panel
CN107403737A (en) * 2016-05-18 2017-11-28 财团法人工业技术研究院 Automatic packaging production line, packaging method and packaging system
CN109891231A (en) * 2016-11-04 2019-06-14 浜松光子学株式会社 Apparatus for ultrasonic examination and ultrasonic inspection method
US11105777B2 (en) 2016-11-04 2021-08-31 Hamamatsu Photonics K.K. Ultrasonic inspection device and ultrasonic inspection method
CN109891231B (en) * 2016-11-04 2022-01-11 浜松光子学株式会社 Ultrasonic inspection apparatus and ultrasonic inspection method
CN106800272A (en) * 2017-02-17 2017-06-06 烟台睿创微纳技术股份有限公司 A kind of MEMS wafer cutting and wafer scale release and method of testing
CN106800272B (en) * 2017-02-17 2018-11-23 烟台睿创微纳技术股份有限公司 A kind of cutting of MEMS wafer and wafer scale release and test method

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